NXP Semiconductors freescale semiconductor ColdFire MCF51CN128 Series, Reference Manual

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ColdFire Core
Freescale Semiconductor 7-21
MCF51CN128 Reference Manual, Rev. 6
Information loaded into D1 defines the local memory hardware configuration as shown in the figure below.
BDM: Load: 0x61 (D1)
Store: 0x41 (D1)
Access: User read-only
BDM read-only
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R 0 0 0 1 0 0 0 0 FLASHSZ
1
0 0 0
W
Reset 0 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R 0 0 0 1 ROMSZ SRAMSZ 0 0 0
W
Reset 0 0 0 1 0 0 0 0 0 1 1 1 1 0 0 0
1
The FLASHSZ size depends on memory size. The size shown is for 128 KB flash.
Figure 7-13. D1 Hardware Configuration Info
Table 7-11. D1 Hardware Configuration Information Field Description
Field Description
31–24 Reserved.
18–16 Reserved
15–12 Reserved, resets to 0b0001
11–8
ROMSZ
Boot ROM size. Indicates the size of the boot ROM.
0000 No boot ROM (This is the value used for this device)
0001 512 bytes
0010 1 KB
0011 2 KB
0100 4 KB
0101 8 KB
0110 16 KB
0111 32 KB
Else Reserved for future use
7–3
SRAMSZ
SRAM bank size.
00000 No SRAM
00010 512 bytes
00100 1 KB
00110 2 KB
01000 4 KB
01010 8 KB
01100 16 KB
01111 24 KB (This is the value used for this device)
01110 32 KB
10000 64 KB
10010 128 KB
Else Reserved for future use
2–0 Reserved.