Multipurpose Clock Generator (MCG)
MCF51CN128 Reference Manual, Rev. 6
6-2
Freescale Semiconductor
6.1.1
Features
Key features of the MCG module are:
•
Frequency-locked loop (FLL)
•
Internal or external reference clock can be used to control the FLL
•
Phase-locked loop (PLL)
— Voltage-controlled oscillator (VCO)
— Modulo VCO frequency divider
— Phase/Frequency detector
— Integrated loop filter
— Lock detector with interrupt capability
•
Internal reference clock
— Nine trim bits for accuracy
— Can be selected as the clock source for the MCU
•
External reference clock
— Control for a separate crystal oscillator
— Clock monitor with reset capability
— Can be selected as the clock source for the MCU
•
Reference divider is provided
•
Clock source selected can be divided down by 1, 2, 4, or 8
•
BDC clock (MCGLCLK) is provided as a constant divide-by-2 of the DCO output whether in an
FLL or PLL mode.Three selectable digitally controlled oscillators (DCOs) optimized for different
frequency ranges.
•
Option to maximize DCO output frequency for a 32,768 Hz external reference clock source.
•
The PLL can be used to drive MCGPLLSCLK even when MCGOUT is driven from one of the
reference clocks (PBE mode).
