NXP Semiconductors freescale semiconductor ColdFire MCF51CN128 Series, Reference Manual

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Interrupt Controller (CF1_INTC)
MCF51CN128 Reference Manual,
Rev. 6
8-6 Freescale Semiconductor
0x194 1 6 101 Next SCI3_rx SCI3_C2[RIE] SCI3_S1[RDRF] Vsci3rx
SCI3_C2[ILIE] SCI3_S1[IDLE]
SCI3_BDH[LBKDIE] SCI3_S2[LBKDIF]
SCI3_BDH[RXEDGIE] SCI3_S2[RXEDGIF
]
0x198 1 5 102 Next SCI3_tx SCI3_C2[TCIE] SCI3_S1[TC] Vsci3tx
SCI3_C2[TIE] SCI3_S1[TDRE]
0x19C 7 0 103 Next Level 7 Software Interrupt Force_lvl7
0x1A0 6 0 104 Next Level 6 Software Interrupt Force_lvl6
0x1A4 5 0 105 Next Level 5 Software Interrupt Force_lvl5
0x1A8 4 0 106 Next Level 4 Software Interrupt Force_lvl4
0x1AC 3 0 107 Next Level 3 Software Interrupt Force_lvl3
0x1B0 2 0 108 Next Level 2 Software Interrupt Force_lvl2
0x1B4 1 0 109 Next Level 1 Software Interrupt Force_lvl1
0x1B8 1 4 110 Next IIC1 IIC1_CR1[IICIE] IIC1_SR[IICIF] Viic1
0x1BC 1 mid 111 Next IIC2 IIC2_CR1[IICIE] IIC2_SR[IICIF] Viic2
0x1C0 1 3 112 Next ADC1 ADC_SC1[AIEN] ADC_SC1[COCO] Vadc
0x1C4 1 2 113 Next KBI1 and KBI2 KBI1_SC[KBIE]
KBI2_SC[KBIE] KBI1_SC[KBF]
KBI2_SC[KBF] Vkeyboard
0x1C8 1 1 114 Next RTC RTC_SC[RTIE] RTC_SC[RTIF] Vrtc
0x1CC
–
0x3FC
N/A N/A 115
–
255
Next Reserved
1
The SCI3_OR interrupt is a logical ORing of SCI3_rx, SCI3_tx and SCI3_err. You can use this vector for SCI3 interrupts to be processed at
priority level 4. Use of SCI3_OR is mutually exclusive with use of the other SCI3 vectors.
2
The “FEC Other” interrupt is a logical ORing of the FEC HBERR, BABR, BABT, GRA, TXB, RXB, MII, EBERR, LC, RL and UN interrupts.
You can use this vector to assign all FEC interrupts at priority level 3. Use of “FEC Other” is mutually exclusive with the use of the interrupt
signals used to generate it.
Table 8-3. Unsupported FTSR Interrupts
Interrupt FTSR_Local Enable FTSR_Source Description
FTSR_emptybuf FTSR_FCNFG[CBEIE] FTSR_FSTAT[FCBEF] Flash Command Buffer Empty Interrupt
FTSR_coco FTSR_FCNFG[CCIE] FTSR_FSTAT[FCCF] Flash Command Complete Interrupt
Table 8-2. MC51CN128 Series Exception and Interrupt Vector Table (continued)
Vector
Address
Offset
In
te
rru
pt Le
v
e
l
Priorit
y
V
ector
Number
Stacked
Program
Counter
Vector Description Enable Source
Vector
Name