1280
11 PROCESS CONTROL INSTRUCTIONS
11.3 Control Operation Instructions
■
Tracking processing (1)
• Tracking processing is performed when all of the following conditions are satisfied.
• If the set value (E2) is the upper loop MV, the TRKF of the disable alarm detection (INH) of the upper loop is set to 1.
■
Variation rate limiter (2)
Variation rate limiter processing performs the following operations, and stores the result in the current ratio value (R
n
).
■
Ratio calculation (3)
The ratio calculation is performed with the following operational expression.
■
Loop stop processing (4)
The following processing is performed according to the SPA status of the alarm detection (ALM).
■
Control cycle determination (5)
If the specified control cycle is not reached, output value (BW) is set to 0 and the S.R instruction is terminated.
If the specified control cycle is reached, "mode determination (6)" is performed.
■
Mode determination (6)
The following processing is performed depending on the control mode (MODE).
Operation error
• The tracking bit (TRK) is set to 1.
• The set value (E2) is used.
• The control mode (MODE) is set to any of the following: MAN, AUT, CMV, CMB, CAB, LCM, LCA, or LCC.
Condition
Operational expression
(SPR-R
n
)
DR
R
n
=R
n-1
+DR
(SPR-R
n
)
-DR
R
n
=R
n-1
-DR
|SPR-R
n
|<DR
R
n
=SPR
SPA status
Processing details
1
The loop stops. When the loop stops, the following operations are performed and the S.R instruction ends.
• The last output value (BW) is held.
• The control mode (MODE) is set to MAN.
0
The loop runs and "control cycle determination processing (5)" is performed.
Control mode (MODE)
Processing details
CAS, CCB, CSV
• If the set value (E2) is specified, engineering value transformation processing (refer to the following
expression) is performed, and then "variation rate limiter (2)" is performed.
• If the set value (E2) is not specified, "variation rate limiter (2)" is performed without performing
engineering value transformation processing.
MAN, AUT, CMV, CMB, CAB, LCM, LCA, LCC
"Tracking processing (1)" is performed.
Error code
(SD0)
Description
3400H
An invalid operation (such as division by zero) is performed.
3402H
The value specified by (s1) or (d2) is a subnormal number or NaN (not a number).
3403H
An overflow has occurred.
3405H
The control cycle (CT) setting is less than 0.
The execution cycle (
T) setting is less than 0.
The value divided the control cycle (CT) by the execution cycle (
T) exceeds 32767.
100
E2=
RMAX-RMIN
×(SPR-RMIN)
BW=
×E1+BIAS
RMAX-RMIN
R
n
-RMIN
SPR=
×E2+RMIN
100
RMAX-RMIN
Summary of Contents for MELSEC iQ-R Series
Page 1: ...MELSEC iQ R Programming Manual Instructions Standard Functions Function Blocks ...
Page 2: ......
Page 24: ...22 INDEX 2092 INSTRUCTION INDEX 2093 REVISIONS 2104 WARRANTY 2105 TRADEMARKS 2106 ...
Page 34: ...32 MEMO ...
Page 35: ...33 PART 1 PART 1 OVERVIEW This part consists of the following chapter 1 OVERVIEW ...
Page 68: ...66 1 OVERVIEW 1 5 Precautions on Programming MEMO ...
Page 1448: ...1446 14 REDUNDANT SYSTEM INSTRUCTIONS 14 2 Disabling Enabling System Switching MEMO ...
Page 1972: ...1970 33 TIME DATA TYPE FUNCTIONS 33 4 Division MEMO ...
Page 2067: ...APPX Appendix 5 PID Control Program Examples 2065 A 252 Set PID control data for loop 2 ...
Page 2109: ......