ABB Relion 670 series, Technical Manual

Page: 760 / 1432

Synchronism check
M14834-3 v13
The voltage difference, frequency difference and phase angle difference values are measured in
the IED centrally and are available for the synchronism check function for evaluation. By setting the
phases used for SESRSYN, with the settings
SelPhaseBus1, SelPhaseBus2, SelPhaseLine1 and
SelPhaseLine2, a compensation is made automatically for the voltage amplitude difference and
the phase angle difference caused if different setting values are selected for both sides of the
breaker. If needed an additional phase angle adjustment can be done for selected line voltage with
the PhaseShift setting.
When the function is set to
OperationSC = Enabled, the measuring will start.
The function will compare the bus and line voltage values with the set values for
VHighBusSC and
VHighLineSC.
If both sides are higher than the set values, the measured values are compared with the set values
for acceptable frequency, phase angle and voltage difference:
FreqDiffA, FreqDiffM, PhaseDiffA,
PhaseDiffM and VDiffSC. If additional phase angle adjustment is done with the PhaseShift setting,
the adjustment factor is deducted from the line voltage before the comparison of the phase angle
values.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value
FreqDiff.
Two sets of settings for frequency difference and phase angle difference are available and used
for the manual closing and autoreclose functions respectively, as required.
The inputs BLOCK and BLKSC are available for total block of the complete SESRSYN (25) function
and selective block of the Synchronism check function respectively. Input TSTSC will allow testing
of the function where the fulfilled conditions are connected to a separate test output.
The outputs MANSYOK and AUTOSYOK are activated when the actual measured conditions match
the set conditions for the respective output. The output signal can be delayed independently for
MANSYOK and AUTOSYOK conditions.
A number of outputs are available as information about fulfilled checking conditions. VOKSC
shows that the voltages are high, VDIFFSC, FRDIFFA, FRDIFFM, PHDIFFA, PHDIFFM shows when
the voltage difference, frequency difference and phase angle difference conditions are out of
limits.
Output INADVCLS, inadvertent circuit breaker closing, indicates that the circuit breaker has been
closed at wrong phase angle by mistake. The output is activated, if the voltage conditions are
fulfilled at the same time the phase angle difference between bus and line is suddenly changed
from being larger than 60 degrees to smaller than 5 degrees.
Section 14 1MRK 502 066-UUS B
Control
754
Technical manual