759
Table B.2
Register Bits (cont)
Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Module
INTEVT2
INTC
IRR0
INTC
PINT0R PINT1R IRQ5R
IRQ4R
IRQ3R
IRQ2R
IRQ1R
IRQ0R
IRR1
INTC
TXI1R
BRI1R
RXI1R
ERI1R
DEI3R
DEI2R
DEI1R
DEI0R
IRR2
INTC
—
—
—
ADIR
TXI2R
BRI2R
RXI2R
ERI2R
ICR1
MAI
IRQLVL BLMSK —
IRQ51S IRQ50S IRQ41S IRQ40S INTC
IRQ31S IRQ30S IRQ21S IRQ20S IRQ11S IRQ10S IRQ01S IRQ00S
ICR2
INT15S INT14S INT13S INT12S INT11S INT10S INT9S
INT8S
INTC
INT7S
INT6S
INT5S
INT4S
INT3S
INT2S
INT1S
INT0S
INTER
INT15E INT14E INT13E INT12E INT11E INT10E INT9E
INT8E
INTC
INT7E
INT6E
INT5E
INT4E
INT3E
INT2E
INT1E
INT0E
IPRC
IRQ3 level
IRQ2 level
INTC
IRQ1 level
IRQ0 level
IPRD
PINT0 to 7 level
PINT8 to 15 level
INTC
IRQ5 level
IRQ4 level
IPRE
DMAC level
IrDA level
INTC
SCIF level
A/D level
SAR0
DMAC
DAR0
DMAC
Содержание SH7709S
Страница 2: ...Hitachi SuperH RISC engine SH7709S Hardware Manual ADE 602 250 Rev 1 0 09 21 01 Hitachi Ltd ...
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Страница 292: ...273 T1 CKIO A25 to A0 CSn RD WR RD D31 to D0 WEn D31 to D0 BS T2 Read Write Figure 10 6 Basic Timing of Basic Interface ...
Страница 323: ...304 Tp TRr TRrw TRrw CKIO CKE CSn RAS3U RAS3L CASU CASL RD WR Figure 10 28 Synchronous DRAM Auto Refresh Timing ...
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