442
Bit 5—Transmit Enable (TE): Enables or disables the SCI serial transmitter.
Bit 5: TE
Description
0
Transmitter disabled
*
1
(Initial value)
1
Transmitter enabled
*
2
Notes:
*
1 The transmit data register empty bit (TDRE) in the serial status register (SCSSR) is
fixed at 1.
*
2 Serial transmission starts when the transmit data register empty (TDRE) bit in the serial
status register (SCSSR) is cleared to 0 after writing of transmit data into the SCTDR.
Select the transmit format in SCSMR before setting TE to 1.
Bit 4—Receive Enable (RE): Enables or disables the SCI serial receiver.
Bit 4: RE
Description
0
Receiver disabled
*
1
(Initial value)
1
Receiver enabled
*
2
Notes:
*
1 Clearing RE to 0 does not affect the receive flags (RDRF, FER, PER, ORER). These
flags retain their previous values.
*
2 Serial reception starts when a start bit is detected in asynchronous mode, or
synchronous clock input is detected in synchronous mode. Select the receive format in
SCSMR before setting RE to 1.
Содержание SH7709S
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Страница 292: ...273 T1 CKIO A25 to A0 CSn RD WR RD D31 to D0 WEn D31 to D0 BS T2 Read Write Figure 10 6 Basic Timing of Basic Interface ...
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