440
Bit 3—Stop Bit Length (STOP): Selects one or two bits as the stop bit length in asynchronous
mode. This setting is used only in asynchronous mode. It is ignored in synchronous mode because
no stop bits are added.
When receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit, but if the second stop bit is 0, it is treated as the start bit of
the next incoming character.
Bit 3: STOP
Description
0
One stop bit
*
1
(Initial value)
1
Two stop bits
*
2
Notes:
*
1 When transmitting, a single 1-bit is added at the end of each transmitted character.
*
2 When transmitting, two 1-bits are added at the end of each transmitted character.
Bit 2—Multiprocessor Mode (MP): Selects multiprocessor format. When multiprocessor format
is selected, settings of the parity enable (PE) and parity mode (O/
E
) bits are ignored. The MP bit
setting is used only in asynchronous mode; it is ignored in synchronous mode. For the
multiprocessor communication function, see section 14.3.3, Multiprocessor Communication.
Bit 2: MP
Description
0
Multiprocessor function disabled
(Initial value)
1
Multiprocessor format selected
Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): Select the internal clock source of the on-
chip baud rate generator. Four clock sources are available. P
φ
, P
φ
/4, P
φ
/16 and P
φ
/64 can be set
according to the setting of the CKS1 and CKS0 bits. For further information on the clock source,
bit rate register settings, and baud rate, see section 14.2.9, Bit Rate Register (SCBRR).
Bit 1: CKS1
Bit 0: CKS0
Description
0
0
P
φ
(Initial value)
1
P
φ
/4
1
0
P
φ
/16
1
P
φ
/64
Note:
P
φ
: Peripheral clock
Содержание SH7709S
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Страница 292: ...273 T1 CKIO A25 to A0 CSn RD WR RD D31 to D0 WEn D31 to D0 BS T2 Read Write Figure 10 6 Basic Timing of Basic Interface ...
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