343
Bits 13 and 12—Source Address Mode Bits 1 and 0 (SM1, SM0): Select whether the DMA
source address is incremented, decremented, or left fixed.
Bit 13: SM1
Bit 12: SM0
Description
0
0
Fixed source address
(Initial value)
0
1
Source address is incremented (+1 in 8-bit transfer, +2 in 16-
bit transfer, +4 in 32-bit transfer, +16 in 16-byte transfer)
1
0
Source address is decremented (–1 in 8-bit transfer, –2 in 16-
bit transfer, –4 in 32-bit transfer; illegal setting in 16-byte
transfer)
1
1
Setting prohibited
If the transfer source is specified by indirect address, specify the address holding the value of the
address in which the data to be transferred is stored (i.e. the indirect address) in source address
register 3 (SAR3).
Specification of SAR3 incrementing or decrementing in indirect address mode depends on the
SM1 and SM0 settings. In this case, however, the SAR3 increment or decrement value is +4, –4,
or fixed at 0, regardless of the transfer data size specified in TS1 and TS0.
Содержание SH7709S
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Страница 292: ...273 T1 CKIO A25 to A0 CSn RD WR RD D31 to D0 WEn D31 to D0 BS T2 Read Write Figure 10 6 Basic Timing of Basic Interface ...
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