220
Bit 7: TME
Description
0
Timer disabled: Count-up stops and WTCNT value is retained
(Initial value)
1
Timer enabled
Bit 6—Timer Mode Select (WT/
IT
): Selects whether to use the WDT as a watchdog timer or an
interval timer.
Bit 6: WT/
IT
Description
0
Used as interval timer
(Initial value)
1
Used as watchdog timer
Note:
If WT/
IT
is modified when the WDT is running, the up-count may not be performed correctly.
Bit 5—Reset Select (RSTS): Selects the type of reset when WTCNT overflows in watchdog timer
mode. In interval timer mode, this setting is ignored.
Bit 5: RSTS
Description
0
Power-on reset
(Initial value)
1
Manual reset
Note:
RESETOUT
is output.
Bit 4—Watchdog Timer Overflow (WOVF): Indicates that the WTCNT has overflowed in
watchdog timer mode. This bit is not set in interval timer mode.
Bit 4: WOVF
Description
0
No overflow
(Initial value)
1
WTCNT has overflowed in watchdog timer mode
Bit 3—Interval Timer Overflow (IOVF): Indicates that WTCNT has overflowed in interval
timer mode. This bit is not set in watchdog timer mode.
Bit 3: IOVF
Description
0
No overflow
(Initial value)
1
WTCNT has overflowed in interval timer mode
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select the clock to be used for the
WTCNT count from the eight types obtainable by dividing the peripheral clock. The overflow
period in the table is the value when the peripheral clock (P
φ
) is 15 MHz.
Содержание SH7709S
Страница 2: ...Hitachi SuperH RISC engine SH7709S Hardware Manual ADE 602 250 Rev 1 0 09 21 01 Hitachi Ltd ...
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Страница 292: ...273 T1 CKIO A25 to A0 CSn RD WR RD D31 to D0 WEn D31 to D0 BS T2 Read Write Figure 10 6 Basic Timing of Basic Interface ...
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