422
13.2.13
Date Alarm Register (RDAYAR)
The date alarm register (RDAYAR) is an 8-bit readable/writable register, and an alarm register
corresponding to the BCD-coded date section counter RDAYCNT of the RTC. When the ENB bit
is set to 1, a comparison with the RDAYCNT value is performed. From among the registers
RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits set to 1, and if each of those coincide, an
RTC alarm interrupt is generated.
The range that can be set is 01
–
31 (decimal) + ENB bit. Errant operation will result if any other
value is set. The RDAYCNT range that can be set changes with some months and in leap years.
Please confirm the correct setting.
The ENB bit in RDAYAR is initialized by a power-on reset. The remaining RDAYAR fields are
not initialized and retain their contents by a manual reset, or in standby mode.
Bit:
7
6
5
4
3
2
1
0
ENB
—
10 days
1 day
Initial value:
0
0
—
—
—
—
—
—
R/W:
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
13.2.14
Month Alarm Register (RMONAR)
The month alarm register (RMONAR) is an 8-bit readable/writable register, and an alarm register
corresponding to the BCD-coded month section counter RMONCNT of the RTC. When the ENB
bit is set to 1, a comparison with the RMONCNT value is performed. From among the registers
RSECAR, RMINAR, RHRAR, RWKAR, RDAYAR, RMONAR, the counter and alarm register
comparison is performed only on those with ENB bits set to 1, and if each of those coincide, an
RTC alarm interrupt is generated.
The range that can be set is 01
–
12 (decimal) + ENB bit. Errant operation will result if any other
value is set.
The ENB bit in RMONAR is initialized by a power-on reset. The remaining RMONAR fields are
not initialized and retain their contents by a manual reset, or in standby mode.
Bit:
7
6
5
4
3
2
1
0
ENB
—
—
10
months
1 month
Initial value:
0
0
0
—
—
—
—
—
R/W:
R/W
R
R
R/W
R/W
R/W
R/W
R/W
Содержание SH7709S
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Страница 292: ...273 T1 CKIO A25 to A0 CSn RD WR RD D31 to D0 WEn D31 to D0 BS T2 Read Write Figure 10 6 Basic Timing of Basic Interface ...
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