40
Table 2.6
Data Transfer Instructions (cont)
Instruction
Operation
Code
Privileged
Mode
Cycles T Bit
MOV.W
Rm,@(R0,Rn)
Rm
→
(R0 + Rn)
0000nnnnmmmm0101
—
1
—
MOV.L
Rm,@(R0,Rn)
Rm
→
(R0 + Rn)
0000nnnnmmmm0110
—
1
—
MOV.B
@(R0,Rm),Rn
(R0 + Rm)
→
Sign
extension
→
Rn
0000nnnnmmmm1100
—
1
—
MOV.W
@(R0,Rm),Rn
(R0 + Rm)
→
Sign
extension
→
Rn
0000nnnnmmmm1101
—
1
—
MOV.L
@(R0,Rm),Rn
(R0 + Rm)
→
Rn
0000nnnnmmmm1110
—
1
—
MOV.B
R0,@(disp,GBR)
R0
→
(disp + GBR)
11000000dddddddd
—
1
—
MOV.W
R0,@(disp,GBR)
R0
→
(disp
×
2
+ GBR)
11000001dddddddd
—
1
—
MOV.L
R0,@(disp,GBR)
R0
→
(disp
×
4
+ GBR)
11000010dddddddd
—
1
—
MOV.B
@(disp,GBR),R0
(disp + GBR)
→
Sign
extension
→
R0
11000100dddddddd
—
1
—
MOV.W
@(disp,GBR),R0
(disp
×
2
+ GBR)
→
Sign extension
→
R0
11000101dddddddd
—
1
—
MOV.L
@(disp,GBR),R0
(disp
×
4
+ GBR)
→
R0
11000110dddddddd
—
1
—
MOVA
@(disp,PC),R0
disp
×
4
+ PC
→
R0
11000111dddddddd
—
1
—
MOVT
Rn
T
→
Rn
0000nnnn00101001
—
1
—
SWAP.B Rm,Rn
Rm
→
Swap the bottom
two bytes
→
Rn
0110nnnnmmmm1000
—
1
—
SWAP.W Rm,Rn
Rm
→
Swap two
consecutive words
→
Rn
0110nnnnmmmm1001
—
1
—
XTRCT
Rm,Rn
Rm: Middle 32 bits of
Rn
→
Rn
0010nnnnmmmm1101
—
1
—
Содержание SH7709S
Страница 2: ...Hitachi SuperH RISC engine SH7709S Hardware Manual ADE 602 250 Rev 1 0 09 21 01 Hitachi Ltd ...
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Страница 292: ...273 T1 CKIO A25 to A0 CSn RD WR RD D31 to D0 WEn D31 to D0 BS T2 Read Write Figure 10 6 Basic Timing of Basic Interface ...
Страница 323: ...304 Tp TRr TRrw TRrw CKIO CKE CSn RAS3U RAS3L CASU CASL RD WR Figure 10 28 Synchronous DRAM Auto Refresh Timing ...
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