Omron CJ1W-NC271 - 12-2009, Operation Manual

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Changing to CS1W/CJ1W-NC271/471/F71 from CS1W/CJ1W-NC113/133/213/233/413/433
Appendix E
Input
(PCU to
CPU
Unit) n+3 00 External
I/O status Not used. b+3 00 Used as the forward rotation limit input
signal status.
01 Not used. 01 Used as the reverse rotation limit input
signal status.
02 Not used. 02 Used as the origin proximity input sig-
nal status.
03 Not used. 03 Used as the encoder phase A input sig-
nal status.
04 Not used. 04 Used as the encoder phase B input sig-
nal status.
05 Not used. 05 Used as the encoder phase Z input sig-
nal status.
06 Not used. 06 Used as the external latch signal 1
input signal status.
07 Not used. 07 Used as the external latch signal 2
input signal status.
08 CW limit input signal 08 Used as the external latch signal 3
input signal status.
The forward rotation limit input signal
status is allocated to bit 00 of this word
(b+3).
09 CCW limit input sig-
nal 09 Used as the brake output signal status.
The reverse rotation limit input signal
status is allocated to bit 01 of this word
(b+3).
10 Origin proximity input
signal 10 This bit is reserved by the system.
The origin proximity input signal status
is allocated to bit 02 of this word (b+3).
11 Origin input signal 11 This bit is reserved by the system.
The origin input status is provided
either in bit 05 of this word (b+3) when
phase Z input signal is set or in bits 06
to 08 of this word when the external
latch signal is set, according to the
selected signal.
12 Interrupt input signal 12 This bit is reserved by the system.
The interrupt input signal status is pro-
vided in bits 06 to 08 of this word (b+3)
according to the external latch signal.
13 Emergency stop
input signal 13 An emergency stop input signal is not
provided.
This bit is reserved by the system.
14 Positioning com-
pleted input signal 14 This bit is reserved by the system.
The Servo Drive's positioning com-
pleted signal status (indicating that the
deviation counter is within the
Position-
ing Completion Range 1 ) is allocated
as the Position Completed (PSET) Flag
in bit 07 of word b+2 (Servo Status
Flags) in the Axis Operating Input
Memory Area.
15 Deviation counter
reset output/origin-
adjustment com-
mand output 15 An deviation counter reset output/ori-
gin-adjustment command output is not
provided as an external output.
This bit is reserved by the system.
I/O CS1W/CJ1W-NC113/133/213/233/413/433 CS1W/CJ1W-NC271/471/F71
Word Bits Category Name Word Bits Differences