984
Instruction
LDMAC ERs,MACL
R:W NEXT
Internal operation,
1 state
MAC @ERn+,@ERm+
R:W 2nd
R:W NEXT
R:W EAh
R:W EAm
MOV.B #xx:8,Rd
R:W NEXT
MOV.B Rs,Rd
R:W NEXT
MOV.B @ERs,Rd
R:W NEXT
R:B EA
MOV.B @(d:16,ERs),Rd
R:W 2nd
R:W NEXT
R:B EA
MOV.B @(d:32,ERs),Rd
R:W 2nd
R:W 3rd
R:W 4th
R:W NEXT
R:B EA
MOV.B @ERs+,Rd
R:W NEXT
Internal operation,
R:B EA
1 state
MOV.B @aa:8,Rd
R:W NEXT
R:B EA
MOV.B @aa:16,Rd
R:W 2nd
R:W NEXT
R:B EA
MOV.B @aa:32,Rd
R:W 2nd
R:W 3rd
R:W NEXT
R:B EA
MOV.B Rs,@ERd
R:W NEXT
W:B EA
MOV.B Rs,@(d:16,ERd)
R:W 2nd
R:W NEXT
W:B EA
MOV.B Rs,@(d:32,ERd)
R:W 2nd
R:W 3rd
R:W 4th
R:W NEXT
W:B EA
MOV.B Rs,@
–
ERd
R:W NEXT
Internal operation,
W:B EA
1 state
MOV.B Rs,@aa:8
R:W NEXT
W:B EA
MOV.B Rs,@aa:16
R:W 2nd
R:W NEXT
W:B EA
MOV.B Rs,@aa:32
R:W 2nd
R:W 3rd
R:W NEXT
W:B EA
MOV.W #xx:16,Rd
R:W 2nd
R:W NEXT
MOV.W Rs,Rd
R:W NEXT
MOV.W @ERs,Rd
R:W NEXT
R:W EA
MOV.W @(d:16,ERs),Rd
R:W 2nd
R:W NEXT
R:W EA
MOV.W @(d:32,ERs),Rd
R:W 2nd
R:W 3rd
R:W 4th
R:W NEXT
R:W EA
MOV.W @ERs+, Rd
R:W NEXT
Internal operation,
R:W EA
1 state
MOV.W @aa:16,Rd
R:W 2nd
R:W NEXT
R:W EA
MOV.W @aa:32,Rd
R:W 2nd
R:W 3rd
R:W NEXT
R:B EA
MOV.W Rs,@ERd
R:W NEXT
W:W EA
MOV.W Rs,@(d:16,ERd)
R:W 2nd
R:W NEXT
W:W EA
MOV.W Rs,@(d:32,ERd)
R:W 2nd
R:W 3rd
R:E 4th
R:W NEXT
W:W EA
MOV.W Rs,@
–
ERd
R:W NEXT
Internal operation,
W:W EA
1 state
MOV.W Rs,@aa:16
R:W 2nd
R:W NEXT
W:W EA
MOV.W Rs,@aa:32
R:W 2nd
R:W 3rd
R:W NEXT
W:W EA
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56789
Содержание H8S/2631
Страница 28: ...xviii Appendix G Package Dimensions 1154 ...
Страница 341: ...316 Transfer SAR or DAR DAR or SAR Block area First block Nth block Figure 9 8 Memory Mapping in Block Transfer Mode ...
Страница 918: ...905 ø DREQ0 DREQ1 tDRQS tDRQH Figure 25 19 DMAC DREQ Input Timing ...
Страница 955: ...943 A 2 Instruction Codes Table A 2 shows the instruction codes ...