Section 25 User Debug Interface (H-UDI)
Rev. 3.00 Jan 25, 2006 page 756 of 872
REJ09B0286-0300
25.5
Boundary Scan
The H-UDI pins can be placed in the boundary scan mode stipulated by the IEEE1149.1 standard
by setting a command in SDIR.
25.5.1
Supported Instructions
This LSI supports the three essential instructions defined in the IEEE1149.1 standard (BYPASS,
SAMPLE/PRELOAD, and EXTEST) and optional instructions (CLAMP, HIGHZ, and IDCODE).
•
BYPASS [Instruction code: B'1111]
The BYPASS instruction is an instruction that operates the bypass register. This instruction
shortens the shift path to speed up serial data transfer involving other chips on the printed
circuit board. While this instruction is being executed, the test circuit has no effect on the
system circuits.
•
SAMPLE/PRELOAD [Instruction code: B'0100]
The SAMPLE/PRELOAD instruction inputs values from this LSI internal circuitry to the
boundary scan register, outputs values from the scan path, and loads data onto the scan path.
When this instruction is being executed, this LSI's input pin signals are transmitted directly to
the internal circuitry, and internal circuit values are directly output externally from the output
pins. This LSI system circuits are not affected by execution of this instruction.
In a SAMPLE operation, a snapshot of a value to be transferred from an input pin to the
internal circuitry, or a value to be transferred from the internal circuitry to an output pin, is
latched into the boundary scan register and read from the scan path. Snapshot latching does not
affect normal operation of this LSI.
In a PRELOAD operation, an initial value is set in the parallel output latch of the boundary
scan register from the scan path prior to the EXTEST instruction. Without a PRELOAD
operation, when the EXTEST instruction was executed an undefined value would be output
from the output pin until completion of the initial scan sequence (transfer to the output latch)
(with the EXTEST instruction, the parallel output latch value is constantly output to the output
pin).
•
EXTEST [Instruction code: B'0000]
The EXTEST instruction is provided to test external circuitry when this LSI is mounted on a
printed circuit board. When this instruction is executed, output pins are used to output test data
(previously set by the SAMPLE/PRELOAD instruction) from the boundary scan register to the
printed circuit board, and input pins are used to latch test results into the boundary scan
register from the printed circuit board. If testing is carried out by using the EXTEST
instruction N times, the Nth test data is scanned in when test data (N-1) is scanned out.
Summary of Contents for H8S/2158
Page 10: ...Rev 3 00 Jan 25 2006 page viii of lii...
Page 36: ...Rev 3 00 Jan 25 2006 page xxxiv of lii B Product Lineup 863 C Package Dimensions 864 Index 865...
Page 47: ...Rev 3 00 Jan 25 2006 page xlv of lii Appendix Figure C 1 Package Dimensions TBP 112A 864...
Page 54: ...Rev 3 00 Jan 25 2006 page lii of lii...
Page 70: ...Section 1 Overview Rev 3 00 Jan 25 2006 page 16 of 872 REJ09B0286 0300...
Page 118: ...Section 3 MCU Operating Modes Rev 3 00 Jan 25 2006 page 64 of 872 REJ09B0286 0300...
Page 126: ...Section 4 Exception Handling Rev 3 00 Jan 25 2006 page 72 of 872 REJ09B0286 0300...
Page 198: ...Section 6 Bus Controller Rev 3 00 Jan 25 2006 page 144 of 872 REJ09B0286 0300...
Page 326: ...Section 10 8 Bit PWM Timer PWM Rev 3 00 Jan 25 2006 page 272 of 872 REJ09B0286 0300...
Page 440: ...Section 15 Watchdog Timer WDT Rev 3 00 Jan 25 2006 page 386 of 872 REJ09B0286 0300...
Page 606: ...Section 17 I 2 C Bus Interface IIC Rev 3 00 Jan 25 2006 page 552 of 872 REJ09B0286 0300...
Page 742: ...Section 19 Multimedia Card Interface MCIF Rev 3 00 Jan 25 2006 page 688 of 872 REJ09B0286 0300...
Page 750: ...Section 21 D A Converter Rev 3 00 Jan 25 2006 page 696 of 872 REJ09B0286 0300...
Page 768: ...Section 22 A D Converter Rev 3 00 Jan 25 2006 page 714 of 872 REJ09B0286 0300...
Page 770: ...Section 23 RAM Rev 3 00 Jan 25 2006 page 716 of 872 REJ09B0286 0300...
Page 824: ...Section 26 Clock Pulse Generator Rev 3 00 Jan 25 2006 page 770 of 872 REJ09B0286 0300...
Page 844: ...Section 27 Power Down Modes Rev 3 00 Jan 25 2006 page 790 of 872 REJ09B0286 0300...
Page 878: ...Section 28 List of Registers Rev 3 00 Jan 25 2006 page 824 of 872 REJ09B0286 0300...
Page 926: ...Index Rev 3 00 Jan 25 2006 page 872 of 872 REJ09B0286 0300...