Section 14 Timer Connection
Rev. 3.00 Jan 25, 2006 page 353 of 872
REJ09B0286-0300
Bit
Bit Name
Initial Value
R/W
Description
3
2
1
0
HOINV
VOINV
CLOINV
CBOINV
0
0
0
0
R/W
R/W
R/W
R/W
Output Synchronization Signal Inversion
These bits select inversion of the output phase of
the horizontal synchronization signal (HSYNCO), the
vertical synchronization signal (VSYNCO), the
clamp waveform (CLAMPO), and the blanking
waveform (CBLANK).
HOINV:
0: The IHO signal is used directly as the HSYNCO
output
1: The IHO signal is inverted before use as the
HSYNCO output
VOINV:
0: The IVO signal is used directly as the VSYNCO
output
1: The IVO signal is inverted before use as the
VSYNCO output
CLOINV:
0: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
used directly as the CLAMPO output
1: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
inverted before use as the CLAMPO output
CBOINV:
0: The CBLANK signal is used directly as the
CBLANK output
1: The CBLANK signal is inverted before use as the
CBLANK output
Summary of Contents for H8S/2158
Page 10: ...Rev 3 00 Jan 25 2006 page viii of lii...
Page 36: ...Rev 3 00 Jan 25 2006 page xxxiv of lii B Product Lineup 863 C Package Dimensions 864 Index 865...
Page 47: ...Rev 3 00 Jan 25 2006 page xlv of lii Appendix Figure C 1 Package Dimensions TBP 112A 864...
Page 54: ...Rev 3 00 Jan 25 2006 page lii of lii...
Page 70: ...Section 1 Overview Rev 3 00 Jan 25 2006 page 16 of 872 REJ09B0286 0300...
Page 118: ...Section 3 MCU Operating Modes Rev 3 00 Jan 25 2006 page 64 of 872 REJ09B0286 0300...
Page 126: ...Section 4 Exception Handling Rev 3 00 Jan 25 2006 page 72 of 872 REJ09B0286 0300...
Page 198: ...Section 6 Bus Controller Rev 3 00 Jan 25 2006 page 144 of 872 REJ09B0286 0300...
Page 326: ...Section 10 8 Bit PWM Timer PWM Rev 3 00 Jan 25 2006 page 272 of 872 REJ09B0286 0300...
Page 440: ...Section 15 Watchdog Timer WDT Rev 3 00 Jan 25 2006 page 386 of 872 REJ09B0286 0300...
Page 606: ...Section 17 I 2 C Bus Interface IIC Rev 3 00 Jan 25 2006 page 552 of 872 REJ09B0286 0300...
Page 742: ...Section 19 Multimedia Card Interface MCIF Rev 3 00 Jan 25 2006 page 688 of 872 REJ09B0286 0300...
Page 750: ...Section 21 D A Converter Rev 3 00 Jan 25 2006 page 696 of 872 REJ09B0286 0300...
Page 768: ...Section 22 A D Converter Rev 3 00 Jan 25 2006 page 714 of 872 REJ09B0286 0300...
Page 770: ...Section 23 RAM Rev 3 00 Jan 25 2006 page 716 of 872 REJ09B0286 0300...
Page 824: ...Section 26 Clock Pulse Generator Rev 3 00 Jan 25 2006 page 770 of 872 REJ09B0286 0300...
Page 844: ...Section 27 Power Down Modes Rev 3 00 Jan 25 2006 page 790 of 872 REJ09B0286 0300...
Page 878: ...Section 28 List of Registers Rev 3 00 Jan 25 2006 page 824 of 872 REJ09B0286 0300...
Page 926: ...Index Rev 3 00 Jan 25 2006 page 872 of 872 REJ09B0286 0300...