Section 16 Serial Communication Interface (SCI, IrDA, and CRC)
Rev. 3.00 Jan 25, 2006 page 414 of 872
REJ09B0286-0300
Bit
Bit Name
Initial Value
R/W
Description
3
2
1
0
ACS4
ACS2
ACS1
ACS0
0
0
0
0
R/W
R/W
R/W
R/W
Asynchronous Mode Clock Source Select
These bits specify the clock source and the average
transfer rate in asynchronous mode.
These bits are valid only when external clock is
supplied in asynchronous mode.
0000: Normal operation with external clock input and
average transfer rate operation not used
(operated using the basic clock with a
frequency 16 or 8 times the transfer clock
frequency)
0001: Average transfer rate operation at 115.152
kbps when the system clock frequency is
10.667 MHz (operated using the basic clock
with a frequency 16 times the transfer clock
frequency)
0010: Average transfer rate operation at 460.606
kbps when the system clock frequency is
10.667 MHz (operated using the basic clock
with a frequency 8 times the transfer clock
frequency)
0011: Reserved
0100: Reserved
0101: Average transfer rate operation at 115.196
kbps when the system clock frequency is 16
MHz (operated using the basic clock with a
frequency 16 times the transfer clock
frequency)
0110: Average transfer rate operation at 460.784
kbps when the system clock frequency is 16
MHz (operated using the basic clock with a
frequency 16 times the transfer clock
frequency)
0111: Average transfer rate operation at 720 kbps
when the system clock frequency is 16 MHz
(operated using the basic clock with a
frequency 8 times the transfer clock
frequency)
Summary of Contents for H8S/2158
Page 10: ...Rev 3 00 Jan 25 2006 page viii of lii...
Page 36: ...Rev 3 00 Jan 25 2006 page xxxiv of lii B Product Lineup 863 C Package Dimensions 864 Index 865...
Page 47: ...Rev 3 00 Jan 25 2006 page xlv of lii Appendix Figure C 1 Package Dimensions TBP 112A 864...
Page 54: ...Rev 3 00 Jan 25 2006 page lii of lii...
Page 70: ...Section 1 Overview Rev 3 00 Jan 25 2006 page 16 of 872 REJ09B0286 0300...
Page 118: ...Section 3 MCU Operating Modes Rev 3 00 Jan 25 2006 page 64 of 872 REJ09B0286 0300...
Page 126: ...Section 4 Exception Handling Rev 3 00 Jan 25 2006 page 72 of 872 REJ09B0286 0300...
Page 198: ...Section 6 Bus Controller Rev 3 00 Jan 25 2006 page 144 of 872 REJ09B0286 0300...
Page 326: ...Section 10 8 Bit PWM Timer PWM Rev 3 00 Jan 25 2006 page 272 of 872 REJ09B0286 0300...
Page 440: ...Section 15 Watchdog Timer WDT Rev 3 00 Jan 25 2006 page 386 of 872 REJ09B0286 0300...
Page 606: ...Section 17 I 2 C Bus Interface IIC Rev 3 00 Jan 25 2006 page 552 of 872 REJ09B0286 0300...
Page 742: ...Section 19 Multimedia Card Interface MCIF Rev 3 00 Jan 25 2006 page 688 of 872 REJ09B0286 0300...
Page 750: ...Section 21 D A Converter Rev 3 00 Jan 25 2006 page 696 of 872 REJ09B0286 0300...
Page 768: ...Section 22 A D Converter Rev 3 00 Jan 25 2006 page 714 of 872 REJ09B0286 0300...
Page 770: ...Section 23 RAM Rev 3 00 Jan 25 2006 page 716 of 872 REJ09B0286 0300...
Page 824: ...Section 26 Clock Pulse Generator Rev 3 00 Jan 25 2006 page 770 of 872 REJ09B0286 0300...
Page 844: ...Section 27 Power Down Modes Rev 3 00 Jan 25 2006 page 790 of 872 REJ09B0286 0300...
Page 878: ...Section 28 List of Registers Rev 3 00 Jan 25 2006 page 824 of 872 REJ09B0286 0300...
Page 926: ...Index Rev 3 00 Jan 25 2006 page 872 of 872 REJ09B0286 0300...