Renesas H8S/2158, User Manual

Page: 310 / 929

Section 9 I/O Ports
Rev. 3.00 Jan 25, 2006 page 256 of 872
REJ09B0286-0300
•
PA0/A16/
KIN8
/SSE0I
The function of port A pins is switched as shown below according to the combination of the
SSE bit in SEMR of SCI_0, the C/
A
bit in SMR, the CKE1 bit in SCR, the CS256E and IOSE
bits in SYSCR, the ADFULLE bit in BCR2 of BSC, and the PA0DDR bit.
Address 13 in the following table is expressed by the following logical expression:
Address 13 = 1:
ADFULLE
⋅⋅⋅⋅
CS256E
⋅⋅⋅⋅
IOSE
When the KMIM8 bit in KMIMRA of the interrupt controller is cleared to 0, this pin can be
used as the
KIN8
input pin. To use this pin as the
KIN8
input pin, clear the PA0DDR bit to 0.
SSE 0 1
C/
A
— 1
CKE1 — 1
PA0DDR 0 1 1 —
Address 13 1 0 —
PA0 input pin PA0 output pin A16 output pin SSE0I Pin function
KIN8
input pin
Note: Even if SSE = 0, PA0DDR = 1 and CPCSE = 1, pin PA0 can be used as an output pin only
when IOSE = 1.
Single-Chip Mode and Extended Mode (Mode 3):
•
PA1/
KIN9
/SSE2I
The function of port A pins is switched as shown below according to the combination of the
SSE bit in SEMR of SCI_2, the C/
A
bit in SMR, the CKE1 bit in SCR, and the PA1DDR bit.
When the KMIM9 bit in KMIMRA of the interrupt controller is cleared to 0, this pin can be
used as the
KIN9
input pin. To use this pin as the
KIN9
input pin, clear the PA1DDR bit to 0.
SSE 0 1
C/
A
— 1
CKE1 — 1
PA1DDR 0 1 —
PA1 input pin PA1 output pin SSE2I Pin function
KIN9
input pin