Renesas H8S/2158, User Manual

Page: 442 / 929

Section 16 Serial Communication Interface (SCI, IrDA, and CRC)
Rev. 3.00 Jan 25, 2006 page 388 of 872
REJ09B0286-0300
Asynchronous Mode:
•
Data length: 7 or 8 bits
•
Stop bit length: 1 or 2 bits
•
Parity: Even, odd, or none
•
Receive error detection: Parity, overrun, and framing errors
•
Break detection: Break can be detected by reading the RxD pin level directly in case of a
framing error
•
Average transfer rate generator (SCI_0 and SCI_2): 460.606 kbps or 115.152 kbps selectable
at 10.667-MHz operation; 720 kbps, 460.784 kbps, 230.392 kbps, or 115.196 kbps selectable
at 16- or 24-MHz operation; and 230.392 kbps or 115.196 kbps selectable at 20-MHz
operation
Clocked Synchronous Mode:
•
Data length: 8 bits
•
Receive error detection: Overrun errors
•
SCI channel selectable (SCI_0 and SCI_2): When SSE0I = 1, TxD0 = high-impedance state
and SCK0 = fixed to high input; when SSE2I = 1, TxD2 = high-impedance state and SCK2 =
fixed to high input
Smart Card Interface:
•
An error signal can be automatically transmitted on detection of a parity error during reception
•
Data can be automatically re-transmitted on detection of a error signal during transmission
•
Both direct convention and inverse convention are supported
Figure 16.1 shows a block diagram of SCI_1, and figure 16.2 shows a block diagram of SCI_0 and
SCI_2.