Section 22 A/D Converter
Rev. 3.00 Jan 25, 2006 page 703 of 872
REJ09B0286-0300
22.3.4
Keyboard Comparator Control Register (KBCOMP)
KBCOMP selects the CIN input channel for which A/D conversion is performed and enables or
disables the comparator scan function of CIN7 to CIN0.
The DTC decides where to store the A/D conversion result according to settings of the KBCH2 to
KBCH0 bits.
Bit
Bit Name
Initial Value
R/W
Description
7
—
0
R/(W) Reserved
The initial value should not be changed.
6, 5 —
All 0
R
Reserved
These bits are always read as 0 and cannot be
modified.
4
SCANE
0
R/W
DTC Comparator Scan Enable
Enables or disables the DTC comparator scan function.
0: Disables DTC comparator scan function
1: Enables DTC comparator scan function
3
KBADE
0
R/W
Keyboard A/D Enable
Sets analog pin 0 (AN0) of the A/D converter to digital
input pins (CIN7 to CIN0).
0: Selects AN0 (not mounted on this LSI)
1: Selects CIN7 to CIN0
2
1
0
KBCH2
KBCH1
KBCH0
0
0
0
R/W
R/W
R/W
Keyboard A/D Channel Select 2 to 0
These bits select a channel of digital input pins (CIN7 to
CIN0) for A/D conversion. The input channel setting
must be made while conversion is halted. When the
SCANE bit is set to 1, these bits are automatically
incremented by the DTC.
000: Selects CIN0
001: Selects CIN1
010: Selects CIN2
011: Selects CIN3
100: Selects CIN4
101: Selects CIN5
110: Selects CIN6
111: Selects CIN7
Summary of Contents for H8S/2158
Page 10: ...Rev 3 00 Jan 25 2006 page viii of lii...
Page 36: ...Rev 3 00 Jan 25 2006 page xxxiv of lii B Product Lineup 863 C Package Dimensions 864 Index 865...
Page 47: ...Rev 3 00 Jan 25 2006 page xlv of lii Appendix Figure C 1 Package Dimensions TBP 112A 864...
Page 54: ...Rev 3 00 Jan 25 2006 page lii of lii...
Page 70: ...Section 1 Overview Rev 3 00 Jan 25 2006 page 16 of 872 REJ09B0286 0300...
Page 118: ...Section 3 MCU Operating Modes Rev 3 00 Jan 25 2006 page 64 of 872 REJ09B0286 0300...
Page 126: ...Section 4 Exception Handling Rev 3 00 Jan 25 2006 page 72 of 872 REJ09B0286 0300...
Page 198: ...Section 6 Bus Controller Rev 3 00 Jan 25 2006 page 144 of 872 REJ09B0286 0300...
Page 326: ...Section 10 8 Bit PWM Timer PWM Rev 3 00 Jan 25 2006 page 272 of 872 REJ09B0286 0300...
Page 440: ...Section 15 Watchdog Timer WDT Rev 3 00 Jan 25 2006 page 386 of 872 REJ09B0286 0300...
Page 606: ...Section 17 I 2 C Bus Interface IIC Rev 3 00 Jan 25 2006 page 552 of 872 REJ09B0286 0300...
Page 742: ...Section 19 Multimedia Card Interface MCIF Rev 3 00 Jan 25 2006 page 688 of 872 REJ09B0286 0300...
Page 750: ...Section 21 D A Converter Rev 3 00 Jan 25 2006 page 696 of 872 REJ09B0286 0300...
Page 768: ...Section 22 A D Converter Rev 3 00 Jan 25 2006 page 714 of 872 REJ09B0286 0300...
Page 770: ...Section 23 RAM Rev 3 00 Jan 25 2006 page 716 of 872 REJ09B0286 0300...
Page 824: ...Section 26 Clock Pulse Generator Rev 3 00 Jan 25 2006 page 770 of 872 REJ09B0286 0300...
Page 844: ...Section 27 Power Down Modes Rev 3 00 Jan 25 2006 page 790 of 872 REJ09B0286 0300...
Page 878: ...Section 28 List of Registers Rev 3 00 Jan 25 2006 page 824 of 872 REJ09B0286 0300...
Page 926: ...Index Rev 3 00 Jan 25 2006 page 872 of 872 REJ09B0286 0300...