Section 27 Power-Down Modes
Rev. 3.00 Jan 25, 2006 page 771 of 872
REJ09B0286-0300
Section 27 Power-Down Modes
For operating modes after the reset state is cancelled, this LSI has not only the normal program
execution state but also seven power-down modes in which power consumption is significantly
reduced. In addition, there is also module stop mode in which reduced power consumption can be
achieved by individually stopping on-chip peripheral modules.
•
Medium-speed mode
System clock frequency for the CPU operation can be selected as
φ
/2,
φ
/4,
φ
/8,
φ
/16,or
φ
/32.
•
Subactive mode
The CPU operates based on the subclock and on-chip peripheral modules other than TMR_0,
TMR_1, WDT_0, and WDT_1 stop operating.
•
Sleep mode
The CPU stops but on-chip peripheral modules continue operating.
•
Subsleep mode
The CPU and on-chip peripheral modules other than TMR_0 , TMR_1, WDT_0, and WDT_1
stop operating.
•
Watch mode
The CPU and on-chip peripheral modules other than WDT_1 stop operating.
•
Software standby mode
Clock oscillation stops, and the CPU and on-chip peripheral modules stop operating.
•
Hardware standby mode
Clock oscillation stops, and the CPU and on-chip peripheral modules enter reset state.
•
Module stop mode
Independently of above operating modes, on-chip peripheral modules that are not used can be
stopped individually.
LPWS263A_000020020300
Summary of Contents for H8S/2158
Page 10: ...Rev 3 00 Jan 25 2006 page viii of lii...
Page 36: ...Rev 3 00 Jan 25 2006 page xxxiv of lii B Product Lineup 863 C Package Dimensions 864 Index 865...
Page 47: ...Rev 3 00 Jan 25 2006 page xlv of lii Appendix Figure C 1 Package Dimensions TBP 112A 864...
Page 54: ...Rev 3 00 Jan 25 2006 page lii of lii...
Page 70: ...Section 1 Overview Rev 3 00 Jan 25 2006 page 16 of 872 REJ09B0286 0300...
Page 118: ...Section 3 MCU Operating Modes Rev 3 00 Jan 25 2006 page 64 of 872 REJ09B0286 0300...
Page 126: ...Section 4 Exception Handling Rev 3 00 Jan 25 2006 page 72 of 872 REJ09B0286 0300...
Page 198: ...Section 6 Bus Controller Rev 3 00 Jan 25 2006 page 144 of 872 REJ09B0286 0300...
Page 326: ...Section 10 8 Bit PWM Timer PWM Rev 3 00 Jan 25 2006 page 272 of 872 REJ09B0286 0300...
Page 440: ...Section 15 Watchdog Timer WDT Rev 3 00 Jan 25 2006 page 386 of 872 REJ09B0286 0300...
Page 606: ...Section 17 I 2 C Bus Interface IIC Rev 3 00 Jan 25 2006 page 552 of 872 REJ09B0286 0300...
Page 742: ...Section 19 Multimedia Card Interface MCIF Rev 3 00 Jan 25 2006 page 688 of 872 REJ09B0286 0300...
Page 750: ...Section 21 D A Converter Rev 3 00 Jan 25 2006 page 696 of 872 REJ09B0286 0300...
Page 768: ...Section 22 A D Converter Rev 3 00 Jan 25 2006 page 714 of 872 REJ09B0286 0300...
Page 770: ...Section 23 RAM Rev 3 00 Jan 25 2006 page 716 of 872 REJ09B0286 0300...
Page 824: ...Section 26 Clock Pulse Generator Rev 3 00 Jan 25 2006 page 770 of 872 REJ09B0286 0300...
Page 844: ...Section 27 Power Down Modes Rev 3 00 Jan 25 2006 page 790 of 872 REJ09B0286 0300...
Page 878: ...Section 28 List of Registers Rev 3 00 Jan 25 2006 page 824 of 872 REJ09B0286 0300...
Page 926: ...Index Rev 3 00 Jan 25 2006 page 872 of 872 REJ09B0286 0300...