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Omron CJ1G-CPUxx, Instructions Manual

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791

High-speed Counter/Pulse Output Instructions

Section 3-21

Description

PLS2(887) starts pulse output on the port specified in P using the mode spec-
ified in M at the start frequency specified in F (1 in diagram). The frequency is
increased every pulse control period (4 ms) at the acceleration rate specified
in S until the target frequency specified in S is reached (2 in diagram). When
the target frequency has been reached, acceleration is stopped and pulse
output continues at a constant speed (3 in diagram). 

The deceleration point is calculated from the number of output pulses and
deceleration rate set in S and when that point is reached, the frequency is
decreased every pulse control period (4 ms) at the deceleration rate specified
in S until the starting frequency specified in S is reached, at which point pulse
output is stopped (4 in diagram).

Pulse output is started each time PLS2(887) is executed. It is thus normally
sufficient to use the differentiated version (@PLS2(887)) of the instruction or
an execution condition that is turned ON only for one scan. 

PLS2(887) can be used only for positioning. 

With the CJ1M CPU Units, PLS2(887) can be executed during pulse output
for ACC(888) in either independent or continuous mode, and during accelera-
tion, constant speed, or deceleration. (See note.) ACC(888) can also be exe-
cuted during pulse output for PLS2(887) during acceleration, constant speed,
or deceleration.

Note Executing PLS2(887) during speed control with ACC(888) (continuous mode)

with the same target frequency as ACC(888) and an acceleration rate of 0 can
be used to achieved interrupt feeding of a fixed distance. 

Index Registers

---

---

---

---

Indirect addressing 
using Index Registers

---

---

,IR0 to ,IR15

–2048 to +2047 ,IR0 to 
–2048 to +2047 ,IR15

DR0 to DR15, IR0 to IR15

,IR0+(++) to ,IR15+(++)

,–(– –)IR0 to, –(– –)IR15

,IR0 to ,IR15

–2048 to +2047 ,IR0 to 
–2048 to +2047 ,IR15

DR0 to DR15, IR0 to IR15

,IR0+(++) to ,IR15+(++)

,–(– –)IR0 to, –(– –)IR15

Area

P

M

S

F

Target frequency

Starting frequency

A

B

C

D

Time

PLS2(887) executed.

Pulse frequency

Summary of Contents for CJ1G-CPUxx

Page 1: ...INSTRUCTIONS REFERENCE MANUAL Cat No W340 E1 08 SYSMAC CS Series CS1G H CPU EV1 CS1G H CPU H CS1D CPU H SYSMAC CJ Series CJ1G CPU CJ1G H CPU H CJ1M CPU Programmable Controllers ...

Page 2: ...SYSMAC CS Series CS1G H CPU EV1 CS1G H CPU H CS1D CPU H SYSMAC CJ Series CJ1G CPU CJ1G H CPU H CJ1M CPU Programmable Controllers Instructions Reference Manual Revised September 2002 ...

Page 3: ...iv N o t i c e ...

Page 4: ...breviated Wd in documentation in this sense The abbreviation PLC means Programmable Controller PC is used however in some Program ming Device displays to mean Programmable Controller Visual Aids The following headings appear in the left column of the manual to help you locate different types of information Note Indicates information of particular interest for efficient and convenient opera tion of...

Page 5: ...vi ...

Page 6: ...d Layout of Instruction Descriptions 137 3 2 Instruction Upgrades and New Instructions 140 3 3 Sequence Input Instructions 142 3 4 Sequence Output Instructions 166 3 5 Sequence Control Instructions 186 3 6 Timer and Counter Instructions 205 3 7 Comparison Instructions 246 3 8 Data Movement Instructions 279 3 9 Data Shift Instructions 308 3 10 Increment Decrement Instructions 356 3 11 Symbol Math I...

Page 7: ... MSG 046 913 3 28 Clock Instructions 916 3 29 Debugging Instructions 930 3 30 Failure Diagnosis Instructions 934 3 31 Other Instructions 959 3 32 Block Programming Instructions 978 3 33 Text String Processing Instructions 1012 3 34 Task Control Instructions 1045 SECTION 4 Instruction Execution Times and Number of Steps 1053 4 1 CS series Instruction Execution Times and Number of Steps 1055 4 2 CJ ...

Page 8: ... lists of instructions that can be used for reference Section 3 individually describes the instructions in the CS CJ series instruction set Section 4 provides instruction execution times and the number of steps for each CS CJ series instruc tion Unit CS Series CJ Series CPU Units CS1 H CPU Units CS1H CPU H CS1G CPU H CJ1 H CPU Units CJ1H CPU H CJ1G CPU H CS1 CPU Units CS1H CPU EV1 CS1G CPU EV1 CS1...

Page 9: ...soles Operation Manual W341 Provides information on how to program and operate CS CJ series PLCs using a Programming Console SYSMAC CS CJ Series CS1G H CPU EV1 CS1G H CPU H CJ1M CPU CJ1G CPU CJ1G H CPU H CS1W SCB21 41 CS1W SCU21 CJ1W SCU41 Communications Commands Reference Manual W342 Describes the C series Host Link and FINS communications commands used with CS CJ series PLCs SYSMAC WS02 CXP E CX...

Page 10: ...le Controllers You must read this section and understand the information contained before attempting to set up or operate a PLC system 1 Intended Audience xii 2 General Precautions xii 3 Safety Precautions xii 4 Operating Environment Precautions xiv 5 Application Precautions xiv 6 Conformance to EC Directives xix 6 1 Applicable Directives xix 6 2 Concepts xix 6 3 Conformance to EC Directives xix 6...

Page 11: ... sure to read this manual before attempting to use the Unit and keep this man ual close at hand for reference during operation WARNING It is extremely important that a PLC and all PLC Units be used for the speci fied purpose and under the specified conditions especially in applications that can directly or indirectly affect human life You must consult with your OMRON representative before applying...

Page 12: ...C is over loaded or short circuited the voltage may drop and result in the outputs being turned OFF As a countermeasure for such problems external safety measures must be provided to ensure safety in the system Caution Confirm safety before transferring data files stored in the file memory Mem ory Card or EM file memory to the I O area CIO of the CPU Unit using a peripheral tool Otherwise the devi...

Page 13: ...f the PLC System can have a large effect on the longevity and reliability of the system Improper operating environments can lead to malfunction failure and other unforeseeable problems with the PLC System Be sure that the operating environment is within the specified condi tions at installation and remains within the specified conditions during the life of the system 5 Application Precautions Obse...

Page 14: ...bits and flags for PLC Link Units are also allocated to I O Units which can occur even if automatic allocation is used the PLC Link Units and I O Units may both exhibit faulty operation WARNING Always heed these precautions Failure to abide by the following precautions could lead to serious or possibly fatal injury Always connect to a ground of 100 Ω or less when installing the Units Not connectin...

Page 15: ...when the CX Programmer is used the remaining data will be written to the EM Area Always turn ON power to the PLC before turning ON power to the control system If the PLC power supply is turned ON after the control power sup ply temporary errors may result in control system signals because the output terminals on DC Output Units and other Units will momentarily turn ON when power is turned ON to th...

Page 16: ...n excess of the maximum switching capacity Excess voltage or loads may result in burning Disconnect the functional ground terminal when performing withstand voltage tests Not disconnecting the functional ground terminal may result in burning Install the Units properly as specified in the operation manuals Improper installation of the Units may result in malfunction With CS series PLCs be sure that...

Page 17: ... CIF11 Adapter The external device or the CPU Unit may be damaged When replacing parts be sure to confirm that the rating of a new part is correct Not doing so may result in malfunction or burning Before touching a Unit be sure to first touch a grounded metallic object in order to discharge any static build up Not doing so may result in malfunc tion or damage When transporting or storing circuit b...

Page 18: ... depending on the configuration wiring and other conditions of the equipment or control panel on which the OMRON devices are installed The customer must therefore perform the final check to confirm that devices and the overall machine conform to EMC standards Note Applicable EMC Electromagnetic Compatibility standards are as follows EMS Electromagnetic Susceptibility EN61131 2 CS series EN61000 6 ...

Page 19: ...e PLC included is more than 5 times per minute Countermeasure Examples When switching an inductive load connect an surge protector diodes etc in parallel with the load or contact as shown below Circuit Current Characteristic Required element AC DC Yes Yes If the load is a relay or solenoid there is a time lag between the moment the circuit is opened and the moment the load is reset If the supply v...

Page 20: ...he load current The reversed dielectric strength value of the diode may be two to three times larger than the supply voltage if the surge protector is applied to electronic circuits with low circuit voltages Yes Yes The varistor method prevents the impo sition of high voltage between the con tacts by using the constant voltage characteristic of the varistor There is time lag between the moment the...

Page 21: ...xxii Conformance to EC Directives 6 ...

Page 22: ... 1 General Instruction Characteristics 2 1 1 1 Program Capacity 2 1 1 2 Differentiated Instructions 3 1 1 3 Instruction Variations 4 1 1 4 Instruction Location and Execution Conditions 5 1 1 5 Inputting Data in Operands 5 1 1 6 Data Formats 10 1 2 Instruction Execution Checks 12 1 2 1 Errors Occurring at Instruction Execution 12 1 2 2 Fatal Errors Program Errors 12 ...

Page 23: ... maximum number of steps that can be pro grammed in each CJ series CPU Unit CJ1 H CPU Units Model Program capacity I O points CS1H CPU67H 250K steps 5 120 CS1H CPU66H 120K steps CS1H CPU65H 60K steps CS1H CPU64H 30K steps CS1H CPU63H 20K steps CS1G CPU45H 60K steps CS1G CPU44H 30K steps 1 280 CS1G CPU43H 20K steps 960 CS1G CPU42H 10K steps Model Program capacity I O points CS1H CPU67 E 250K steps ...

Page 24: ...ructions require up to 7 steps each The number of steps required by an instruction is also increased by one step for each double length operand used in it For example MOVL 498 normally requires 3 steps but 4 steps will be required if a constant is specified for the source word oper and S Refer to SECTION 4 Instruction Execution Times and Number of Steps for the number of steps required for each in...

Page 25: ...ry cycle The execution con dition is true for one cycle when the result goes from OFF to ON Downwardly differentiated with prefix Output instructions The instruction is exe cuted just once when the execution condition goes from ON to OFF Input instructions instructions used as execution conditions The bit processing such as read comparison or test is performed every cycle The execution con dition ...

Page 26: ...oper ands and numbers Note An instruction s operands may also be referred to by their position in the instruction first operand second operand The codes used for the oper and vary with the specific function of the operand Instruction type Location Execution condition Format Examples Input Instructions that start logic conditions At the left bus or at the start of an instruction block Not required ...

Page 27: ..._00000 and E0_32767 in EM bank 0 is specified To specify a bit address specify the word address and bit address directly Bit number Word address Note The word address bit number format is not used for Timer Counter Completion Flags or Task Flags 0001 02 Bit 02 Word CIO 0001 02 0001 To specify a word address specify the word address directly Word address 0003 Word CIO 0003 D00200 Word D00200 When t...

Page 28: ...fying Indirect DM EM Addresses in BCD Mode When the contents of En _ is between 0000 and 7FFF 00000 to 32 767 the corre sponding word between En _00000 and En _32767 is specified MOV 0001 E1_00200 When the contents of En _ is between 8000 and FFFF 32 768 to 65 535 the corre sponding word between E 1 _00000 and E 1 _32767 in the next EM bank is specified Description Example Instruction example E1_0...

Page 29: ...dds 31 to the I O memory address contained in IR1 and moves 0001 to the word at that address DR offset The signed binary content of the Data Register is added to the I O memory address contained in IR and the resulting address is used as the operand DR0 IR0 DR0 IR1 LD DR0 IR0 Adds the content of DR0 to the I O memory address contained in IR0 and loads the status of the bit at that address MOV 0001...

Page 30: ...8 to 2 147 483 647 Unsigned decimal 0 to 4 294 967 295 All BCD data and BCD data within a range BCD 0000 0000 to 9999 9999 Method Description Code Examples Instruction example Text strings Text is stored in ASCII 1 byte character excluding special characters starting with the lower byte of the lowest word in the range If there is an odd number of characters 00 NULL is stored in the higher byte of ...

Page 31: ...to 9999 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20 23 22 21 20 23 22 21 20 23 22 21 20 23 22 21 20 32768 512 256 128 64 32 16 8 4 2 1 16384 8192 4096 2048 1024 Binary Decimal Hexa decimal Sign bit 0 Positive 1 Negative 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20 23 22 21 20 23 22 21 20 23 22 21 20 23 2...

Page 32: ...onforms to IEEE754 standards for single precision floating point data and is used only with instructions that convert or calculate floating point data It can be used to set or monitor from the I O memory Edit and Monitor Screen on the CX Programmer not supported by the Programming Consoles As such users do not need to know this format although they do need to know that the formatting takes up two ...

Page 33: ...tion will stop when an Access Error occurs Illegal Instruction Error The Illegal Instruction Error Flag A29514 will be turned ON and program execution will stop when this error occurs UM User Program Memory Overflow Error The UM Overflow Error Flag A29515 will be turned ON and program execu tion will stop when this error occurs 1 2 2 Fatal Errors Program Errors Program execution will be stopped wh...

Page 34: ...cess error 1 Reading writing to the parameter area 2 Writing to memory that is not installed 3 Reading writing to an EM bank that is EM file memory 4 Writing to a read only area 5 The contents of a DM EM word wasn t BCD although the PLC is set for BCD indirect addressing If the PLC Setup has been set to treat instruction errors as fatal errors program errors the Illegal Access Error Flag A29510 wi...

Page 35: ......

Page 36: ...ns 62 2 2 14 Double precision Floating point Instructions 66 2 2 15 Table Data Processing Instructions 70 2 2 16 Data Control Instructions 74 2 2 17 Subroutine Instructions 77 2 2 18 Interrupt Control Instructions 78 2 2 19 High speed Counter and Pulse Output Instructions CJ1M CPU22 23 Only 80 2 2 20 Step Instructions 82 2 2 21 Basic I O Unit Instructions 82 2 2 22 Serial Communications Instructio...

Page 37: ...instructions Input LD LOAD LD NOT LOAD NOT AND AND AND NOT AND NOT OR OR OR NOT OR NOT AND LD AND LOAD OR LD OR LOAD Output OUT OUTPUT OUT NOT OUTPUT NOT Sequence input instructions NOT NOT UP CONDITION ON DOWN CONDITION OFF Bit test LD TST LD BIT TEST LD TSTN LD BIT TEST NOT AND TST AND BIT TEST NOT AND TSTN AND BIT TEST NOT OR TST OR BIT TEST OR TSTN OR BIT TEST NOT Sequence output instructions ...

Page 38: ... ble word unsigned LD AND OR S Symbol comparison signed LD AND OR SL Symbol com parison dou ble word signed Data comparison Condition Flags CMP UNSIGNED COMPARE CMPL DOUBLE UNSIGNED COMPARE CPS SIGNED BINARY COMPARE CPSL DOUBLE SIGNED BINARY COMPARE ZCP AREARANGE COMPARE ZCPL DOUBLE AREA RANGE COMPARE Table compare MCMP MULTIPLE COMPARE TCMP TABLE COM PARE BCMP UNSIGNED BLOCK COM PARE BCMP2 EXPAND...

Page 39: ...IGHT RORL DOUBLE ROTATE RIGHT RRNC ROTATE RIGHT WITH OUT CARRY RRNL DOUBLE ROTATE RIGHT WITH OUT CARRY 1 digit shift SLD ONE DIGIT SHIFT LEFT SRD ONE DIGIT SHIFT RIGHT Shift n bit data NSFL SHIFT N BIT DATA LEFT NSFR SHIFT N BIT DATA RIGHT Shift n bit NASL SHIFT N BITS LEFT NSLL DOUBLE SHIFT N BITS LEFT NASR SHIFT N BITS RIGHT NSRL DOUBLE SHIFT N BITS RIGHT Increment decrement instructions BCD B I...

Page 40: ...C SIGNED BINARY SUBTRACT WITH CARRY CL DOUBLE SIGNED BINARY WITH CARRY BCD subtract B BCD SUBTRACT WITHOUT CARRY BL DOUBLE BCD SUBTRACT WITHOUT CARRY BC BCD SUBTRACT WITH CARRY BCL DOUBLE BCD SUBTRACT WITH CARRY Binary multiply SIGNED BINARY MULTIPLY L DOUBLE SIGNED BINARY MULTIPLY U UNSIGNED BINARY MULTIPLY UL DOUBLE UNSIGNED BINARY MULTIPLY BCD multiply B BCD MULTIPLY BL DOUBLE BCD MULTIPLY Bina...

Page 41: ...NRL DOUBLE EXCLUSIVE NOR Complement COM COMPLE MENT COML DOUBLE COMPLE MENT Special math instructions ROTB BINARY ROOT ROOT BCDSQUARE ROOT APR ARITHMETIC PROCESS FDIV FLOATING POINT DIVIDE BCNT BIT COUNTER Floating point math instructions Floating point binary convert FIX FLOATING TO 16 BIT FIXL FLOATING TO 32 BIT FLT 16 BIT TO FLOATING FLTL 32 BIT TO FLOATING Floating point basic math F FLOATING ...

Page 42: ...ocessing SSET SET STACK PUSH PUSH ONTO STACK LIFO LAST IN FIRST OUT FIFO FIRST IN FIRST OUT SNUM STACK SIZE READ SREAD STACK DATA READ SWRIT STACK DATA OVERWRITE SINS STACK DATA INSERT SDEL STACK DATA DELETE 1 record multiple word pro cessing DIM DIMENSION RECORD TABLE SETR SETRECORD LOCATION GETR GET RECORD NUMBER Record to word processing SRCH DATA SEARCH MAX FIND MAXIMUM MIN FIND MINIMUM SUM SU...

Page 43: ...work instructions SEND NETWORK SEND RECV NETWORK RECEIVE CMND DELIVER COMMAND Display instructions MSG DISPLAY MESSAGE File mem ory instruc tions FREAD READ DATA FILE FWRIT WRITE DATA FILE Clock instructions CADD CALENDAR ADD CSUB CALENDAR SUBTRACT SEC HOURS TO SECONDS HMS SECONDS TO HOURS DATE CLOCK ADJUST MENT Debugging instructions TRSM TRACE MEMORY SAMPLING Failure diagnosis instructions FAL F...

Page 44: ...it_address ONE CYCLE AND WAIT NOT input_conditio n WAIT ONE CYCLE AND WAIT Timer counter BCD TIMW TIMER WAIT CNTW COUNTER WAIT TMHW HIGH SPEED TIMER WAIT Binary TIMWX TIMER WAIT CNTWX COUNTER WAIT TMHWX HIGH SPEED TIMER WAIT Repeat LOOP LOOP BLOCK LEND bit_address LOOP BLOCK END LEND NOT bit_address LOOP BLOCK END NOT input_conditio n LEND LOOP BLOCK END Text string processing instructions MOV MOV...

Page 45: ...D Takes a logical AND of the status of the specified operand bit and the current execution condition Continues on rung Required 146 AND NOT AND NOT AND NOT AND NOT AND NOT AND NOT AND NOT CS1 H CJ1 H CJ1M CPU Units only AND NOT AND NOT AND NOT AND NOT Reverses the status of the specified operand bit and takes a logical AND with the current execution condition Continues on rung Required 148 OR OR O...

Page 46: ...d ON when the bit is OFF Continues on rung Not required 163 BIT TEST AND TST 350 LD TST 350 AND TST 350 and OR TST 350 are used in the pro gram like LD AND and OR the execution condition is ON when the specified bit in the specified word is ON and OFF when the bit is OFF Continues on rung Required 163 BIT TEST AND TSTN 351 LD TSTN 351 AND TSTN 351 and OR TSTN 351 are used in the program like LD NO...

Page 47: ...ion condition Page OUTPUT OUT OUT Outputs the result execution condition of the logical processing to the specified bit Output Required 166 OUTPUT NOT OUT NOT OUT NOT Reverses the result execution condition of the logical processing and outputs it to the specified bit Output Required 167 KEEP KEEP KEEP 011 Output Required 168 DIFFERENTIATE UP DIFU DIFU 013 Output Required 173 Instruction Mnemonic ...

Page 48: ...unction Location Execution condition Page B Bit DIFD 014 B Execution condition Status of B One cycle DIFD 014 turns the designated bit ON for one cycle when the execution condition goes from ON to OFF falling edge B Bit SET B Execution condition of SET Status of B SET turns the operand bit ON when the execution condition is ON B Bit RSET B Execution condition of RSET Status of B RSET turns the ope...

Page 49: ... DM or EM word Output Required 180 SINGLE BIT OUTPUT CS1 H CJ1 H CJ1M or CS1D only OUTB OUTB OUTB OUTB 534 outputs the result execution condition of the logical pro cessing to the specified bit Unlike the OUT instruction OUTB 534 can be used to control a bit in a DM or EM word Output Required 184 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page D Word address N B...

Page 50: ... O refreshing End of the main program Indicates the end of a program END 001 completes the execution of a program for that cycle No instructions written after END 001 will be executed Execution proceeds to the program with the next task number When the program being executed has the highest task number in the program END 001 marks the end of the overall main program IL 002 Execution condition Inte...

Page 51: ...ram with the same jump number JMP 004 and JME 005 are used in pairs N Jump number JME 005 N N Jump number CJP 510 N Execution condition OFF Instructions executed Instructions jumped Instructions in this section are not executed and out put status is maintained The instruction execution time for these instructions is eliminated Execution condition ON The operation of CJP 510 is the basically the op...

Page 52: ...ns executed Instructions jumped Jumped instructions are processed as NOP 000 Instruction execution times are the same as NOP 000 Execution condition a OFF Execution condition b ON Instructions executed Instructions jumped Execution condition b OFF When the execution condition for JMP0 515 is OFF all instructions from JMP0 515 to the next JME0 516 in the program are processed as NOP 000 Use JMP0 51...

Page 53: ...2 are the same as those given above for TIMH 015 Output Required 216 N Timer number S Set value TIM N S Timer input Timer PV SV Completion Flag Timer input Timer PV SV Completion Flag TIM TIMX 550 operates a decrementing timer with units of 0 1 s The setting range for the set value SV is 0 to 999 9 s for BCD and 0 to 6 553 5 s for binary decimal or hexadecimal N Timer number S Set value TIMX 550 N...

Page 54: ...et input PV maintained Timing resumes TTIM 087 TTIMX 555 operates an incrementing timer with units of 0 1 s The setting range for the set value SV is 0 to 999 9 s for BCD and 0 to 6 553 5 s for binary decimal or hexadecimal N Timer number S Set value TTIMX 555 N S Timer input Reset input D1 Completion Flag D2 PV word S SV word TIML 542 D1 D2 S Timer input Timer PV SV Completion Flag Bit 00 of D1 T...

Page 55: ...s SV 2 SV 1 SV 0 0 Bit 2 Bit 1 Bit 0 MTIM 543 MTIMX 554 operates a 0 1 s incrementing timer with 8 independent SVs and Completion Flags The setting range for the set value SV is 0 to 999 9 s for BCD and 0 to 6 553 5 s for binary decimal or hexadecimal D1 Completion Flags D2 PV word S 1st SV word MTIMX 554 D1 D2 S N Counter number S Set value CNT N S Count input Reset input Count input Counter PV S...

Page 56: ...f 9999 Output Required 238 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page N Counter number S Set value CNTR 012 N S Incre ment input Reset input Decre ment input Increment input Counter PV Decrement input SV Counter PV Completion Flag 1 SV Counter PV Completion Flag 1 CNTR 012 CNTRX 548 operates a reversible counter N Counter number S Set value CNTRX 548 N S In...

Page 57: ...Signed LD AND OR S 302 307 312 317 322 327 S1 Comparison data 1 S2 Comparison data 2 Symbol comparison instructions signed compare two values con stants and or the contents of specified words in signed 16 bit binary 4 digit hexadecimal and create an ON execution condition when the com parison condition is true There are three types of symbol comparison instructions LD LOAD AND and OR LD Not requir...

Page 58: ...es constants and or the contents of specified words and outputs the result to the Arithmetic Flags in the Auxiliary Area S1 Comparison data 1 S2 Comparison data 2 CMPL 060 S1 S2 Unsigned binary comparison Arithmetic Flags S1 1 S2 1 Compares two double unsigned binary values constants and or the contents of specified words and outputs the result to the Arithmetic Flags in the Auxiliary Area S1 Comp...

Page 59: ...mpares the source data to the contents of 16 words and turns ON the corresponding bit in the result word when the contents are equal S Source data T 1st word of table R Result word BCMP 068 S T R Compares the source data to 16 ranges defined by 16 lower limits and 16 upper limits and turns ON the corresponding bit in the result word when the source data is within the range to T 3 1 0 14 15 to T 29...

Page 60: ... PARE CS1 H CJ1 H CJ1M or CS1D only ZCPL ZCPL 116 Compares the 32 bit unsigned binary value in CD and CD 1 word con tents or constant to the range defined by LL and UL and outputs the results to the Arithmetic Flags in the Auxiliary Area Output Required 277 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page CD Compare data 1 word LL Lower limit of range UL Upper li...

Page 61: ...ord of data to the specified word Source word Destination word Bit status not changed S 1st source word D 1st destination word MOVL 498 S D Transfers two words of data to the specified words S D Bit status not changed S 1 D 1 S Source D Destination MVN 022 S D Transfers the complement of a word of data to the specified word Source word Destination word Bit status inverted S 1st source word D 1st d...

Page 62: ...OVD 083 S C D Transfers the specified digit or digits Each digit is made up of 4 bits C Control word S 1st source word D 1st destination word XFRB 062 C S D Transfers the specified number of consecutive bits N Number of words S 1st source word D 1st destination word XFER 070 N S D S N 1 D N 1 to to N words Transfers the specified number of consecutive words S Source word St Starting word E End wor...

Page 63: ...ing an offset value to the base address Bs Source base address Of Offset D Destination word COLL 081 Bs Of D Bs Bs n Of Transfers the source word calculated by adding an offset value to the base address to the destination word S Source desired word or bit D Destination Index Register MOVR 560 S D Sets the internal I O memory address of the specified word bit or timer counter Completion Flag in the...

Page 64: ...es a shift register Status of data input for each shift input Lost E St 1 St 2 St C Control word St Starting word E End word SFTR 084 C St E Data input Shift direc tion Data input St E St E Creates a shift register that shifts data to either the right or the left C Control word St Starting word E End word ASFT 017 C St E St E St E Shift direction Shift enabled Clear Shift Shift Zero data Non zero ...

Page 65: ...SLL 570 Wd Wd Wd 1 Shifts the contents of Wd and Wd 1 one bit to the left Wd Word ASR 026 Wd Shifts the contents of Wd one bit to the right Wd Word ASRL 571 Wd Wd Wd 1 Shifts the contents of Wd and Wd 1 one bit to the right Wd Word ROL 027 Wd Shifts all Wd bits one bit to the left including the Carry Flag CY Wd Word ROLL 572 Wd Wd 1 Wd Shifts all Wd and Wd 1 bits one bit to the left including the ...

Page 66: ...f Wd shifts to the leftmost bit and to the Carry Flag CY Wd Word RRNL 577 Wd Wd 1 Wd Shifts all Wd and Wd 1 bits one bit to the right not including the Carry Flag CY The contents of the rightmost bit of Wd 1 is shifted to the leftmost bit of Wd and to the Carry Flag CY St Starting word E End word SLD 074 St E Lost E S t Shifts data by one digit 4 bits to the left St Starting word E End word SRD 07...

Page 67: ...fted in Shifts the specified 16 bits of word data to the left by the specified number of bits a or 0 D Shift word C Control word NSLL 582 D C Shift n bits Lost N bits Contents of a or 0 shifted in Shifts the specified 32 bits of word data to the left by the specified number of bits D Shift word C Control word NASR 581 D C Lost N bits Contents of a or 0 shifted in Shifts the specified 16 bits of wo...

Page 68: ...Wd Wd Increments the 4 digit hexadecimal content of the specified word by 1 Wd Word L 591 Wd Wd 1 Wd Wd 1 Wd Increments the 8 digit hexadecimal content of the specified words by 1 Wd Word 592 Wd Wd Wd Decrements the 4 digit hexadecimal content of the specified word by 1 Wd 1st word L 593 Wd Wd 1 Wd Wd 1 Wd Decrements the 8 digit hexadecimal content of the specified words by 1 Wd Word B 594 Wd Wd W...

Page 69: ... 1st addend word R 1st result word L 401 Au Ad R Adds 8 digit double word hexadecimal data and or constants Au 1 Ad 1 R 1 CY Au Ad R Signed binary Signed binary Signed binary CY will turn ON when there is a carry Au Augend word Ad Addend word R Result word C 402 Au Ad R Adds 4 digit single word hexadecimal data and or constants with the Carry Flag CY CY Au Ad R CY Signed binary Signed binary Signe...

Page 70: ...ord R Result word BC 406 Au Ad R Adds 4 digit single word BCD data and or constants with the Carry Flag CY CY Au Ad R CY BCD BCD BCD CY will turn ON when there is a carry Au 1st augend word Ad 1st addend word R 1st result word BCL 407 Au Ad R Adds 8 digit double word BCD data and or constants with the Carry Flag CY Au 1 Ad 1 R 1 CY Au Ad R CY BCD BCD BCD CY will turn ON when there is a carry Mi Mi...

Page 71: ...rrow Mi Minuend word Su Subtrahend word R Result word CL 413 Mi Su R Subtracts 8 digit double word hexadecimal data and or constants with the Carry Flag CY Mi 1 Su 1 R 1 CY Mi Su R CY Signed binary Signed binary Signed binary CY will turn ON when there is a borrow Mi Minuend word Su Subtrahend word R Result word B 414 Mi Su R Subtracts 4 digit single word BCD data and or constants Mi Su R CY BCD B...

Page 72: ... there is a borrow Md Multiplicand word Mr Multiplier word R Result word 420 Md Mr R Multiplies 4 digit signed hexadecimal data and or constants Md Mr R 1 R Signed binary Signed binary Signed binary Md 1st multiplicand word Mr 1st multiplier word R 1st result word L 421 Md Mr R Multiplies 8 digit signed hexadecimal data and or constants Md 1 Md Mr 1 Mr R 1 R R 3 R 2 Signed binary Signed binary Sig...

Page 73: ...esult word BL 425 Md Mr R Multiplies 8 digit double word BCD data and or constants Md 1 Md Mr 1 Mr R 1 R R 3 R 2 BCD BCD BCD Dd Dividend word Dr Divisor word R Result word 430 Dd Dr R Divides 4 digit single word signed hexadecimal data and or constants Dd Dr R 1 R Signed binary Signed binary Signed binary Remainder Quotient Dd 1st dividend word Dr 1st divisor word R 1st result word L 431 Dd Dr R D...

Page 74: ...UL 433 Dd Dr R Divides 8 digit double word unsigned hexadecimal data and or constants Dd 1 Dd Dr 1 Dr R 1 R R 3 R 2 Unsigned binary Unsigned binary Unsigned binary Remainder Quotient Dd Dividend word Dr Divisor word R Result word B 434 Dd Dr R Divides 4 digit single word BCD data and or constants Dd Dr R 1 R BCD BCD BCD Remainder Quotient Dd 1st dividend word Dr 1st divisor word R 1st result word ...

Page 75: ...IN R Converts a word of binary data to a word of BCD data S 1st source word R 1st result word BCDL 059 S R BIN BCD BIN BCD R R 1 Converts 8 digit hexadecimal 32 bit binary data to 8 digit BCD data S Source word R Result word NEG 160 S R Calculates the 2 s complement of a word of hexadecimal data 2 s complement Complement 1 S R S 1st source word R 1st result word NEGL 161 S R Calculates the 2 s com...

Page 76: ...bit decoding Bit m of R is turned ON C R R 1 l 1 Convert 2 bytes n 1 Start with first byte 8 to 256 bit decoding Bit m of R to R 15 is turned ON Two 16 word ranges sare used when l specifies 2 bytes C R 1 R 14 R 15 R 16 R 17 R 30 R 31 Reads the numerical value in the specified digit or byte in the source word turns ON the corresponding bit in the result word or 16 word range and turns OFF all othe...

Page 77: ...4 bit conversion 256 to 8 bit conversion l 1 Convert 2 words n 2 Start with digit 2 16 to 4 bit decoding Location of left most bit m is writ ten to R FInds leftmost bit Highest bit address C R l 0 Convert one 16 word range n 1 Start with byte 1 256 to 8 bit decoding The location of the leftmost bit in the 16 word range m is written to R Finds leftmost bit Highest bit address C R Leftmost bit Right...

Page 78: ...tination word LINE 063 S N D Converts a column of bits from a 16 word range the same bit number in 16 consecutive words to the 16 bits of the destination word 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0 0 1 Bit 15 Bit 00 S N 1 1 0 1 0 0 1 0 0 1 1 1 0 0 0 1 S 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 1 1 S 2 0 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 S 15 1 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 S 3 0 1 1 D 1 Bit 15 Bit 00 S Source word D 1st ...

Page 79: ...s one word of signed BCD data to one word of signed binary data C Control word S 1st source word D 1st destination word BISL 472 C S D Signed BCD format specified in C Signed BCD Signed binary Signed BCD Signed binary Converts double signed BCD data to double signed binary data C Control word S Source word D Destination word BCDS 471 C S D Signed BCD format specified in C Signed BCD Signed binary ...

Page 80: ... Input 2 R Result word ANDL 610 I1 I2 R Takes the logical AND of corresponding bits in double words of word data and or constants I1 I1 1 I2 I2 1 R R 1 I1 I1 1 1 1 0 0 I2 I2 1 1 0 1 0 R R 1 1 0 0 0 I1 Input 1 I2 Input 2 R Result word ORW 035 I1 I2 R Takes the logical OR of corresponding bits in single words of word data and or constants I1 1 1 0 0 I2 1 0 1 0 R 1 1 1 0 I1 I2 R I1 Input 1 I2 Input 2...

Page 81: ...r constants I1 I1 1 I2 I2 1 I1 I1 1 I2 I2 1 R R 1 I1 I1 1 1 1 0 0 I2 I2 1 1 0 1 0 R R 1 0 1 1 0 I1 Input 1 I2 Input 2 R Result word XNRW 037 I1 I2 R Takes the logical exclusive NOR of corresponding single words of word data and or constants I1 I2 I1 I2 R I1 1 1 0 0 I2 1 0 1 0 R 1 0 0 1 I1 Input 1 I2 Input 2 R 1st result word XNRL 613 I1 I2 R Takes the logical exclusive NOR of corresponding bits in...

Page 82: ...ary content of the specified words and outputs the integer portion of the result to the specified result word R S 1 S Binary data 32 bits Binary data 16 bits S 1st source word R Result word ROOT 072 S R Computes the square root of an 8 digit BCD number and outputs the integer portion of the result to the specified result word R S 1 S BCD data 8 digits BCD data 4 digits C Control word S Source data...

Page 83: ... Signed binary data 32 bits R 1 R S Source word R 1st result word FLT 452 S R Converts a 16 bit signed binary value to 32 bit floating point data and places the result in the specified result words R 1 R S Floating point data 32 bits Signed binary data 16 bits S 1st source word R 1st result word FLTL 453 S R Converts a 32 bit signed binary value to 32 bit floating point data and places the result ...

Page 84: ...oint data 32 bits Dd 1 Dr Divisor floating point data 32 bits Dr 1 Result floating point data 32 bits S 1st source word R 1st result word RAD 458 S R Converts a 32 bit floating point number from degrees to radians and places the result in the specified result words R 1 R S Source degrees 32 bit floating point data S 1 Result radians 32 bit floating point data S 1st source word R 1st result word DE...

Page 85: ...1 R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data SIN 1 S 1st source word R 1st result word ACOS 464 S R Calculates the arc cosine of a 32 bit floating point number and places the result in the specified result words The arc cosine function is the inverse of the cosine function it returns the angle that produces a given cosine value between 1 and 1 R 1 R S Source 32...

Page 86: ...ion Page S 1st source word R 1st result word EXP 467 S R Calculates the natural base e exponential of a 32 bit floating point number and places the result in the specified result words R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data e S 1st source word R 1st result word LOG 468 S R Calculates the natural base e logarithm of a 32 bit floating point number and places ...

Page 87: ...ion Location Execution condition Page S 1st source word C Control word D Destination word FSTR 448 S C D S Source word D 1st destination word FVAL 449 S D Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page DOUBLE FLOAT ING TO 16 BIT BINARY FIXD FIXD 841 Converts the specified double precision floating point data 64 bits to 16 bit signed binary data and outputs the ...

Page 88: ...585 DOUBLE FLOAT ING POINT MUL TIPLY D D 847 Multiplies the specified double precision floating point values 64 bits each and outputs the result to the result words Output Required 587 DOUBLE FLOAT ING POINT DIVIDE D D 848 Divides the specified double precision floating point values 64 bits each and outputs the result to the result words Output Required 589 Instruction Mnemonic Code Symbol Operand...

Page 89: ...s the result to the result words Output Required 598 DOUBLE ARC SINE ASIND ASIND 854 Calculates the angle in radians from the sine value in the specified dou ble precision floating point data 64 bits and outputs the result to the result words The arc sine function is the inverse of the sine function it returns the angle that produces a given sine value between 1 and 1 Output Required 600 DOUBLE AR...

Page 90: ... the result to the result words Output Required 610 DOUBLE EXPO NENTIAL POWER PWRD PWRD 860 Raises a double precision floating point number 64 bits to the power of another double precision floating point number and outputs the result to the result words Output Required 612 DOUBLE SYM BOL COMPARI SON LD AND or OR D 335 D 336 D 337 D 338 D 339 or D 340 Compares the specified double precision data 64...

Page 91: ...s TB 1st stack address S Source word PUSH 632 TB S Internal I O memory address PUSH 632 Internal I O memory address TB TB 1 TB 2 TB 3 TB TB 1 TB 2 TB 3 Writes one word of data to the specified stack TB 1st stack address D Destination word LIFO 634 TB D TB TB 1 TB 2 TB 3 TB TB 1 TB 2 TB 3 m 1 m 1 m 1 Internal I O memory address Newest data Internal I O memory address Last in first out Stack pointer...

Page 92: ...ation Index Register SETR 635 N R D Writes the location of the specified record the internal I O memory address of the beginning of the record in the specified Index Register Record number R Table number N Internal I O memory address SETR 635 writes the internal I O memory address m of the first word of record R to Index Register D R N Table number IR Index Register D Destination word GETR 636 N I...

Page 93: ... the range C 1st control word R1 1st word in range D Destination word MAX 182 C R1 D R1 W 1 R1 Internal I O memory address Max value C words Finds the maximum value in the range C 1st control word R1 1st word in range D Destination word MIN 183 C R1 D R1 W 1 R1 Internal I O memory address Min value C words Finds the minimum value in the range C 1st control word R1 1st word in range D 1st destinati...

Page 94: ... SINS SINS 641 Inserts the source data at the specified location in the stack and shifts the rest of the data in the stack downward The offset value indicates the loca tion of the insertion point how many data elements before the current pointer position Output required 668 STACK DATA DELETE CS1 H CJ1 H CJ1M or CS1D only SDEL SDEL 642 Deletes the data element at the specified location in the stack...

Page 95: ...ND BAND 681 Output Required 698 S Input word C 1st parameter word D Output word PID 190 S C D PV input S PID control Manipulated variable D Parameters C to C 8 Executes PID control according to the specified parameters S Input word C 1st parameter word D Output word PIDAT 191 S C D S Input word C 1st limit word D Output word LMT 680 S C D Upper limit C 1 Lower limit C Controls output data accordin...

Page 96: ...d BCD Point A Point B S unsigned binary P P1 1 P1 2 P1 3 Converted value Converted value Scaling is performed according to the linear function defined by points A and B Converts unsigned binary data into unsigned BCD data according to the specified linear function S Source word P1 1st parameter word R Result word SCL2 486 S P1 R Y X Y X Y X Y X R signed BCD S signed binary P1 P1 1 P1 2 Positive Of...

Page 97: ...tive Offset Offset X Y R signed binary S signed BCD Offset of 0000 X Y Max conver sion Min conver sion Max conversion Min conversion Max conver sion Min conversion X Y Converts signed BCD data into signed binary data according to the specified linear function An offset can be input in defining the linear function S Source word N Number of cycles R Result word AVG 195 S N R S Source word N Number o...

Page 98: ...93 Execution condition ON Program end Calls the subroutine with the specified subroutine number and executes that program N Subroutine number S 1st input D 1st output parameter word MCRO 099 N S D parameter word MCRO 099 MCRO 099 Execution of sub routine between SBN 092 and RET 093 The subroutine uses A600 to A603 as inputs and A604 to A607 as outputs Calls the subroutine with the specified subrou...

Page 99: ...MSKS 690 Output Required 744 READ INTERRUPT MASK Not sup ported by CS1D MSKR MSKR 692 Reads the current interrupt processing settings that were set with MSKS 690 Output Required 750 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page N Subroutine number GSBS 750 N N Subroutine number GSBN 751 N GRET 752 N Interrupt identifier S Interrupt data MSKS 690 N S Interrupt ...

Page 100: ...ned Interrupt input n Internal status Time to first scheduled interrupt Execution of scheduled interrupt task MSKS 690 Clears or retains recorded interrupt inputs for I O interrupts or sets the time to the first scheduled interrupt for scheduled interrupts N 0 to 3 N 4 to 5 DI 693 Disables execution of all interrupt tasks except the power OFF interrupt Disables execution of all interrupt tasks exc...

Page 101: ...destination word PRV 881 is used to read the present value PV of a high speed counter pulse output or interrupt input counter mode Output Required 773 COMPARISON TABLE LOAD CTBL CTBL 882 P Port specifier C Control data TB 1st compari son table word CTBL 882 is used to perform target value or range comparisons for the present value PV of a high speed counter Output Required 777 SPEED OUTPUT SPED SP...

Page 102: ...gs table ACC 888 is used to set the pulse frequency and acceleration deceler ation rates and to perform pulse output with acceleration deceleration with the same acceleration deceleration rate Both positioning and speed control are possible Output Required 795 ORIGIN SEARCH ORG ORG 889 P Port specifier C Control data ORG 889 is used to perform origin searches and returns Output Required 802 PULSE ...

Page 103: ...it 3 To end step programming execution Output Required 808 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page I O REFRESH IORF IORF 097 Output Required 825 7 SEGMENT DECODER SDEC SDEC 078 Output Required 828 B Bit STEP 008 B B Bit SNXT 009 B St Starting word E End word IORF 097 St E I O bit area or Special I O Unit bit area I O Unit or Special I O Unit I O refreshi...

Page 104: ...unction Location Execution condition Page C Control data S Transfer source and D Transfer destination and number of words IORD 222 C S D number of words Desig nated number of words read S S 1 Unit number of Special I O Unit Reads the contents of the I O Unit s memory area C Control data S Transfer source and D Transfer destination and number of words IOWR 223 C S D number of words Desig nated numb...

Page 105: ...f a serial port on the CPU Unit Serial Communications Unit CPU Bus Unit or Serial Communi cations Board STUP 237 thus enables the protocol mode to be changed during PLC operation Output Required 863 C1 Control word 1 C2 Control word 2 S 1st send word R 1st receive word PMCR 260 C1 C2 S R to to R CPU Unit Serial Communications Unit External device Port S Calls and executes a communications sequence...

Page 106: ...0 S D C D 15 0 n S 15 0 n No of send words Transmits data to a node in the network Local node Destination node S 1st source word D 1st destination C 1st control word RECV 098 S D C word D 15 0 15 0 S m n Requests data to be transmitted from a node in the network and receives the data Source node Local node S 1st command word D 1st response C 1st control word CMND 490 S D C word D 15 0 15 0 S 2 m D...

Page 107: ...mory to the specified data area in the CPU Unit C Control word D1 1st destination word D2 Filename S 1st source word FWRIT 701 C D1 D2 S Memory Card or EM file memory Specified by the 4th digit of C File specified in D2 CPU Unit Starting word specified in D1 2 and D1 3 Number of words specified in D1 and D1 1 Overwrite Starting address specified in S Memory Card or EM file memory Specified by the ...

Page 108: ...CALENDAR ADD CADD CADD 730 Output Required 916 CALENDAR SUBTRACT CSUB CSUB 731 Output Required 920 N Message number M 1st message word MSG 046 N M C 1st calendar word T 1st time word R 1st result word CADD 730 C T R Minutes Seconds Day Hour Year Month Minutes Seconds Hours Minutes Seconds Day Hour Year Month C 1 C C 2 T 1 T R 1 R R 2 Adds time to the calendar data in the specified words C 1st cale...

Page 109: ...e program any number of times Output Not required 930 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page S 1st source word D 1st destination word SEC 065 S D Minutes Seconds Hours Seconds Converts time data in hours minutes seconds format to an equivalent time in seconds only S 1st source word D 1st destination word HMS 066 S D Minutes Seconds Hours Seconds Convert...

Page 110: ... to gener ate FALS 007 N S Execution of FALS 007 gener ates a fatal error with FALS number N FALS Error Flag ON Error code written to A400 Error code and time date written to Error Log Area ERR Indicator lit Message displayed on Programming Console Generates user defined fatal errors Fatal errors stop PC operation Also generates fatal errors with the system C Control word T Monitoring time R 1st r...

Page 111: ...f the condition flags Output Required 965 LOAD CONDI TION FLAGS CS1 H CJ1 H CJ1M or CS1D only CCL CCL 283 Reads the status of the condition flags that was saved Output Required 967 CONVERT ADDRESS FROM CV CS1 H CJ1 H CJ1M or CS1D only FRMCV FRMCV 284 Converts a CV series PLC memory address to its equivalent CS CJ series PLC memory address Output Required 968 CONVERT ADDRESS TO CV CS1 H CJ1 H CJ1M ...

Page 112: ...n Execution condition Page BLOCK PROGRAM BEGIN BPRG 096 Output Required 983 BLOCK PROGRAM END BEND 801 Define a block programming area For every BPRG 096 there must be a corresponding BEND 801 Block program Required 983 BLOCK PROGRAM PAUSE BPPS 811 Block program Required 985 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page IOSP 287 IORS 288 N Block program number...

Page 113: ...l Operand FunctionS Location Execution condition Page N Block program number N BPRS 812 BPRS 812 executed for block program n Block program n This block program will now be executed as long as bit a is ON to to to Pause and restart the specified block program from another block program Execution condition Execution condition OFF Execution condition ON A executed B executed A executed Block ended E...

Page 114: ...e executed Block program Required 988 CONDITIONAL BLOCK BRANCHING END IEND 804 If the operand bit is OFF only the instructions after IEND 804 will be executed Block program Required 988 Instruction Mnemonic Code Symbol Operand FunctionS Location Execution condition Page Execution condition Execution condition ON A executed be tween IF and ELSE B executed after ELSE If the execution condition is ON...

Page 115: ...condition for WAIT 805 or WAIT 805 NOT When the execution condi tion goes ON OFF for WAIT 805 NOT the instruction from WAIT 805 or WAIT 805 NOT to the end of the program will be exe cuted Block program Required 994 TIMER WAIT TIMW 813 BCD TIMWX 816 Binary CS1 H CJ1 H CJ1M or CS1D only TIMW 813 N SV N Timer number SV Set value Block program Required 998 TIMWX 816 N SV N Timer number SV Set value In...

Page 116: ...rand FunctionS Location Execution condition Page B executed A executed SV preset C C executed Time elapsed C executed C executed Delays execution of the rest of the block program until the specified count has been achieved Execution will be continued from the next instruction after CNTW 814 CNTWX 817 when the counter counts out SV 0 to 9 999 times for BCD and 0 to 65 535 times for binary A execute...

Page 117: ...LOOP 809 until the operand bit for LEND 810 or LEND 810 NOT turns ON or OFF respectively or until the execution condition for LEND 810 turns ON Block program Required 1007 Instruction Mnemonic Code Symbol Operand FunctionS Location Execution condition Page Execution condition Execution condition ON Execution condition OFF Execution condition OFF Execution condition OFF Loop repeated LOOP 809 desig...

Page 118: ...t string S1 Text string 1 S2 Text string 2 D First destination word 656 S1 S2 D Links one text string to another text string S1 Text string first word S2 Number of characters D First destination word LEFT 652 S1 S2 D Fetches a designated number of characters from the left beginning of a text string S1 Text string first word S2 Number of characters D First destination word RGHT 653 S1 S2 D Reads a ...

Page 119: ...inds a designated text string from within a text string S Text string first word D 1st destination word LEN 650 S D 1 3 5 2 4 Calculates the length of a text string S1 Text string first word S2 Replacement text string first word S3 Number of characters S4 Beginning position D First destination word RPLC 654 S1 S2 S3 S4 D Replaces a text string with a designated text string from a designated positi...

Page 120: ...ed AND OR Required 1040 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page Ex1 1st exchange word 1 Ex2 1st exchange word 2 XCHG 665 Ex1 Ex2 Ex1 Ex1 Ex2 Ex2 Replaces a designated text string with another designated text string S Text string first word CLR 666 S S S A B C D NUL NUL Clears an entire text string with NUL 00 hex S1 Base text string first word S2 Inserte...

Page 121: ... m n The specified task s task number is lower than the local task s task number m n Task m Task n Becomes execut able in that cycle Task m Task n Be comes execut able in the next cycle Makes the specified task executable N Task number TKOF 821 N The specified task s task num ber is higher than the local task s task number m n The specified task s task num ber is lower than the local task s task n...

Page 122: ...246 AND S AND SIGNED NOT EQUAL 307 246 AND SL AND DOUBLE SIGNED NOT EQUAL 308 246 AND D AND DOUBLE FLOAT ING LESS THAN 337 614 AND F AND FLOATING LESS THAN 331 557 AND L AND DOUBLE LESS THAN 311 246 AND S AND SIGNED LESS THAN 312 246 AND SL AND DOUBLE SIGNED LESS THAN 313 246 AND AND EQUAL 300 246 AND AND STRING EQUALS 670 1040 AND D AND DOUBLE FLOAT ING EQUAL 335 614 AND F AND FLOATING EQUAL 329 ...

Page 123: ... 614 AND F AND FLOATING GREATER THAN OR EQUAL 334 557 AND L AND DOUBLE GREATER THAN OR EQUAL 326 246 AND S AND SIGNED GREATER THAN OR EQUAL 327 246 AND SL AND DOUBLE SIGNED GREATER THAN OR EQUAL 328 246 ANDL DOUBLE LOGICAL AND 610 ANDL 476 ANDW LOGICAL AND 034 ANDW 474 APR ARITHMETIC PROCESS 069 APR 497 ASC ASCII CONVERT 086 ASC 449 ASFT ASYNCHRONOUS SHIFT REGISTER 017 ASFT 313 ASIN ARC SINE 463 A...

Page 124: ...NARY 470 BINS 462 BISL DOUBLE SIGNED BCD TO BINARY 472 BISL 465 BPPS BLOCK PROGRAM PAUSE 811 985 BPRG BLOCK PROGRAM BEGIN 096 983 BPRS BLOCK PROGRAM RESTART 812 985 BREAK BREAK LOOP 514 204 BSET BLOCK SET 071 BSET 295 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page CADD CALENDAR ADD 730 CADD 916 CCL LOAD CONDITION FLAGS 283 CCL ...

Page 125: ...TO DOUBLE FLOATING 843 DBL 580 DBLL 32 BIT BINARY TO DOUBLE FLOATING 844 DBLL 581 DEG RADIANS TO DEGREES 459 DEG 536 DEGD DOUBLE RADIANS TO DEGREES 850 RADD 591 DEL DELETE STRING 658 DEL 1031 DI DISABLE INTER RUPTS 693 DI 760 DIFD DIFFERENTIATE DOWN 014 DIFD 173 DIFU DIFFERENTIATE UP 013 DIFU 173 DIM DIMENSION RECORD TABLE 631 DIM 635 DIST SINGLE WORD DISTRIBUTE 080 DIST 300 DLNK CPU BUS UNIT I O ...

Page 126: ...FIXLD 578 FLT 16 BIT TO FLOATING 452 FLT 523 FLTL 32 BIT TO FLOATING 453 FLTL 525 FOR FOR NEXT LOOPS 512 201 FPD FAILURE POINT DETECTION 269 950 FREAD READ DATA FILE 700 FREAD 899 FRMCV CONVERT ADDRESS FROM CV 284 FRMCV 968 FSTR FLOATING POINT TO ASCII 448 FSTR 561 FWRIT WRITE DATA FILE 701 FWRIT 906 FVAL ASCII TO FLOATING POINT 449 FVAL 566 Mnemonic Instruction FUN code Upward Differentiation Dow...

Page 127: ...Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page JME JUMP END 005 191 JME0 MULTIPLE JUMP END 516 199 JMP JUMP 004 191 JMP0 MULTIPLE JUMP 515 199 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page KEEP KEEP 011 KEEP 168 Mnemonic Instruction FUN code Upward Differentiation D...

Page 128: ... THAN 339 614 LD F LOAD FLOATING GREATER THAN 333 557 LD L LOAD DOUBLE GREATER THAN 321 246 LD S LOAD SIGNED GREATER THAN 322 246 LD SL LOAD DOUBLE SIGNED GREATER THAN 323 246 LD NOT LOAD NOT LD NOT 144 LD TST LOAD BIT TEST 350 163 LD TSTN LOAD BIT TEST 351 163 LD LOAD LESS THAN OR EQUAL 315 246 LD LOAD STRING LESS THAN OR EQUAL 673 1040 LD D LOAD DOUBLE FLOATING LESS THAN OR EQUAL 338 614 LD F LO...

Page 129: ...LOGARITHM 859 LOGD 610 LOOP LOOP 809 1007 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page MAX FIND MAXIMUM 182 MAX 646 MCMP MULTIPLE COMPARE 019 MCMP 263 MCRO MACRO 099 MCRO 725 MID GET STRING MIDDLE 654 MID 1022 MIN FIND MINIMUM 183 MIN 650 MLPX DATA DECODER 076 MLPX 440 MOV MOVE 021 MOV MOV 279 MOV MOVE STRING 664 MOV 1013 MOV...

Page 130: ...SHIFT N BITS RIGHT 583 NSRL 353 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page OR OR OR OR OR 150 OR OR LESS THAN 310 246 OR OR STRING LESS THAN 672 1040 OR OR NOT EQUAL 305 246 OR OR STRING NOT EQUAL 671 1040 OR D OR DOUBLE FLOAT ING NOT EQUAL 336 614 OR F OR FLOATING NOT EQUAL 330 557 OR L OR DOUBLE NOT EQUAL 306 246 OR S OR ...

Page 131: ...15 246 OR OR STRING LESS THAN OR EQUALS 673 1040 OR D OR DOUBLE FLOAT ING LESS THAN OR EQUAL 338 614 OR F OR FLOATING LESS THAN OR EQUAL 332 557 OR L OR DOUBLE LESS THAN OR EQUAL 316 246 OR S OR SIGNED LESS THAN OR EQUAL 317 246 OR SL OR DOUBLE SIGNED LESS THAN OR EQUAL 318 246 OR OR GREATER THAN OR EQUAL 325 246 OR OR STRING GREATER THAN OR EQUALS 675 1040 OR D OR DOUBLE FLOAT ING GREATER THAN OR...

Page 132: ...ferentiation Immediate Refreshing Specification Page RAD DEGREES TO RADIANS 458 RAD 554 RADD DOUBLE DEGREES TO RADIANS 849 RADD 591 RECV NETWORK RECEIVE 098 RECV 885 RET SUBROUTINE RETURN 093 732 RGHT GET STRING RIGHT 653 RGHT 1020 RLNC ROTATE LEFT WITHOUT CARRY 574 RLNC 331 RLNL DOUBLE ROTATE LEFT WITHOUT CARRY 576 RLNL 332 ROL ROTATE LEFT 027 ROL 324 ROLL DOUBLE ROTATE LEFT 572 ROLL 326 ROOT BCD...

Page 133: ... BINARY 600 SIGN 439 SIN SINE 460 SIN 538 SIND DOUBLE SINE 851 SIND 594 SINS STACK DATA INSERT 641 SINS 668 SLD ONE DIGIT SHIFT LEFT 074 SLD 338 SNUM STACK SIZE READ 638 SNUM 659 SNXT STEP START 009 808 SPED SPEED OUTPUT 885 SPED 781 SQRT SQUARE ROOT 466 SQRT 550 SQRTD DOUBLE SQUARE ROOT 857 SQRTD 606 SRCH DATA SEARCH 181 SRCH 642 SRD ONE DIGIT SHIFT RIGHT 075 SRD 339 SREAD STACK DATA READ 639 SRE...

Page 134: ...on Page UP CONDITION ON 521 162 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page WAIT NOT operand ONE CYCLE AND WAIT NOT 805 994 WAIT input condition ONE CYCLE AND WAIT 805 994 WAIT operand ONE CYCLE AND WAIT 805 994 WDT EXTEND MAXIMUM CYCLE TIME 094 WDT 963 WSFT WORD SHIFT 016 WSFT 316 Mnemonic Instruction FUN code Upward Differ...

Page 135: ... 364 BL DOUBLE INCREMENT BCD 595 BL 366 L DOUBLE INCREMENT BINARY 591 L 358 B BCD ADD WITHOUT CARRY 404 B 381 BC BCD ADD WITH CARRY 406 BC 384 BCL DOUBLE BCD ADD WITH CARRY 407 BCL 386 BL DOUBLE BCD ADD WITHOUT CARRY 405 BL 382 C SIGNED BINARY ADD WITH CARRY 402 C 377 CL DOUBLE SIGNED BINARY ADD WITH CARRY 403 CL 379 D DOUBLE FLOATING POINT ADD 845 D 583 F FLOATING POINT ADD 454 F 527 L DOUBLE SIG...

Page 136: ...TING POINT MULTIPLY 847 D 587 F FLOATING POINT MULTIPLY 456 F 531 L DOUBLE SIGNED BINARY MULTIPLY 421 L 408 U UNSIGNED BINARY MULTIPLY 422 U 410 UL DOUBLE UNSIGNED BINARY MULTIPLY 423 UL 412 L DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY 411 L 389 SIGNED BINARY DIVIDE 430 417 B BCD DIVIDE 434 B 425 BL DOUBLE BCD DIVIDE 435 BL 427 D DOUBLE FLOATING POINT DIVIDE 848 D 589 F FLOATING POINT DIVIDE 457 ...

Page 137: ...TERLOCK CLEAR 187 004 JMP JUMP 191 005 JME JUMP END 191 006 FAL FAILURE ALARM FAL 934 007 FALS SEVERE FAILURE ALARM 942 008 STEP STEP DEFINE 808 009 SNXT STEP START 808 010 SFT SHIFT REGISTER 309 011 KEEP KEEP KEEP 168 012 CNTR REVERSIBLE COUNTER 234 013 DIFU DIFFERENTIATE UP DIFU 173 014 DIFD DIFFERENTIATE DOWN DIFD 173 015 TIMH HIGH SPEED TIMER 211 016 WSFT WORD SHIFT WSFT 316 017 ASFT ASYNCHRON...

Page 138: ...ER XFER 292 071 BSET BLOCK SET BSET 295 072 ROOT BCD SQUARE ROOT ROOT 493 073 XCHG DATA EXCHANGE XCHG 297 074 SLD ONE DIGIT SHIFT LEFT SLD 338 075 SRD ONE DIGIT SHIFT RIGHT SRD 339 076 MLPX DATA DECODER MLPX 440 077 DMPX DATA ENCODER DMPX 445 078 SDEC 7 SEGMENT DECODER SDEC 844 079 FDIV FLOATING POINT DIVIDE FDIV 509 080 DIST SINGLE WORD DISTRIBUTE DIST 300 081 COLL DATA COLLECT COLL 302 082 MOVB ...

Page 139: ...NING 686 194 SCL SCALING SCL 704 195 AVG AVERAGE 716 222 IORD INTELLIGENT I O READ IORD 831 223 IOWR INTELLIGENT I O WRITE IOWR 834 226 DLNK CPU BUS UNIT I O REFRESH DLNK 837 235 RXD RECEIVE RXD 858 236 TXD TRANSMIT TXD 853 237 STUP CHANGE SERIAL PORT SETUP STUP 863 260 PMCR PROTOCOL MACRO PMCR 844 269 FPD FAILURE POINT DETECTION 950 281 EMBC SELECT EM BANK EMBC 961 282 CCS SAVE CONDITION FLAGS CC...

Page 140: ...SIGNED NOT EQUAL 246 308 AND SL AND DOUBLE SIGNED NOT EQUAL 246 308 LD SL LOAD DOUBLE SIGNED NOT EQUAL 246 308 OR SL OR DOUBLE SIGNED NOT EQUAL 246 310 AND AND LESS THAN 246 310 LD LOAD LESS THAN 246 310 OR OR LESS THAN 246 311 AND L AND DOUBLE LESS THAN 246 311 LD L LOAD DOUBLE LESS THAN 246 311 OR L OR DOUBLE LESS THAN 246 312 AND S AND SIGNED LESS THAN 246 312 LD S LOAD SIGNED LESS THAN 246 312...

Page 141: ... DOUBLE GREATER THAN 246 321 LD L LOAD DOUBLE GREATER THAN 246 321 OR L OR DOUBLE GREATER THAN 246 322 AND S AND SIGNED GREATER THAN 246 322 LD S LOAD SIGNED GREATER THAN 246 322 OR S OR SIGNED GREATER THAN 246 323 AND SL AND DOUBLE SIGNED GREATER THAN 246 323 LD SL LOAD DOUBLE SIGNED GREATER THAN 246 323 OR SL OR DOUBLE SIGNED GREATER THAN 246 325 AND AND GREATER THAN OR EQUAL 246 325 LD LOAD GRE...

Page 142: ...ESS THAN 557 331 OR F OR FLOATING LESS THAN 557 332 AND F AND FLOATING LESS THAN OR EQUAL 557 332 LD F LOAD FLOATING LESS THAN OR EQUAL 557 332 OR F OR FLOATING LESS THAN OR EQUAL 557 333 AND F AND FLOATING GREATER THAN 557 333 LD F LOAD FLOATING GREATER THAN 557 333 OR F OR FLOATING GREATER THAN 557 334 AND F AND FLOATING GREATER THAN OR EQUAL 557 334 LD F LOAD FLOATING GREATER THAN OR EQUAL 557 ...

Page 143: ...ATER THAN OR EQUAL 614 340 OR D OR DOUBLE FLOAT ING GREATER THAN OR EQUAL 614 350 AND TST AND BIT TEST 163 350 LD TST LOAD BIT TEST 163 350 OR TST OR BIT TEST 163 351 AND TSTN AND BIT TEST NOT 163 351 LD TSTN LOAD BIT TEST NOT 163 351 OR TSTN OR BIT TEST NOT 163 400 SIGNED BINARY ADD WITHOUT CARRY 373 401 L DOUBLE SIGNED BINARY ADD WITHOUT CARRY L 375 402 C SIGNED BINARY ADD WITH CARRY C 377 403 C...

Page 144: ...DIVIDE L 419 432 U UNSIGNED BINARY DIVIDE U 421 433 UL DOUBLE UNSIGNED BINARY DIVIDE UL 423 434 B BCD DIVIDE B 425 435 BL DOUBLE BCD DIVIDE BL 427 448 FSTR FLOATING POINT TO ASCII FSTR 561 449 FVAL ASCII TO FLOATING POINT FVAL 566 450 FIX FLOATING TO 16 BIT FIX 520 451 FIXL FLOATING TO 32 BIT FIXL 522 452 FLT 16 BIT TO FLOATING FLT 523 453 FLTL 32 BIT TO FLOATING FLTL 525 454 F FLOATING POINT ADD ...

Page 145: ...01 514 BREAK BREAK LOOP 204 515 JMP0 MULTIPLE JUMP 199 516 JME0 MULTIPLE JUMP END 199 520 NOT NOT 161 521 UP CONDITION ON 162 522 DOWN CONDITION OFF 162 530 SETA MULTIPLE BIT SET SETA 177 531 RSTA MULTIPLE BIT RESET RSTA 177 532 SETB SINGLE BIT SET SETB SETB 180 533 RSTB SINGLE BIT RESET RSTB RSTB 180 534 OUTB SINGLE BIT OUTPUT OUTB OUTB 184 540 TMHH ONE MS TIMER 216 542 TIML LONG TIMER 222 543 MT...

Page 146: ...L DOUBLE SHIFT N BITS LEFT NSLL 348 583 NSRL DOUBLE SHIFT N BITS RIGHT NSRL 353 590 INCREMENT BINARY 356 591 L DOUBLE INCREMENT BINARY L 358 592 DECREMENT BINARY 360 593 L DOUBLE DECREMENT BINARY L 362 594 B INCREMENT BCD B 364 595 BL DOUBLE INCREMENT BCD BL 366 596 B DECREMENT BCD B 368 597 BL DOUBLE DECRE MENT BCD BL 370 600 SIGN 16 BIT TO 32 BIT SIGNED BINARY SIGN 439 610 ANDL DOUBLE LOGICAL AN...

Page 147: ...G RPLC 1028 664 MOV MOV STRING MOV 1013 665 XCHG EXCHANGE STRING XCHG 1033 666 CLR CLEAR STRING CLR 1035 670 AND AND STRING EQUALS 1040 670 LD LOAD STRING EQUALS 1040 670 OR OR STRING EQUALS 1040 671 AND AND STRING NOT EQUAL 1040 671 LD LOAD STRING NOT EQUAL 1040 671 OR OR STRING NOT EQUAL 1040 672 AND AND STRING LESS THAN 1040 672 LD LOAD STRING LESS THAN 1040 672 OR OR STRING LESS THAN 1040 673 ...

Page 148: ...BN GLOBAL SUBROU TINE ENTRY 740 752 GRET GLOBAL SUBROU TINE RETURN 743 801 BEND BLOCK PROGRAM END 983 802 IF CONDITIONAL BRANCHING BLOCK 988 802 IF CONDITIONAL BRANCHING BLOCK 988 802 IF NOT CONDITIONAL BRANCHING BLOCK NOT 988 803 ELSE ELSE 988 804 IEND IF END 988 805 WAIT ONE CYCLE AND WAIT 994 805 WAIT ONE CYCLE AND WAIT 994 805 WAIT NOT ONE CYCLE AND WAIT NOT 994 806 EXIT CONDITIONALBLOCK EXIT ...

Page 149: ...BLE DEGREES TO RADIANS RADD 591 850 DEGD DOUBLE RADIANS TO DEGREES RADD 593 851 SIND DOUBLE SINE SIND 594 852 COSD DOUBLE COSINE COSD 596 853 TAND DOUBLE TANGENT TAND 598 854 ASIND DOUBLE ARC SINE ASIND 600 855 ACOSD DOUBLE ARC COSINE ACOSD 602 856 ATAND DOUBLE ARC TAN GENT ATAND 604 857 SQRTD DOUBLE SQUARE ROOT SQRTD 606 858 EXPD DOUBLE EXPONENT EXPD 608 859 LOGD DOUBLE LOGARITHM LOGD 610 860 PWR...

Page 150: ...ns 157 3 3 10 Operation Timing for I O Instructions 159 3 3 11 TR Bits 159 3 3 12 NOT NOT 520 161 3 3 13 CONDITION ON OFF UP 521 and DOWN 522 162 3 3 14 BIT TEST TST 350 and TSTN 351 163 3 4 Sequence Output Instructions 166 3 4 1 OUTPUT OUT 166 3 4 2 OUTPUT NOT OUT NOT 167 3 4 3 KEEP KEEP 011 168 3 4 4 DIFFERENTIATE UP DOWN DIFU 013 and DIFD 014 173 3 4 5 SET and RESET SET and RSET 175 3 4 6 MULTI...

Page 151: ... SIGNED BINARY COMPARE CPS 114 257 3 7 5 DOUBLE SIGNED BINARY COMPARE CPSL 115 260 3 7 6 MULTIPLE COMPARE MCMP 019 263 3 7 7 TABLE COMPARE TCMP 085 265 3 7 8 BLOCK COMPARE BCMP 068 268 3 7 9 EXPANDED BLOCK COMPARE BCMP2 502 CJ1M Only 270 3 7 10 AREA RANGE COMPARE ZCP 088 274 3 7 11 DOUBLE AREA RANGE COMPARE ZCPL 116 277 3 8 Data Movement Instructions 279 3 8 1 MOVE MOV 021 279 3 8 2 MOVE NOT MVN 0...

Page 152: ...RLNL 576 332 3 9 15 ROTATE RIGHT WITHOUT CARRY RRNC 575 334 3 9 16 DOUBLE ROTATE RIGHT WITHOUT CARRY RRNL 577 336 3 9 17 ONE DIGIT SHIFT LEFT SLD 074 338 3 9 18 ONE DIGIT SHIFT RIGHT SRD 075 339 3 9 19 SHIFT N BIT DATA LEFT NSFL 578 341 3 9 20 SHIFT N BIT DATA RIGHT NSFR 579 343 3 9 21 SHIFT N BITS LEFT NASL 580 345 3 9 22 DOUBLE SHIFT N BITS LEFT NSLL 582 348 3 9 23 SHIFT N BITS RIGHT NASR 581 35...

Page 153: ...11 19 UNSIGNED BINARY MULTIPLY U 422 410 3 11 20 DOUBLE UNSIGNED BINARY MULTIPLY UL 423 412 3 11 21 BCD MULTIPLY B 424 413 3 11 22 DOUBLE BCD MULTIPLY BL 425 415 3 11 23 SIGNED BINARY DIVIDE 430 417 3 11 24 DOUBLE SIGNED BINARY DIVIDE L 431 419 3 11 25 UNSIGNED BINARY DIVIDE U 432 421 3 11 26 DOUBLE UNSIGNED BINARY DIVIDE UL 433 423 3 11 27 BCD DIVIDE B 434 425 3 11 28 DOUBLE BCD DIVIDE BL 435 427...

Page 154: ...15 1 FLOATING TO 16 BIT FIX 450 520 3 15 2 FLOATING TO 32 BIT FIXL 451 522 3 15 3 16 BIT TO FLOATING FLT 452 523 3 15 4 32 BIT TO FLOATING FLTL 453 525 3 15 5 FLOATING POINT ADD F 454 527 3 15 6 FLOATING POINT SUBTRACT F 455 529 3 15 7 FLOATING POINT MULTIPLY F 456 530 3 15 8 FLOATING POINT DIVIDE F 457 533 3 15 9 DEGREES TO RADIANS RAD 458 535 3 15 10 RADIANS TO DEGREES DEG 459 536 3 15 11 SINE S...

Page 155: ...LE EXPONENTIAL POWER PWRD 860 612 3 16 21 Double precision Floating point Input Instructions 614 3 17 Table Data Processing Instructions 617 3 17 1 SET STACK SSET 630 623 3 17 2 PUSH ONTO STACK PUSH 632 626 3 17 3 FIRST IN FIRST OUT FIFO 633 629 3 17 4 LAST IN FIRST OUT LIFO 634 632 3 17 5 DIMENSION RECORD TABLE DIM 631 635 3 17 6 SET RECORD LOCATION SETR 635 638 3 17 7 GET RECORD NUMBER GETR 636 ...

Page 156: ...CH ORG 889 CJ1M CPU22 CPU23 Only 802 3 21 9 PULSE WITH VARIABLE DUTY FACTOR PWM 891 CJ1M CPU22 CPU23 Only 805 3 22 Step Instructions 807 3 22 1 STEP DEFINE and STEP START STEP 008 SNXT 009 808 3 23 Basic I O Unit Instructions 825 3 23 1 I O REFRESH IORF 097 825 3 23 2 7 SEGMENT DECODER SDEC 078 828 3 23 3 INTELLIGENT I O READ IORD 222 831 3 23 4 INTELLIGENT I O WRITE IOWR 223 834 3 23 5 CPU BUS UN...

Page 157: ...RT BPPS 811 BPRS 812 985 3 32 4 Branching IF 802 ELSE 803 and IEND 804 988 3 32 5 CONDITIONAL BLOCK EXIT NOT EXIT NOT 806 991 3 32 6 ONE CYCLE AND WAIT NOT WAIT 805 WAIT 805 NOT 994 3 32 7 TIMER WAIT TIMW 813 and TIMWX 816 998 3 32 8 COUNTER WAIT CNTW 814 and CNTWX 818 1001 3 32 9 HIGH SPEED TIMER WAIT TMHW 815 and TMHWX 817 1004 3 32 10 Loop Control LOOP 809 LEND 810 LEND 810 NOT 1007 3 33 Text S...

Page 158: ...ed Once for Downward Differentiation The instruction is executed dur ing the next cycle only after the execution condition changes from ON to OFF Always Executed The instruction does not require an execution condition and is executed each cycle Creates ON Condition The instruction is executed each cycle to create an execution condition for the next instruction Variations Executed Each Cycle for ON...

Page 159: ...CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 Description The function of the instruction and the operands used in the instruction are described Flags The flags table indicates the status of the condit...

Page 160: ...e Operands specify ing bit strings nor mally input as hexadecimal Input as deci mal with an prefix or input as hexadeci mal with an prefix See note The Cont Key can be pressed to input hexa decimal values by default with an prefix The CHG Key can then be pressed to rotate between hexadecimal with prefix signed decimal with and unsigned decimal with prefix Operands specify ing numeric values normal...

Page 161: ...FLOATING POINT TO ASCII FSTR 448 ASCII TO FLOATING POINT VAL 449 Double precision Floating Point Calculation and Conversion Instructions Double precision Comparison Instructions D D D D D and D 335 to 340 DOUBLE FLOATING TO 16 BIT BINARY FIXD 841 DOUBLE FLOATING TO 32 BIT BINARY FIXLD 8420 16 BIT BINARY TO DOUBLE FLOATING DBL 843 32 BIT BINARY TO DOUBLE FLOATING DBLL 844 DOUBLE FLOATING POINT ADD ...

Page 162: ... WRITE SWRIT 640 STACK DATA INSERT SINS 641 STACK DATA DELETE SDEL 642 Data Control Instructions PID CONTROL WITH AUTOTUNING PIDAT 191 Subroutine Instructions GLOBAL SUBROUTINE CALL GSBS 750 GLOBAL SUBROUTINE ENTRY GSBN 751 GLOBAL SUBROUTINE RETURN GRET 752 I O Unit Instructions CPU BUS UNIT I O REFRESH DLNK 226 Other Instructions SAVE CONDITION FLAGS CCS 282 LOAD CONDITION FLAGS CCL 283 CONVERT A...

Page 163: ...iate Refreshing Specification See note LD Combined Variations Refreshes Input Bit Restarts Logic and Creates ON Once for Upward Differentiation See note LD Refreshes Input Bit Restarts Logic and Creates ON Once for Downward Differentiation See note LD Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area LD operand bit CIO Area CIO 000000 to CIO 614315 Work Area W0000...

Page 164: ...um ber of LOAD LOAD NOT instructions minus1 If they do not match a program ming error will occur For details refer to 3 3 7 AND LOAD AND LD and 3 3 8 OR LOAD OR LD Flags There are no flags affected by this instruction Precautions Differentiate up or differentiate down can be specified for LD If differ entiate up is specified the execution condition is turned ON for one cycle only after the status ...

Page 165: ... 000003 OR LD AND LD LD NOT 000004 AND 000005 OR LD OUT 000100 OR LD AND LD OR LD Bus bar Starting point of block Variations Restarts Logic and Creates ON Each Cycle Operand Bit is OFF LD NOT Restarts Logic and Creates ON Once for Upward Differentiation See note 1 LD NOT Restarts Logic and Creates ON Once for Downward Differentiation See note 1 LD NOT Immediate Refreshing Specification See note 2 ...

Page 166: ...ructions cannot be connected directly to the bus bar If there is no LOAD or LOAD NOT instruction a program error will occur with the program check by the Peripheral Device When logic blocks are connected by AND LOAD or OR LOAD instructions the total number of AND LOAD OR LOAD instructions must match the total num ber of LOAD LOAD NOT instructions minus1 If they do not match a program ming error wi...

Page 167: ...te Immediate refreshing is not supported by the CS1D CPU Units Applicable Program Areas Instruction Operand LD 000000 LD 000001 LD 000002 AND 000003 OR LD AND LD LD NOT 000004 AND 000005 OR LD OUT 000100 OR LD AND LD OR LD Variations Creates ON Each Cycle AND Result is ON AND Creates ON Once for Upward Differentiation AND Creates ON Once for Downward Differentiation AND Immediate Refreshing Specif...

Page 168: ... updates the status of the input bit just before the instruction is exe cuted from the Basic Input Unit but not Basic Input Units on Slave Racks or for C200H Group 2 Multi point Input Units For AND it is possible to combine immediate refreshing and up or down differ entiation or If either of these is specified the input is refreshed from the Basic Input Unit just before the instruction is executed...

Page 169: ...D AND LD OUT 000006 Variations Creates ON Each Cycle AND NOT Result is ON AND NOT Creates ON Once for Upward Differentiation See note 1 AND NOT Creates ON Once for Downward Differentiation See note 1 AND NOT Immediate Refreshing Specification See note 2 AND NOT Combined Variations Refreshes Input Bit and Creates ON Once for Upward Differentiation See note 1 AND NOT Refreshes Input Bit and Creates ...

Page 170: ... instruction updates the status of input bit just before the instruction is exe cuted from Basic Input Units but not for Basic Input Units on Slave Racks or for C200H Group 2 Multi point Input Units Example Task Flag Area TK0000 to TK0031 Condition Flags ER CY N OF UF ON OFF AER Clock Pulses 0 02 s 0 1 s 0 2 s 1 s 1 min TR Area DM Area EM Area without bank EM Area with bank Indirect DM EM addresse...

Page 171: ...tion See note OR Refreshes Input Bit and Creates ON Once for Downward Differentiation See note OR Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area OR bit operand CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A95915 Timer Area T0000 to T4095 Counter Area C0000 to C4095 Task Flag Area TK0...

Page 172: ...he execution condition is turned ON for one cycle only after the status of the operand bit goes from ON to OFF Immediate refreshing can be specified for OR An immediate refresh instruction updates the status of the input bit just before the instruction is exe cuted from the Basic Input Unit but not for Basic Input Units on Slave Racks or for C200H Group 2 Multi point Input Units For OR it is possi...

Page 173: ...OR NOT Creates ON Once for Upward Differentiation See note 1 OR NOT Creates ON Once for Downward Differentiation See note 1 OR NOT Immediate Refreshing Specification See note 2 OR NOT Combined Variations Refreshes Input Bit and Creates ON Once for Upward Differentiation See note 1 OR NOT Refreshes Input Bit and Creates ON Once for Downward Differentiation See note 1 OR NOT Block program areas Step...

Page 174: ... in series the logic block just before this instruction with another logic block The logic block consists of all the instructions from a LOAD or LOAD NOT instruction until just before the next LOAD or LOAD NOT instruction on the same rungs Instruction Operand LD 000000 AND 000001 AND 000002 OR 000003 AND 000004 LD 000005 AND 000006 OR NOT 000007 AND LD OUT 000008 Logic block Logic block Variations...

Page 175: ...nnected in series using this instruction to first connect two of the logic blocks and then to connect the next and subse quent ones in order It is also possible to continue placing this instruction after three or more logic blocks and connect them together in series When a logic block is connected by AND LOAD or OR LOAD instructions the total number of AND LOAD OR LOAD instructions must match the ...

Page 176: ...next block connected in series to previous block 3 3 8 OR LOAD OR LD Purpose Takes a logical OR between logic blocks Ladder Symbol Variations Applicable Program Areas Description AND LD connects in parallel the logic block just before this instruction with another logic block AND LD AND LD OUT 000500 Address Instruction Operand 000000 LD 000000 000001 OR 000001 000002 LD 000002 000003 OR NOT 00000...

Page 177: ...ndition is ORed with the last unused execution condition Flags There are no flags affected by this instruction Precautions Three or more logic blocks can be connected in parallel using this instruction to first connect two of the logic blocks and then to connect the next and subse quent ones in order It is also possible to continue placing this instruction after three or more logic blocks and conn...

Page 178: ... and OUT NOT instructions have immediate refreshing variations in addition to their ordinary forms The I O timing for data handled by instructions differs for ordinary and differ entiated instructions immediate refreshing instructions and immediate refreshing differentiated instructions Ordinary and differentiated instructions are executed using data input by pre vious I O refresh processing and t...

Page 179: ...The instruction is executed once when the specified bit turns from ON to OFF and the ON state is held for one cycle Immediate refresh LD AND OR LD NOT AND NOT OR NOT The input data for the specified bit is taken by the CPU and the instruction is executed Before instruction execu tion OUT OUT NOT After the instruction is executed the data for the specified bit is output After instruction execution ...

Page 180: ... condi tions in a program when programming in mnemonic code They are not used when programming directly in ladder program form because the processing is automatically executed by the Peripheral Device The following diagram shows a simple application using two TR bits Input received CPU processing Instruction execution I O refreshing Input received Input received Input received Input received Input...

Page 181: ...int and that of output CIO 000202 are not necessarily the same so a TR bit must be used In this case the number of steps in the program could be reduced by using instruction block 1 in place of instruction block 2 TR0 to TR15 Considerations TR bits are used only for retaining OUT TR0 to TR15 and restoring LD TR0 to TR15 the ON OFF status of branching points in programs with many out put branches T...

Page 182: ...ion condition and another instruction to invert the execution condition Flags There are no flags affected by NOT 520 Precautions NOT 520 is an intermediate instruction i e it cannot be used as a right hand instruction Be sure to program a right hand instruction after NOT 520 Example NOT 520 reverses the execution condition in the following example The following table shows the operation of this pr...

Page 183: ... from ON to OFF The DIFU 013 and DIFD 014 instructions can also be used for the same purpose but they require work bits UP 521 and DOWN 522 simplify pro gramming by reducing the number of work bits and program addresses needed Flags There are no flags affected by UP 521 and DOWN 522 Precautions UP 521 and DOWN 522 are intermediate instructions i e they cannot be used as right hand instructions Be ...

Page 184: ...he program like LD AND and OR the execution condition is ON when the specified bit in the specified word is ON and OFF when the bit is OFF LD TSTN 351 AND TSTN 351 and OR TSTN 351 are used in the program like LD NOT AND NOT and OR NOT the execution condition is OFF when the specified bit in the specified word is ON and ON when the bit is OFF Ladder Symbols Variations Cycle time Cycle time S Source...

Page 185: ...is ON and ON when the bit is OFF Unlike LD NOT AND NOT and OR NOT bits in the DM and EM areas can be used as operands in TSTN 351 Flags Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area...

Page 186: ...owing example CIO 000001 is turned ON when bit 3 of D00010 is ON In the following example CIO 000001 is turned ON when bit 3 of D00010 is OFF AND TST 350 and AND TSTN 351 In the following example CIO 000001 is turned ON when CIO 000000 and bit 3 of D00010 are both ON In the following example CIO 000001 is turned ON when CIO 000000 is ON and bit 5 of D00010 is OFF OR TST 350 and OR TSTN 351 In the ...

Page 187: ...iations Executed Each Cycle for ON Condition OUT Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note OUT Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Area OUT bit operand CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H000...

Page 188: ...ti point Input Units at the same time as it writes the status of the execution condition power flow to the specified output bit in I O memory Example 3 4 2 OUTPUT NOT OUT NOT Purpose Reverses the result execution condition of the logical processing and out puts it to the specified bit Ladder Symbol Variations Note Immediate refreshing is not supported by the CS1D CPU Units Applicable Program Areas...

Page 189: ...cted by this instruction Example 3 4 3 KEEP KEEP 011 Purpose Operates as a latching relay Ladder Symbol Area OUT bit operand CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A44800 to A95915 Timer Area Counter Area TR Area TR0 to TR15 DM Area EM Area without bank EM Area with bank Indirect DM EM addresses in binary Indirect DM EM add...

Page 190: ...r Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note KEEP 011 Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A44800 to A95915 Timer Area Counter Area D...

Page 191: ... changes will not be reflected immediately if the bit is allocated to a Group 2 High density I O Unit High density Special I O Unit or a Unit mounted in a SYSMAC BUS Remote I O Slave Rack KEEP 011 operates like the self maintaining bit but a self maintaining bit programmed with KEEP 011 requires one less instruction Self maintaining bits programmed with KEEP 011 will maintain status even in an int...

Page 192: ...the IOM Hold Bit and setting IOM Hold Bit Hold in the PLC Setup In this case I O Area bits used in KEEP 011 will maintain status after restarting the PLC following a power interruption just like holding bits Be sure to restart the PLC after changing the PLC Setup otherwise the new settings will not be used Flags No flags are affected by KEEP 011 Precautions Never use an input bit in a normally clo...

Page 193: ...remains ON until CIO 000001 goes ON When CIO 000002 goes ON and CIO 000003 goes OFF in the following example CIO 00100 is turned ON CIO 00100 remains ON until CIO 000004 or CIO 000005 goes ON Coding Note KEEP 011 is input in different orders on in ladder and mnemonic form In lad der form input the set input KEEP 011 and then the reset input In mne monic form input the set input the reset input and...

Page 194: ...for ON Condition Not supported Executed Once for Upward Differentiation DIFU 013 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note DIFU 013 Variations Executed Each Cycle for ON Condition Not supported Executed Once for Upward Differentiation DIFD 014 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See n...

Page 195: ...C BUS Remote I O Slave Rack UP 521 and DOWN 522 can be used to execute an instruction for just one cycle when the execution condition goes from OFF ON or ON OFF Refer to 3 3 13 CONDITION ON OFF UP 521 and DOWN 522 for details Flags No flags are affected by DIFU 013 and DIFD 014 Precautions The operation of DIFU 013 or DIFD 014 depends on the execution condition for the instruction itself as well a...

Page 196: ...rns the operand bit OFF when the execution condition is ON Ladder Symbols Variations Note Immediate refreshing is not supported by the CS1D CPU Units 1 cycle 1 cycle 001000 1 cycle 1 cycle 001000 001000 B Bit SET B B Bit RSET B Variations Executed Each Cycle for ON Condition SET Executed Once for Upward Differentiation SET Executed Once for Downward Differentiation SET Immediate Refreshing Specifi...

Page 197: ... for Upward Differentiation RSET Executed Once for Downward Differentiation RSET Immediate Refreshing Specification See note RSET Combined Variations Immediate Refreshing Once for Upward Differentiation See note RSET Immediate Refreshing Once for Downward Differentiation See note RSET Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B CIO Area CIO 000000 to CIO 6...

Page 198: ...s are affected by SET and RSET Precautions SET and RSET cannot be used to set and reset timers and counters When SET or RSET is programmed between IL 002 and ILC 003 or JMP 004 and JME 005 the status of the specified bit won t be changed if the program section is interlocked or jumped Example Differences between OUT OUT NOT and SET RSET The operation of SET differs from that of OUT because the OUT...

Page 199: ... bits SETA 530 D N1 N2 D Beginning word N1 Beginning bit N2 Number of bits RSTA 531 D N1 N2 Variations Executed Each Cycle for ON Condition SETA 530 Executed Once for Upward Differentiation SETA 530 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Variations Executed Each Cycle for ON Condition RSTA 531 Executed Once for Upward Differentiati...

Page 200: ... to the left more significant bits All other bits are left unchanged No changes will be made if N2 is set to 0 Bits turned OFF by RSTA 531 can be turned ON by any other instructions not just SETA 530 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to...

Page 201: ...owing example the 20 bits 0014 hexadecimal beginning with bit 3 of CIO 0100 are turned OFF 3 4 7 SINGLE BIT SET RESET SETB 532 RSTB 533 Purpose SETB 532 turns ON the specified bit RSTB 533 turns OFF the specified bit These instructions are supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbols N2 bits are reset to 0 OFF Name Label Operation Error Flag ER ON if N1 isn t within the...

Page 202: ...Bit Refreshed Immediately for Downward Differentiation Not supported Variations Executed Each Cycle for ON Condition RSTB 533 Executed Once for Upward Differentiation RSTB 533 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note RSTB 533 Combined Variations Executed Once and Bit Refreshed Immediately for Upward Differentiation See note RSTB 533 Execu...

Page 203: ...The status of the bit is not affected when the execution condition is OFF Use SETB 532 to turn ON the bit Unlike RST RSTB 533 can turn OFF a bit in the DM area or EM area Bits turned OFF by RSTB 533 can be turned ON by any other instruction not just SETB 532 RSTB 533 is supported by the CS1 H CJ1 H and CJ1M CPU Units only Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 t...

Page 204: ...when the specified bit is in the CIO W H or A Area 2 The SETB 532 and RSTB 533 instructions can control bits in the DM and EM Areas unlike SET and RSET Differences between OUTB 534 and SETB 532 RSTB 533 The OUTB 534 instruction operates somewhat differently from SETB 532 and RSTB 533 1 The SETB 532 and RSTB 533 instructions change the status of the specified bit only when their execution condition...

Page 205: ...ations Executed Each Cycle for ON Condition OUTB 534 Executed Once for Upward Differentiation OUTB 534 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note OUTB 534 Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Area D N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxilia...

Page 206: ...ust after the instruction is executed on an output bit allocated to a Basic Output Unit but not for C200H Group 2 Multi point Output Units or Basic Output Units on Slave Racks at the same time as it writes the status of the execution condition power flow to the specified output bit in I O memory When OUTB 534 is programmed between IL 002 and ILC 003 the speci fied bit will be turned OFF if the pro...

Page 207: ...xecuted has the highest task number in the program END 001 marks the end of the overall main program Precautions Always place END 001 at the end of each program A programming error will occur if there isn t an END 001 instruction in the program END 001 Variations Executed Each Cycle for ON Condition END 001 Immediate Refreshing Specification Not supported Block program areas Step program areas Sub...

Page 208: ...002 and ILC 003 when the execution con dition for IL 002 is OFF IL 002 and ILC 003 are normally used in pairs Ladder Symbols Variations Applicable Program Areas Description When the execution condition for IL 002 is OFF the outputs for all instruc tions between IL 002 and ILC 003 are interlocked When the execution con dition for IL 002 is ON the instructions between IL 002 and ILC 003 are executed...

Page 209: ... IL 002 and ILC 003 The following table shows the differences between IL 002 ILC 003 and JMP 004 JME 005 Instruction Treatment Bits specified in OUT OUT NOT or OUTB 534 OFF TIM TIMX 550 TIMH 015 TIMHX 551 TMHH 540 TMHHX 552 TIML 542 and TIMXL 553 Completion Flag OFF reset PV Time set value reset Bits words specified in all other instructions Retain previous status Execution condition Interlocked s...

Page 210: ...IL 002 and ILC 003 are used in pairs although it is possible to use more than one IL 002 with a single ILC 003 as shown in the following diagram If IL 002 and ILC 003 aren t paired an error message will appear when the program check is performed but the program will be executed prop erly Bits in OUT OUT NOT OUTB 534 OFF All outputs retain their previous status Status of timer instructions except T...

Page 211: ...nnot be nested as in the following diagram Examples When CIO 000000 is OFF in the following example all outputs between IL 002 and ILC 003 are interlocked When CIO 000000 is ON in the follow ing example the instructions between IL 002 and ILC 003 are executed nor mally ...

Page 212: ... Symbols Variations Applicable Program Areas CIO 000000 ON CIO 000000 OFF Normal execution Reset Outputs interlocked Retained Retained OFF OFF N Jump number JMP 004 N N Jump number JME 005 N Variations Jumps when OFF Doesn t jump when ON JMP 004 Immediate Refreshing Specification Not supported Variations Executed Each Cycle for ON Condition JME 005 Immediate Refreshing Specification Not supported ...

Page 213: ...CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BC...

Page 214: ...ram the instructions between JME 005 and JMP 004 will be executed repeatedly as long as the execution condition for JMP 004 is OFF A Cycle Time Too Long error will occur if the execution condition isn t turned ON or END 001 isn t executed within the maximum cycle time Item JMP 004 JME 005 CJP 510 JME 005 CJPN 511 JME 005 JMP0 515 JME0 516 Execution condition for jump OFF ON OFF OFF Number allowed ...

Page 215: ... on the status of the execution condition when they are pro grammed between JMP 004 and JME 005 When DIFU 013 DIFD 014 or a differentiated instruction is executed in an jumped section immediately after the execution condition for the JMP 004 has gone ON the execution condi tion for the DIFU 013 DIFD 014 or differentiated instruction will be com pared to the execution condition that existed before ...

Page 216: ...am with the same jump number CJP 510 and JME 005 are used in pairs The operation of CJPN 511 is almost identical to JMP 004 When the execu tion condition for CJP 004 is OFF program execution jumps directly to the first JME 005 in the program with the same jump number CJPN 511 and JME 005 are used in pairs Ladder Symbols Variations CIO 000000 ON CIO 000000 OFF Normal execution Instructions not exec...

Page 217: ...on JME 005 Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK Not allowed OK OK Area N CJP 510 CJPN 511 JME 005 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E0000...

Page 218: ...y the instruction with the lower address will be valid The JME 005 with the higher program address will be ignored When JME 005 precedes the CJP 510 or CJPN 511 instruction in the pro gram the instructions in between will be executed repeatedly as long as the execution condition remains OFF CJP 510 or ON CJPN 511 A Cycle Time Too Long error will occur if the jump isn t completed by changing the ex...

Page 219: ...jumps between tasks are not allowed An error will occur if a corresponding JME 005 instruc tion is not programmed in the same task The operation of DIFU 013 DIFD 014 and differentiated instructions is not dependent solely on the status of the execution condition when they are pro grammed in a jumped program section When DIFU 013 DIFD 014 or a dif ferentiated instruction is executed in an jumped se...

Page 220: ... There is no limit on the number of pairs that can be used in the program Ladder Symbols Variations Applicable Program Areas CIO 000000 OFF CIO 000000 ON Normal execution Instructions not executed Outputs re main un changed 1 1 JMP0 515 JME0 516 Variations Jumps when OFF Doesn t jump when ON JMP0 515 Immediate Refreshing Specification Not supported Variations Executed Each Cycle for ON Condition J...

Page 221: ...must be in the same tasks because jumps between tasks are not allowed The operation of DIFU 013 DIFD 014 and differentiated instructions is not dependent solely on the status of the execution condition when they are pro grammed between JMP0 515 and JME0 516 When DIFU 013 DIFD 014 or a differentiated instruction is executed in an jumped section immediately after the execution condition for the JMP0...

Page 222: ...Operands N Number of Loops The number of loops must be 0000 to FFFF 0 to 65 535 decimal CIO 000000 ON CIO 000000 OFF Normal execution Instructions processed as NOP 000 Outputs re main un changed N Number of loops FOR 512 N NEXT 513 Variations Executed Each Cycle for ON Condition FOR 512 Executed Each Cycle for ON Condition NEXT 513 Immediate Refreshing Specification Not supported Block program are...

Page 223: ... A B B C A B B C and A B B C Area N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_...

Page 224: ... with a maximum of N repetitions Program BREAK 514 within the loop with the desired execution condition The loop will end before N repetitions if the execution condition is input 2 JME 005 JMP 004 Loop Program a loop with JME 005 before JMP 004 The instructions between JME 005 and JMP 004 will be executed repeatedly as long as the execu tion condition for JMP 004 is OFF A Cycle Time Too Long error...

Page 225: ...n D00200 and then increments the content of D00200 by 1 3 5 8 BREAK LOOP BREAK 514 Purpose Programmed in a FOR NEXT loop to cancel the execution of the loop for a given execution condition The remaining instructions in the loop are pro cessed as NOP 000 instructions Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON if more than 15 loops are nested OFF in all o...

Page 226: ...fresh method can be set to either BCD or binary for other CPU Units in the CS and CJ Series i e the CS1 H CJ1 H CJ1M and CS1D CPU Units see notes 1 and 2 Using binary data instead of BCD allows the SV range for timers and counter to be increased from 0 to 9999 to 0 to 65535 It also enables using binary data calculated with other instructions directly as a timer counter SV The refresh method is val...

Page 227: ...ation Instruction Mnemonic BCD Binary Timer counter instructions TIMER TIM TIMX 550 HIGH SPEED TIMER TIMH 015 TIMHX 551 ONE MS TIMER TMHH 540 TMHHX 552 ACCUMULATIVE TIMER TTIM 087 TTIMX 555 LONG TIMER TIML 542 TIMLX 553 MULTI OUTPUT TIMER MTIM 543 MTIMX 554 COUNTER CNT CNTX 546 REVERSIBLE COUNTER CNTR 012 CNTRX 548 RESET TIMER COUNTER CNR 545 CNRX 547 Block programming instructions TIMER WAIT TIMW...

Page 228: ...em TIM TIMX 550 TIMH 015 TIMHX 551 TMHH 540 TMHHX 552 TTIM 087 TTIMX 555 TIML 542 TIMLX 553 MTIM 543 MTIMX 554 Item TIM TIMX 550 TIMH 015 TIMHX 551 TMHH 540 TMHHX 552 TTIM 087 TTIMX 555 TIML 542 TIMLX 553 MTIM 543 MTIMX 554 Operating mode change PV 0 Completion Flag OFF Power interrupt reset PV 0 Completion Flag OFF Execution of CNR 545 CNRX 547 Binary PV FFFF Completion Flag OFF BCD PV FFFF or 99...

Page 229: ...broutines Interrupt tasks Not allowed OK OK Not allowed Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area 0000 to 4095 decimal T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary...

Page 230: ...MH 015 TIMHX 551 TMHH 540 TMHHX 552 TTIM 087 TTIMX 555 TIMW 813 TIMWX 816 TMHW 815 and TMHWX 817 instructions If two timers share the same timer number but are not used simultaneously a duplication error will be generated when the program is checked but the timers will operate normally Timers which share the same timer number will not operate properly if they are used simultaneously Timers created...

Page 231: ...in the above case When a TIM TIMX 550 timer is forced set its Completion Flag will be turned ON and its PV will be set to 0000 When a TIM TIMX 550 timer is forced reset its Completion Flag will be turned OFF and its PV will be reset to the SV The operation of the Flag and N Flag depends on the model of the CPU Unit Refer to Flags above for details The timer s Completion Flag is refreshed only when...

Page 232: ...EED TIMER TIMH 015 TIMHX 551 Purpose TIMH 015 TIMHX 551 operates a decrementing timer with units of 10 ms The setting range for the set value SV is 0 to 99 99 s for TIMH 015 and 0 to 655 35 s for TIMHX 551 The timer accuracy is 0 to 0 01 s Note The timer accuracy for CS1D CPU Units is 10 ms the cycle time Execution of TIM TIMX 550 The PV is updated every time that TIM TIMX 550 is exe cuted The Com...

Page 233: ...ed Each Cycle for ON Condition TIMH 015 TIMHX 551 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 ...

Page 234: ... restart the timer the timer input must be turned OFF and then ON again or the timer s PV must be changed to a non zero value by MOV 021 for example The following timing chart shows the behavior of the timer s PV and Comple tion Flag when the timer input is turned OFF before the timer times out Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constant...

Page 235: ...8 to 4095 will be held when the timer is on standby The operation of the Flag and N Flag depends on the model of the CPU Unit Refer to Flags above for details The Completion Flags for TIMH 015 TIMHX 551 timers will be updated when the instruction is executed This operation differs from that for CV series and CVM1 PLCs Timers will be reset or paused in the following cases When a timer is reset its ...

Page 236: ...refreshed only when TIMH 015 TIMHX 551 is executed so a delay of up to one cycle may be required for the Completion Flag to be turned ON after the timer times out If online editing is used to convert a timer to another kind of timer with the same timer number such as TIMH 015 TIMHX 551 TIM TIMX 550 or TIMH 015 TIMHX 551 TMHH 540 TMHHX 552 be sure to reset the Completion Flag The timer will not ope...

Page 237: ...D CPU Units is 10 ms the cycle time Ladder Symbol Variations Applicable Program Areas Operands N Timer Number The timer number must be between 0000 and 0015 decimal S Set Value The set value must be between 0000 and 9999 BCD Timer input CIO 000000 Timer PV T0000 Timer Completion Flag T0000 0100 1 00 s PV refresh method Symbol Operands BCD N 0000 to 15 decimal S 0000 to 9999 BCD Binary N 00000 to 1...

Page 238: ...0 to H511 Auxiliary Bit Area A000 to A959 Timer Area 0000 to 0015 decimal T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_0000...

Page 239: ... mode is changed 2 If the IOM Hold Bit A50012 has been turned ON and the status of the IOM Hold Bit itself is protected in the PLC Setup the status of timer Completion Flags and PVs will be maintained even when the power is interrupted 3 The PV will be set to the SV when TMHH 540 TMHHX 552 is executed When an operating TMHH 540 TMHHX 552 timer is in a jumped program section JMP 004 CJMP 510 CJPN 5...

Page 240: ...or CS1D CPU Units is 10 ms the cycle time Ladder Symbol Variations Applicable Program Areas Operands N Timer Number The timer number must be between 0000 to 4095 decimal S Set Value The set value must be between 0000 and 9999 BCD Execution of TMHH 540 TMHHX 552 The Completion Flag is turned ON if the PV is 0000 The Completion Flag is turned OFF if the PV isn t 0000 1 ms interval refreshing The tim...

Page 241: ...an be executed Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area 0000 to 4095 decimal T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_000...

Page 242: ...ogrammed between IL 002 and ILC 003 When an operating TTIM 087 TTIMX 555 timer is in a program section between JMP 004 and JME 005 and the program section is jumped the PV will retain its previous value Be sure to take this fact into account when TTIM 087 TTIMX 555 is programmed between JMP 004 and JME 005 When a TTIM 087 TTIMX 555 timer is forced set its Completion Flag will be turned ON and its ...

Page 243: ...set input is turned ON the timer PV will be reset to 0000 and the Com pletion Flag T0001 will be turned OFF Usually the reset input is turned ON to reset the timer and then the timer input is turned ON to start timing If the timer input is turned OFF before the SV is reached the timer will stop timing but the PV will be maintained The timer will resume from its previous PV when the timer input is ...

Page 244: ... hexadecimal for TIMLX 553 Operand Specifications D1 Completion Flag D2 PV word S SV word TIMLX 543 D1 D2 S Variations Executed Each Cycle for ON Condition TIML 542 TIMLX 553 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tas...

Page 245: ... must be turned OFF and then ON again or the timer s PV must be changed to a non zero value by MOV 021 for example Flags EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Consta...

Page 246: ...FF When an operating TIML 542 TIMLX 553 timer is in a program section between JMP 004 and JME 005 and the program section is jumped the PV will retain its previous value Be sure to take this fact into account when TIML 542 TIMLX 553 is programmed between JMP 004 and JME 005 Be sure that the words specified for the Completion Flag and PV D1 D2 and D2 1 are not used in other instructions If these wo...

Page 247: ...pletion Flags as well as the pause and reset bits D2 PV Word D2 contains the 4 digit binary or BCD PV D1 Completion Flags D2 PV word S First SV word MTIM 543 D1 D2 S D1 Completion Flags D2 PV word S First SV word MTIMX 554 D1 D2 S Variations Executed Each Cycle for ON Condition MTIM 543 MTIMX 554 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not ...

Page 248: ... S CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6136 Work Area W000 to W511 W000 to W504 Holding Bit Area H000 to H511 H000 to H504 Auxiliary Bit Area A448 to A959 A000 to A952 Timer Area T0000 to T4095 T0000 to T4088 Counter Area C0000 to C4095 C0000 to C4088 DM Area D00000 to D32767 D00000 to D32760 EM Area without bank E00000 to E32767 E00000 to E32760 EM Area with bank En_00000 to En_32767 n ...

Page 249: ... be reset to 0000 and all of the Com pletion Flags will be turned OFF If the reset bit is turned ON while the timer is operating or paused the PV will be reset to 0000 and all of the Completion Flags will be turned OFF The following table shows the operation of MTIM 543 MTIMX 554 for the four possible combinations of the reset and pause bits Index Registers Indirect addressing using Index Register...

Page 250: ...at several points in the program The timer s Completion Flag is refreshed only when MTIM 543 MTIMX 554 is executed so a delay of up to one cycle may be required for the Completion Flag to be turned ON after the timer times out When MTIM 543 MTIMX 554 is in a program section between IL 002 and ILC 003 and the program section is interlocked the PV will retain its previous value it won t be reset Be ...

Page 251: ...o the PV and the corresponding Completion Flags CIO 010000 through CIO 010007 are turned on when the SV PV Reset bit Completion Flags Pause bit Timer PV Timer SVs Incrementing Corresponding completion flag ON when SV PV D1 0100CH D2 D00100 S D00200 S 1 D00201 S 2 D00202 S 3 D00203 S 4 D00204 S 5 D00205 S 6 D00206 S 7 D00207 Timer input CIO 000000 Timer SVs Reset bit CIO 010008 PV maintained Timing...

Page 252: ...nput Variations Executed Each Cycle for ON Condition CNT CNTX 546 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Data Range BCD 0000 to 9999 Binary 0 to 65535 decimal 0000 to FFFF hex Area N S CIO A...

Page 253: ...gs are left unchanged Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants BCD 0000 to 9999 BCD cannot be used Binary 0 to 65535 decimal 0000 to FFFF hex Data Registers DR0 to DR15 Index Registers Indirect address ing using Index Registers IR0 to I...

Page 254: ...set its Completion Flag will be turned OFF and its PV will be set to the SV Be sure to reset the counter by turning the reset input from OFF ON OFF before beginning counting with the count input as shown in the following diagram The count input won t be received if the reset input is ON The reset input will take precedence and the counter will be reset if the reset input and count input are both O...

Page 255: ...r S Set value CNTR 012 N S Increment input Reset input Decrement input N Counter number S Set value CNTRX 548 N S Increment input Reset input Decrement input Variations Executed Each Cycle for ON Condition CNTR 012 CNTRX 548 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program ...

Page 256: ... Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area 0000 to 4095 decimal C0000 to C4095 DM Area D00000 to D32767 EM Area with out bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E0...

Page 257: ...utting the CNTR 012 CNTRX 548 instruction with mnemonics first enter the increment input II then the decrement input DI the reset input R and finally the CNTR 012 CNTRX 548 instruction When entering with the ladder diagrams first input the increment input II then the CNTR 012 CNTRX 548 instruction the decrement input DI and finally the reset input R Examples Basic Operation of CNTR 012 CNTRX 548 T...

Page 258: ... the content of CIO 0001 is controlled by an exter nal switch the set value can be changed manually from the switch Increment input CIO 000000 Counter PV C0001 Completion Flag C0001 Decrement input CIO 000001 Reset input CIO 000002 SV Increment input Decrement input Reset input Increment input Decrement input Completion Flag Roll over Roll over Fixed SV 5000 SV CIO 0001 ...

Page 259: ...e timer num bers or counter numbers Operand Specifications N1 First number in range N2 Last number in range CNR 545 N1 N2 N1 First number in range N2 Last number in range CNRX 547 N1 N2 Variations Executed Each Cycle for ON Condition CNR 545 CNRX 547 Executed Once for Upward Differentiation CNR 545 CNRX 547 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification...

Page 260: ...Flags Precautions CNR 545 CNRX 547 doesn t reset the timer counter instructions them selves it resets the PVs and Completion Flags allocated to those instructions In most cases the effect of CNR 545 CNRX 547 is different from directly resetting the instructions For example when a TIM TIMX 550 instruction is reset directly its PV is set to the SV but when that timer is reset by CNR 545 CNRX 547 its...

Page 261: ...ndard TIM and CNT instructions Two TIM Instructions In this example two TIM instructions are combined to make a 30 minute timer TIM and CNT Instructions In this example a TIM instruction and a CNT instruction are combined to make a 500 second timer TIM 0001 generates a pulse every 5 s and CNT 0002 counts these pulses The set value for this combination is the timer interval counter SV In this case ...

Page 262: ...CNT instructions are com bined to make a BCD counter with an SV of 20 000 000000 LD 010000 000001 LD 000001 000002 CNT 0002 0100 000003 LD 000000 000004 AND NOT 010000 000005 AND NOT C0002 000006 TIM 0001 0050 000007 LD T0001 000008 OUT 010000 000009 LD C0002 000010 OUT 000201 Address Instruction Operands Start Count up 000000 1 s 1 s clock 000001 A20011 C0001 Address Instruction Operands 000000 L...

Page 263: ...s ON or OFF In this example CIO 000204 will be ON for 1 5 seconds the SV of T0001 after CIO 000000 goes ON CIO 000000 CIO 000500 5 0 s 3 0 s Address Instruction Operands 000000 LD 000000 000001 TIM 0001 0050 000002 LD 000500 000003 AND NOT 000000 000004 TIM 0002 0030 000005 LD T0001 000006 LD T0002 000007 KEEP 011 000500 000000 LD 000000 000001 LD 001000 000002 AND NOT 010000 000003 OR 000000 0000...

Page 264: ...ssed using Index Regis ters When Index Registers will be used for indirect addressing use MOVRW 561 MOVE TIMER COUNTER PV TO REGISTER to set the PLC memory address of the desired timer or counter s PV to the desired Index Register The following timers and counters can be indirectly addressed using Index Registers TIM TIMX 550 TIMH 015 TIMHX 551 TTIM 087 TTIMX 555 TMHH 540 TMHHX 552 TIMW 813 TIMWX ...

Page 265: ...example shows a program section that uses indirect addressing to define and start 100 timers with SVs contained in D00100 through D00199 IR0 contains the PLC memory address of the timer PV and IR1 contains the PLC memory address of the timer Completion Flag 1 2 3 1 MOVRW 561 moves the PLC memory address of the PV for timer T0000 to IR0 Afterwards IR0 can be used in place of the timer number DM add...

Page 266: ...ers with this common subroutine IR0 The PLC memory address of the timer s PV IR1 The PLC memory address of the timer s Completion Flag IR2 The PLC memory address of the timer s execution condition D00000The DM address of the word containing the timer s SV The subroutine above is equivalent to the 400 instructions below 000000 LD NOT 200000 000001 TIM 0000 D00100 000002 LD T0000 000003 OUT 200000 0...

Page 267: ...ison instructions Ladder Symbol Variations Applicable Program Areas Operand Specifications for Instructions for One word Data Instruction Mnemonic Function code Page Input Comparison Instructions LD AND OR L S 300 to 328 246 COMPARE CMP 020 252 DOUBLE COMPARE CMPL 060 254 SIGNED BINARY COMPARE CPS 114 257 DOUBLE SIGNED BINARY COMPARE CPSL 115 260 MULTIPLE COMPARE MCMP 019 263 TABLE COMPARE TCMP 08...

Page 268: ...R0 to IR15 Area S1 S2 Area S1 S2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_327...

Page 269: ...ecified the comparison will be for one word unsigned data With the three input types and two options there are 72 different input comparison instructions Unsigned input comparison instructions i e instructions without the S option can handle unsigned binary or BCD data Signed input comparison instruc tions i e instructions with the S option handle signed binary data Input type Operation LD The ins...

Page 270: ...EQUAL AND L AND DOUBLE NOT EQUAL OR L OR DOUBLE NOT EQUAL 307 LD S LOAD SIGNED NOT EQUAL AND S AND SIGNED NOT EQUAL OR S OR SIGNED NOT EQUAL 308 LD SL LOAD DOUBLE SIGNED NOT EQUAL AND SL AND DOUBLE SIGNED NOT EQUAL OR SL OR DOUBLE SIGNED NOT EQUAL 310 LD LOAD LESS THAN True if C1 C2 AND AND LESS THAN OR OR LESS THAN 311 LD L LOAD DOUBLE LESS THAN AND L AND DOUBLE LESS THAN OR L OR DOUBLE LESS THAN...

Page 271: ...R L OR DOUBLE GREATER THAN OR EQUAL 327 LD S LOAD SIGNED GREATER THAN OR EQUAL AND S AND SIGNED GREATER THAN OR EQUAL OR S OR SIGNED GREATER THAN OR EQUAL 328 LD SL LOAD DBL SIGNED GREATER THAN OR EQUAL AND SL AND DBL SIGNED GREATER THAN OR EQUAL OR SL OR DBL SIGNED GREATER THAN OR EQUAL Code Mnemonic Name Function Name Label Operation Error Flag ER OFF or unchanged See note Greater Than Flag ON i...

Page 272: ...the next instruction line AND SIGNED LESS THAN AND S 312 When CIO 000001 is ON in the following example the contents of D00110 and D00210 are compared as signed binary data If the content of D00110 is less than that of D00210 CIO 005001 is turned ON and execution proceeds to the next line If the content of D00110 is not less than that of D00210 the remainder of the instruction line is skipped and ...

Page 273: ...Specification See note CMP 020 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C...

Page 274: ...truction with a branch from the same input condition that controls CMP 020 as shown in the following dia gram In this case the Equals Flag and output A will be turned ON when S1 S2 Using CMP 020 Results in the Program Do not program another instruction between CMP 020 and the instruction controlled by the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag ...

Page 275: ...PL 060 Purpose Compares two double unsigned binary values constants and or the contents of specified words and outputs the result to the Arithmetic Flags in the Auxil iary Area Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER OFF or unchanged See note Greater Than Flag ON if S1 S2 OFF in all other cases Greater Than or Equal Flag ON if S1 S2 OFF in all other cas...

Page 276: ...000 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFF...

Page 277: ...ge the status of the Arithmetic Flag In this case the results of instruction B might change the results of CMPL 060 Flags Arithmetic Flag Example Equal Flag Correct Use of CMPL 060 CMPL S1 S2 A Arithmetic Flag Example Equals Flag Incorrect Use of CMPL 060 Instruction B CMPL S1 S2 A Name Label Operation Error Flag ER OFF or unchanged See note Greater Than Flag ON if S1 1 S1 S2 1 S2 OFF in all other...

Page 278: ...y saved to CIO 000200 Greater Than CIO 000201 Equals and CIO 000202 Less Than 3 7 4 SIGNED BINARY COMPARE CPS 114 Purpose Compares two signed binary values constants and or the contents of speci fied words and outputs the result to the Arithmetic Flags in the Auxiliary Area Ladder Symbol Variations Note Immediate refreshing is not supported by the CS1D CPU Units Applicable Program Areas Operand Sp...

Page 279: ...or right hand instruction with a branch from the same input condition that controls CPS 114 as shown in the following dia Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to ...

Page 280: ...he external input word specified in S1 and or S2 and that refreshed value will be compared Immediate refreshing cannot be performed on inputs allocated to Group 2 High density I O Units or Units mounted to Slave Racks Flags CPS S1 S2 A Arithmetic Flag Example Equal Flag Correct Use of CPS 114 CPS S1 S2 A Arithmetic Flag Example Equal Flag Incorrect Use of CPS 114 Instruction B Name Label Operation...

Page 281: ... S2 Comparison data 2 CPSL 115 S1 S2 Variations Executed Each Cycle for ON Condition CPSL 115 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Ho...

Page 282: ...is reflected in the Arithmetic Flags Control the desired output or right hand instruction with a branch from the same input condition that controls CPSL 115 as shown in the following dia gram Here the Equals Flag and output A will be turned ON when S1 1 S1 S2 1 S2 Using CPSL 115 Results in the Program Do not program another instruction between CPSL 115 and the instruction controlled by the Arithme...

Page 283: ... than that of D00006 and D00005 the Greater Than Flag will be turned ON causing CIO 002000 to be turned ON If the content of D00002 and D00001 is equal to that of D00006 and D00005 the Equals Flag will be turned ON causing CIO 002001 to be turned ON If the content of D00002 and D00001 is less than that of D00006 and D00005 the Less Than Flag will be turned ON causing CIO 002002 to be turned ON CPS...

Page 284: ... bit of R contains the result of a comparison between two words in the 16 word sets Bit n of R n 00 to 15 contains the result of the comparison between words S1 n and S2 n 1 0 0 1234 5678 ABCD EF12 Flag status Comparison D0001 D0005 S1 First word of set 1 S2 First word of set 2 R Result word MCMP 019 S1 S2 R Variations Executed Each Cycle for ON Condition MCMP 019 Executed Once for Upward Differen...

Page 285: ...S2 R CIO Area CIO 0000 to CIO 6128 CIO 0000 to CIO 6143 Work Area W000 to W496 W000 to W511 Holding Bit Area H000 to H496 H000 to H511 Auxiliary Bit Area A000 to A944 A448 to A959 Timer Area T0000 to T4080 T0000 to T4095 Counter Area C0000 to C4080 C0000 to C4095 DM Area D00000 to D32752 D00000 to D32767 EM Area without bank E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to 32752 n 0...

Page 286: ...word when the contents of the words are equal Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER OFF Equals Flag ON if the result word is 0000 The two 16 word sets contain the same data OFF in all other cases S1 S2 R D00300 S Source data T First word of table R Result word TCMP 085 S T R Variations Executed Each Cycle for ON Condition TCMP 085 Executed Once for Up...

Page 287: ... W511 Holding Bit Area H000 to H511 H000 to H496 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A944 A448 to A959 Timer Area T0000 to T4095 T0000 to T4080 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4080 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32752 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to En_32...

Page 288: ... R is turned ON if they are equal or OFF if they are not equal and S is compared to the content of T 15 and bit 15 of R is turned ON if they are equal or OFF if they are not equal Flags Example When CIO 000000 is ON in the following example TCMP 085 compares the content of D00100 with the contents of words D00200 through D00215 and turns ON the corresponding bits in D00300 when the contents are eq...

Page 289: ...ations Executed Each Cycle for ON Condition BCMP 068 Executed Once for Upward Differentiation BCMP 068 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Comparison result for S and range B 30 B 31 Comparison result for S and range B 2 B 3 Comparison result for S an...

Page 290: ...R B 22 S B 23 Bit 11 of R B 24 S B 25 Bit 12 of R B 26 S B 27 Bit 13 of R B 28 S B 29 Bit 14 of R B 30 S B 31 Bit 15 of R For example bit 00 of R is turned ON if S is within the first range B S B 1 bit 01 of R is turned ON if S is within the second range B 2 S B 3 and bit 15 of R is turned ON if S is within the fifteenth range B 30 S B 31 All other bits in R are turned OFF EM Area with bank En_000...

Page 291: ... or OFF when S is not within the range 3 7 9 EXPANDED BLOCK COMPARE BCMP2 502 CJ1M Only Purpose Compares the source data to up to 256 ranges defined by 256 lower limits and 256 upper limits and turns ON the corresponding bit in the result word when the source data is within a range BCMP2 502 is supported by the CJ1M CPU Units only Ladder Symbol Name Label Operation Error Flag ER OFF Equals Flag ON...

Page 292: ...on Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK B 31 B 32 B 33 B 34 B 35 B 36 B 37 B 38 Range 15 value A Range 15 value B Range 16 value A Range 16 value B Range 17 value A Range 17 value B Range 18 value A Range 18 value B B 2N 1 B 2 N 1 Range N value A Range N value B B B 1 B 2 B 3 B 4 B 5 B 6 Range ...

Page 293: ...to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank EM Area with bank Indirect DM EM addresses in binary D00000 to D32767 Indirect DM EM addresses in BCD D00000 to D32767 Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 ...

Page 294: ...15 Flags Example When CIO 000000 is ON in the following example BCMP2 502 compares the content of CIO 0010 with the 24 ranges defined in D00200 through D00247 N 17 hex 23 decimal i e 24 ranges and turns ON the corre sponding bits in CIO 0100 and CIO 0101 when S is within the range and OFF when S is not within the range For example if the source data in CIO 0010 is in the range defined by D00201 an...

Page 295: ...0238 D00248 0 1 0 0 0 1 8 0 0 2 6 0 1 8 0 0 0 5 0 0 0 1 0 0 0 2 0 0 2 0 0 0 R CIO 0100 R CIO 0101 Bit S CIO 0010 0 1 7 5 0 0 1 7 D00201 D00203 D00205 D00231 D00233 D00235 D00237 D00247 0 0 0 0 0 0 8 0 0 1 6 0 1 2 0 0 1 5 0 0 1 9 0 0 1 8 0 0 0 1 0 0 ZCP 088 CD LL UL CD Comparison Data LL Lower limit of range UL Upper limit of range Variations Executed Each Cycle for ON Condition ZCP 088 Executed On...

Page 296: ...utput or right hand instruction with a branch from the same input condition that controls ZCP 088 as shown in the following dia gram In this case the Equals Flag and output A will be turned ON when LL CD UL EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D327...

Page 297: ... D00000 is compared to the range 0005 to 001F Hex 5 to 31 decimal and the result is output to the Arithmetic Flags CIO 000200 is turned ON if 0005 Hex content of D00000 001F Hex CIO 000201 is turned ON if the content of D00000 001F Hex CIO 000202 is turned ON if the content of D00000 0005 Hex A ZCP CD LL UL Arithmetic Flag Example Equal Flag Correct Use of ZCP 088 A ZCPL CD LL UL Arithmetic Flag E...

Page 298: ...001F CD LL UL Arithmetic Flags ZCPL 116 CD LL UL CD First word of Comparison Data LL First word of Lower Limit UL First word of Upper Limit Variations Executed Each Cycle for ON Condition ZCP 088 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subr...

Page 299: ...ction might change the status of the Arithmetic Flag The operation of ZCPL 116 is almost identical to that of ZCP 088 except that ZCPL 116 compares 32 bit values instead of 16 bit values Refer to 3 7 10 AREA RANGE COMPARE ZCP 088 for diagrams showing how to use results in the program and an example program section Flags Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 ...

Page 300: ...L OFF in all other cases Less Than or Equal Flag Left unchanged Negative Flag N Left unchanged Name Label Operation S Source D Destination MOV 021 S D Variations Executed Each Cycle for ON Condition MOV 021 Executed Once for Upward Differentiation MOV 021 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note MOV 021 Combined Variations Executed Once a...

Page 301: ...CIO 000000 is ON in the following example the content of CIO 0100 is copied to D00100 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 ...

Page 302: ...ks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En...

Page 303: ...ord Destination word Bit status inverted Name Label Operation Error Flag ER OFF Equals Flag ON if the content of D is 0000 after execution OFF in all other cases Negative Flag N ON if the leftmost bit of D is 1 after execution OFF in all other cases S First source word D First destination word MOVL 498 S D Variations Executed Each Cycle for ON Condition MOVL 498 Executed Once for Upward Differenti...

Page 304: ...0000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to 1 IR5 Area S D S D Bit sta...

Page 305: ...uted Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM ...

Page 306: ... unchanged 3 8 5 MOVE BIT MOVB 082 Purpose Transfers the specified bit Ladder Symbol Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D S D S 1 D 1 Bit status inverted Name Label Operation Error Flag ER OFF Equals Flag ON if the contents of D 1 and D are 0000 0000 after ...

Page 307: ...to 15 decimal Source bit 00 to 0F 0 to 15 decimal 15 8 0 7 C m n Area S C D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in bin...

Page 308: ...C05 3 8 6 MOVE DIGIT MOVD 083 Purpose Transfers the specified digit or digits Each digit is made up of 4 bits Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON if the rightmost and leftmost two digits of C are not within the specified range of 00 to 0F OFF in all other cases S Source word or data C Control word D Destination word MOVD 083 S C D Variations Exec...

Page 309: ... digit in D l 0 to 3 First digit in S m 0 to 3 Number of digits n 0 to 3 0 1 digit 1 2 digits 2 3 digits 3 4 digits 15 8 0 11 3 7 4 12 C 0 n m l Digit 3 Digit 2 Digit 1 Digit 0 15 8 0 11 3 7 4 12 D Area S C D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D...

Page 310: ...ollowing example four digits of data are cop ied from CIO 0200 to CIO 0300 The transfer begins with the digit 1 of CIO 0200 and digit 0 or CIO 0300 in accordance with the control word s value of 0031 Note After reading the leftmost digit of S digit 3 MOVD 083 wraps to the right most digit digit 0 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047...

Page 311: ...cessary Note The source words must be in the same data area Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 C Control word S First source word D First destination word XFRB 062 C S D Variation...

Page 312: ...cified in C as shown in the fol lowing diagram D 16 max 15 0 D to to Area C S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in...

Page 313: ...DW 034 to shift m bits by n spaces Flags Precautions Up to 255 bits of data can be transferred per execution of XFRB 062 Be sure that the source words and destination words do not exceed the end of the data area Examples When CIO 000000 is ON in the following example the 20 bits beginning with CIO 020006 are copied to the 20 bits beginning with CIO 030000 3 8 8 BLOCK TRANSFER XFER 070 Purpose Tran...

Page 314: ...nce for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK S N 1 15 0 S to to D N 1 to 15 0 D to Area N S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to ...

Page 315: ...ll be required to complete XFER 070 when a large number of words is being transferred In this case the XFER 070 transfer might not be completed if a power interruption occurs during execution of the instruction Example When CIO 000000 is ON in the following example the 10 words D00100 through D00109 are copied to D00200 through D00209 Data Registers DR0 to DR15 Index Registers Indirect addressing ...

Page 316: ...ea Operand Specifications S Source word St Starting word E End word BSET 071 S St E Variations Executed Each Cycle for ON Condition BSET 071 Executed Once for Upward Differentiation BSET 071 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Source data Destination ...

Page 317: ...0 is ON in the following example the source data in D00100 is copied to D00200 through D00209 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF bi...

Page 318: ...G 073 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area E1 E2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM A...

Page 319: ... the contents of a pair of consecutive words with another pair of consecutive words Ladder Symbol Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area E1 E2 E2...

Page 320: ...as Step program areas Subroutines Interrupt tasks OK OK OK OK Area E1 E2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D3...

Page 321: ...tination word calculated by adding an offset value to the base address Ladder Symbol Variations 2nd XFER 070 operation 1st XFER 070 operation 3rd XFER 070 operation Buffer E2 E1 Name Label Operation Error Flag ER OFF or unchanged See note Equals Flag OFF or unchanged See note Negative Flag N OFF or unchanged See note S Source word Bs Destination base address Of Offset DIST 080 S Bs Of Variations E...

Page 322: ...a CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C In...

Page 323: ...ther words by changing the offset in D00300 3 8 13 DATA COLLECT COLL 081 Purpose Transfers the source word calculated by adding an offset value to the base address to the destination word Ladder Symbol Variations S Bs Bs n Of Name Label Operation Error Flag ER OFF Equals Flag ON if the source data is 0000 OFF in all other cases Negative Flag N ON if the leftmost bit of the source data is 1 OFF in ...

Page 324: ... Of D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C In...

Page 325: ...OVE TO REGISTER MOVR 560 Purpose Sets the PLC memory address of the specified word bit or timer counter Completion Flag in the specified Index Register Use MOVRW 561 to set the PLC memory address of a timer counter PV in an Index Register Ladder Symbol Variations Bs Bs n Of Name Label Operation Error Flag ER OFF Equals Flag ON if the source data is 0000 OFF in all other cases Negative Flag N ON if...

Page 326: ...ogram areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6143 CIO 000000 to CIO 614315 Work Area W000 to W511 W00000 to W51115 Holding Bit Area H000 to H511 H00000 to H51115 Auxiliary Bit Area A000 to A447 A448 to A959 A00000 to A44715 A44800 to A95915 Timer Area T0000 to T4095 Completion Flag Counter Area C0000 to C4095 Completion Flag Task Flag TK0000 to TK0031 DM Ar...

Page 327: ...NTER PV TO REGISTER MOVRW 561 Purpose Sets the PLC memory address of the specified timer or counter s PV in the specified Index Register Use MOVR 560 to set the PLC memory address of a word bit or timer counter Completion Flag in an Index Register Ladder Symbol Variations Applicable Program Areas Operands D Destination The destination must be an Index Register IR0 to IR15 Name Label Operation Erro...

Page 328: ...s MOVRW 561 cannot set the PLC memory addresses of data area words bits or timer counter Completion Flags Use MOVR 560 to set these PLC memory addresses Area S D CIO Area Work Area Holding Bit Area Auxiliary Bit Area Timer Area T0000 to T4095 present value Counter Area C0000 to C4095 present value DM Area EM Area without bank EM Area with bank Indirect DM EM addresses in binary Indirect DM EM addr...

Page 329: ...FT 016 316 ARITHMETIC SHIFT LEFT ASL 025 317 DOUBLE SHIFT LEFT ASLL 570 319 ARITHMETIC SHIFT RIGHT ASR 026 321 DOUBLE SHIFT RIGHT ASRL 571 322 ROTATE LEFT ROL 027 324 DOUBLE ROTATE LEFT ROLL 572 326 ROTATE LEFT WITHOUT CARRY RLNC 574 331 DOUBLE ROTATE LEFT WITH OUT CARRY RLNL 576 332 ROTATE RIGHT ROR 028 327 DOUBLE ROTATE RIGHT RORL 573 329 ROTATE RIGHT WITHOUT CARRY RRNC 575 334 DOUBLE ROTATE RIG...

Page 330: ...ecuted Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Area St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area Counter Area DM Area EM Area without bank EM Area with bank Indirect DM ...

Page 331: ...ed indirectly using index registers and the actual addresses in I O memory are not within memory areas for data an error will occur and the Error Flag will turn ON Examples Shift Register Exceeding 16 Bits The following example shows a 48 bit shift register using words CIO 0128 to CIO 0130 A 1 s clock pulse is used so that the execution condition produced by CIO 000005 is shifted into a 3 word reg...

Page 332: ...input Reset Shift input Area C St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En...

Page 333: ... will turn ON Examples Shifting Data If shift input CIO 030014 goes ON when CIO 000000 is ON and the reset bit CIO 030015 is OFF words CIO 0100 through CIO 0102 will shift one bit in the direction designated by CIO 030012 e g 1 Right and the contents of input bit CIO 030013 will be shifted into the rightmost bit CIO 010000 The con tents of CIO 010215 will be shifted to the Carry Flag CY Resetting ...

Page 334: ... contents of the input bit bit 13 of C I O is shifted to bit 15 on the end word and each bit thereafter is shifted one bit to the right The status of bit 00 of the starting word is shifted to the Carry Flag 3 9 3 ASYNCHRONOUS SHIFT REGISTER ASFT 017 Purpose Shifts all non zero word data within the specified word range either towards St or toward E replacing 0000Hex word data Ladder Symbol Variatio...

Page 335: ... shifted toward E 1 Non zero data shifted toward St Shift Enable Bit 0 Shift disabled 1 Shift enabled Clear Bit 0 Data not reset 1 All data from St to E is reset Area C St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without ban...

Page 336: ...0 is ON all words with non zero data content from CIO 0100 through CIO 0109 will be shifted in the direction designated by the Shift Direction Bit CIO 030013 e g 1 Toward St if the word to the left of the non zero data is all zeros St E St E Shift direction Shift enabled Clear Convert Convert Non zero data Zero data Name Label Operation Error Flag ER ON when St is greater than E OFF in all other c...

Page 337: ...routines Interrupt tasks OK OK OK OK Area S St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000...

Page 338: ...ed in CIO 0100 and the contents of CIO 0102 will be lost 3 9 5 ARITHMETIC SHIFT LEFT ASL 025 Purpose Shifts the contents of Wd one bit to the left Ladder Symbol Variations Applicable Program Areas Operand Specifications Lost St E Name Label Operation Error Flag ER ON when St is greater than E OFF in all other cases Lost St E E CIO 0100 St CIO 0101 St CIO 0102 S CIO 0300 Wd Word ASL 025 Wd Variatio...

Page 339: ...32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048...

Page 340: ...ifferentiation ASLL 570 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000...

Page 341: ...of Wd 1 is 1 the Neg ative Flag will turn ON Examples When CIO 000000 is ON word CIO 0100 and CIO 0101 will shift one bit to the left 0 is placed into CIO 010000 and the contents of CIO 010015 will be shifted to the Carry Flag CY Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 I...

Page 342: ...t tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n ...

Page 343: ...015 and the contents of CIO 010000 will be shifted to the Carry Flag CY 3 9 8 DOUBLE SHIFT RIGHT ASRL 571 Purpose Shifts the contents of Wd and Wd 1 one bit to the right Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER OFF Equals Flag ON when the shift result is 0 OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in all other c...

Page 344: ...Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constant...

Page 345: ...ard Differentiation ROL 027 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D0...

Page 346: ...lear Carry CLC 041 instructions Examples When CIO 000000 is ON word CIO 0100 and the Carry Flag CY will shift one bit to the left The contents of CIO 010015 will be shifted to the Carry Flag CY and the Carry Flag contents will be shifted to CIO 010000 Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 I...

Page 347: ...ication Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM...

Page 348: ...CY and the Carry Flag contents will be shifted to CIO 010000 3 9 11 ROTATE RIGHT ROR 028 Purpose Shifts all Wd bits one bit to the right including the Carry Flag CY Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER OFF Equals Flag ON when the shift result is 0 OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in all other cases ...

Page 349: ...Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing u...

Page 350: ...plicable Program Areas Operand Specifications Wd CIO 0100 Instruction executed once Wd Wd Word RORL 573 Wd Variations Executed Each Cycle for ON Condition RORL 573 Executed Once for Upward Differentiation RORL 573 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK A...

Page 351: ...00000 is ON word CIO 0100 CIO 0101 and the Carry Flag CY will shift one bit to the right The contents of CIO 010000 will be shifted to the Carry Flag CY and the Carry Flag contents will be shifted to CIO 010115 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR1...

Page 352: ...outines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_0000...

Page 353: ...lag CY The contents of CIO 010015 will be shifted to CIO 010000 3 9 14 DOUBLE ROTATE LEFT WITHOUT CARRY RLNL 576 Purpose Shifts all Wd and Wd 1 bits one bit to the left not including the Carry Flag CY Ladder Symbol Variations Wd Name Label Operation Error Flag ER OFF Equals Flag ON when the shift result is 0 OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in al...

Page 354: ...00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to ...

Page 355: ...ents of the rightmost bit of Wd shifts to the leftmost bit and to the Carry Flag CY Ladder Symbol Variations Applicable Program Areas Operand Specifications Instruction executed once Wd 1 CIO 0101 Wd CIO 0100 1 Wd Wd Word RRNC 575 Wd Variations Executed Each Cycle for ON Condition RRNC 575 Executed Once for Upward Differentiation RRNC 575 Executed Once for Downward Differentiation Not supported Im...

Page 356: ...n binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Wd Wd Name Label Operation Error ...

Page 357: ... Instruction executed once Wd CY Wd Word RRNL 577 Wd Variations Executed Each Cycle for ON Condition RRNL 577 Executed Once for Upward Differentiation RRNL 577 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to...

Page 358: ...tructions Examples When CIO 000000 is ON words CIO 0100 and CIO 0101 will shift one bit to the right excluding the Carry Flag CY The contents of CIO 010000 will be shifted to CIO 010115 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 204...

Page 359: ...p program areas Subroutines Interrupt tasks OK OK OK OK Area St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E0...

Page 360: ...laced in bits 0 to 3 of word CIO 0100 and the contents of bits 12 to 15 of CIO 0102 will be lost 3 9 18 ONE DIGIT SHIFT RIGHT SRD 075 Purpose Shifts data by one digit 4 bits to the right Ladder Symbol Variations Applicable Program Areas Note St and E must be in the same data area Operand Specifications Lost E S t Name Label Operation Error Flag ER ON when St is greater than E OFF in all other case...

Page 361: ...D 075 is being exe cuted causing the shift operation to stop halfway through Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in...

Page 362: ... 0100 Lost St E D Beginning word for shift C Beginning bit N Shift data length NSFL 578 D C N Variations Executed Each Cycle for ON Condition NSFL 578 Executed Once for Upward Differentiation NSFL 578 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area D C N CIO...

Page 363: ...ts from the beginning bit 3 to the shift data length B hex will be shifted one bit to the left from the rightmost bit to the leftmost bit 0 will be placed into bit 3 of CIO 0100 The contents of the left most bit in the shift area bit 13 of CIO 0100 are copied into the Carry Flag CY Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 000...

Page 364: ...ning bit N Shift data length NSFR 579 D C N Variations Executed Each Cycle for ON Condition NSFR 579 Executed Once for Upward Differentiation NSFR 579 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area D C N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 ...

Page 365: ...a length 11 bits B hex will be shifted one bit to the right from the left most bit to the rightmost bit 0 is shifted into bit 12 of CIO 0100 The con tents of the rightmost bit in the shift area bit 2 of CIO 0100 are copied into the Carry Flag CY Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000...

Page 366: ...80 D C Variations Executed Each Cycle for ON Condition NASL 580 Executed Once for Upward Differentiation NASL 580 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Data shifted into register 0 Hex 0 shifted in 8 Hex Contents of rightmost bit shifted in Always 0 No ...

Page 367: ... D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area D C Shift n bits Lost N bits ...

Page 368: ... turn ON If as a result of the shift the contents of the leftmost bit of D is 1 the Negative Flag will turn ON Examples When CIO 000000 is ON The contents of CIO 0100 is shifted 10 bits to the left from the rightmost bit to the leftmost bit The number of bits to shift is specified in bits 0 to 7 of word CIO 0300 control data The contents of bit 0 of CIO 0100 is copied into bits from which data was...

Page 369: ...tep program areas Subroutines Interrupt tasks OK OK OK OK Always 0 No of bits to shift 00 to 20 Hex 15 8 0 11 7 12 C 0 Data shifted into register 0 Hex 0 shifted in 8 Hex Contents of rightmost bit shifted in Area D C CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A448 to A958 A000 to A959 Timer Ar...

Page 370: ...s 0000 the Equals Flag will turn ON If as a result of the shift the contents of the leftmost bit of D D 1 is 1 the Negative Flag will turn ON Examples When CIO 000000 is ON CIO 0100 and CIO 0101 will be shifted to the left from the rightmost bit to the leftmost bit by 10 bits The number of bits to shift Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C...

Page 371: ...its Ladder Symbol Variations Applicable Program Areas Data shifted into register 8 Hex Contents of right most bit shifted in Always 0 No of bits to shift 10 bits 0A Hex 15 8 0 11 3 7 4 12 C 0 8 0 A Rightmost bit a No of bits to shift 10 bits Contents of the rightmost bit is shifted in Lost 0100 0100 D Shift word C Control word NASR 581 D C Variations Executed Each Cycle for ON Condition NASR 581 E...

Page 372: ...Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A447 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767...

Page 373: ...he Negative Flag will turn ON Examples When CIO 000000 is ON CIO 0100 will be shifted 10 bits to the right from the leftmost bit to the rightmost bit The number of bits to shift is specified in bits 0 to 7 of word CIO 0300 The contents of bit 15 of CIO 0100 is copied into the bits from which data was shifted and the contents of the leftmost bit of data which was shifted out of range is shifted int...

Page 374: ... Upward Differentiation NSRL 583 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Data shifted into register 0 Hex 0 shifted in 8 Hex Contents of rightmost bit shifted in Always 0 No of bits to shift 00 to 20 Hex 15 8 0 11 7 12 C 0 Area D C CIO Area CIO 0000 to CI...

Page 375: ...lag will turn ON EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers DR0 to D...

Page 376: ...rightmost bit The number of bits to shift is specified in bits 0 to 7 of word CIO 0300 control data The contents of bit 15 of CIO will be copied into the bits from which data was shifted and the con tents of the leftmost bit of data which was shifted out of range will be shifted into the Carry Flag CY All other data is lost Data shifted into register 8 Hex Contents of leftmost bit shifted in Alway...

Page 377: ... Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 E...

Page 378: ...every cycle as long as CIO 000000 is ON Operation of 590 The up differentiated variation is used in the following example so the content of D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd Wd Name Label Operation Error Flag ER OFF Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd went from F to 0 duri...

Page 379: ...591 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area w...

Page 380: ...as long as CIO 000000 is ON Operation of L 591 The up differentiated variation is used in the following example so the content of D00101 and D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER OFF Equals Flag ON if the result is 0000 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd 1 or Wd went...

Page 381: ...fferentiation 592 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D3...

Page 382: ... ON Operation of 592 The up differentiated variation is used in the following example so the content of D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON Name Label Operation Error Flag ER OFF Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd went from 0 to F during execution OFF in all other cases Negati...

Page 383: ...593 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area w...

Page 384: ...as long as CIO 000000 is ON Operation of L 593 The up differentiated variation is used in the following example so the content of D00101 and D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER OFF Equals Flag ON if the result is 0000 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd 1 or Wd went...

Page 385: ...on B 594 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM A...

Page 386: ...y cycle as long as CIO 000000 is ON Operation of B 594 The up differentiated variation is used in the following example so the content of D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd Wd Name Label Operation Error Flag ER ON if the content of Wd is not BCD OFF in all other cases Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Car...

Page 387: ...L 595 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area...

Page 388: ...remented by 1 every cycle as long as CIO 000000 is ON Operation of BL 595 The up differentiated variation is used in the following example so the BCD content of D00101 and D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER ON if the content of Wd 1 and Wd is not BCD OFF in all other cases Equals Flag ON if the result is 0...

Page 389: ...iation B 596 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 ...

Page 390: ...up differentiated variation is used in the following example so the BCD content of D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON 1 Wd Wd Name Label Operation Error Flag ER ON if the content of Wd is not BCD OFF in all other cases Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd went from 0 to 9 durin...

Page 391: ... 597 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area ...

Page 392: ...peration of BL 597 The up differentiated variation is used in the following example so the BCD content of D00101 and D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER ON if the content of Wd 1 and Wd is not BCD OFF in all other cases Equals Flag ON if the result is 0000 0000 after execution OFF in all other cases Carry F...

Page 393: ...ED BINARY SUBTRACT WITHOUT CARRY 410 387 DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY L 411 389 SIGNED BINARY SUBTRACT WITH CARRY C 412 393 DOUBLE SIGNED BINARY SUBTRACT WITH CARRY CL 413 395 BCD SUBTRACT WITHOUT CARRY B 414 398 DOUBLE BCD SUBTRACT WITHOUT CARRY BL 415 399 BCD SUBTRACT WITH CARRY BC 416 403 DOUBLE BCD SUBTRACT WITH CARRY BCL 417 404 SIGNED BINARY MULTIPLY 420 406 DOUBLE SIGNED BINA...

Page 394: ...terrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767...

Page 395: ...nt of the leftmost bit of R is 1 the Nega tive Flag will turn ON Examples When CIO 000000 is ON in the following example D00100 and D00110 will be added as 4 digit signed binary values and the result will be output to D00120 Au Ad R CY Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in al...

Page 396: ...utines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 ...

Page 397: ...ontent of the leftmost bit of R 1 is 1 the Negative Flag will turn ON Examples When CIO 000000 is ON D00100 and D00110 and D00111 and D00110 will be added as 8 digit signed binary values and the result will be output to D00120 and D00120 Au 1 Ad 1 R 1 CY Au Ad R Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Operation Error Flag ER OFF Equals Flag ON whe...

Page 398: ...Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E0...

Page 399: ...ga tive Flag will turn ON Note To clear the Carry Flag CY execute the Clear Carry CLC 041 instruction Examples When CIO 000000 is ON D00100 D00110 and CY will be added as 4 digit signed binary values and the result will be output to D00220 CY Au Ad R CY Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Operation Error Flag ER OFF Equals Flag ON when the add...

Page 400: ...rogram areas Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000...

Page 401: ...R 1 is 1 the Negative Flag will turn ON Note To clear the Carry Flag CY execute the Clear Carry CLC 041 instruction Examples When CIO 000000 is ON D00201 D00200 D00211 D00210 and CY will be added as 8 digit signed binary values and the result will be output to D00221 and D00220 Au 1 Ad 1 R 1 CY Au Ad R CY Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Op...

Page 402: ...upt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_...

Page 403: ...rpose Adds 8 digit double word BCD data and or constants Ladder Symbol Variations Applicable Program Areas Au Ad R CY BCD BCD BCD CY will turn ON when there is a carry Name Label Operation Error Flag ER ON when Au is not BCD ON when Ad is not BCD OFF in all other cases Equals Flag ON when the result is 0 OFF in all other cases Carry Flag CY ON when the addition results in a carry OFF in all other ...

Page 404: ...ses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 99999999 BCD Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Au 1 Ad 1 R 1 CY Au ...

Page 405: ...d or constants with the Carry Flag CY Ladder Symbol Variations Applicable Program Areas Operand Specifications Au Augend word Ad Addend word R Result word BC 406 Au Ad R Variations Executed Each Cycle for ON Condition BC 406 Executed Once for Upward Differentiation BC 406 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas S...

Page 406: ...nd the result will be output to D00120 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 9999 BCD Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 ...

Page 407: ...m areas Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D...

Page 408: ...igit BCD values and the result will be output to D00121 and D00120 3 11 9 SIGNED BINARY SUBTRACT WITHOUT CARRY 410 Purpose Subtracts 4 digit single word hexadecimal data and or constants Ladder Symbol Variations Au 1 Ad 1 R 1 CY Au Ad R CY BCD BCD BCD CY will turn ON when there is a carry Name Label Operation Error Flag ER ON when Au Au 1 is not BCD ON when Ad Ad 1 is not BCD OFF in all other case...

Page 409: ...8 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D0000 to D4095 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Da...

Page 410: ... D00120 3 11 10 DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY L 411 Purpose Subtracts 8 digit double word hexadecimal data and or constants Ladder Symbol Variations Applicable Program Areas Carry Flag CY ON when the subtraction results in a borrow OFF in all other cases Overflow Flag OF ON when the result of subtracting a negative number from a positive number is in the range 8000 to FFFF hex OFF in...

Page 411: ...2767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Mi 1 Su 1 R 1 CY Mi Su R Signed...

Page 412: ...ndicate that the result of the subtraction is negative To convert the 2 s complement to the true number an instruction which subtracts the result from 0 is necessary using the Carry Flag CY as an execution con dition Note 2 s Complement A 2 s complement is the value obtained by subtracting each binary digit from 1 and adding one to the result For example the 2 s complement for 1101 is cal culated ...

Page 413: ...nce the Carry Flag is OFF the result FFFE hex is an unsigned positive value of 65534 3 Since the Negative Flag is ON the result FFFE hex is a negative value 2 s complement and is thus 2 4 Since the Carry Flag is ON the result FFFE hex is a negative value 2 s complement and becomes 2 when converted to a true value Example 1 Signed data Unsigned data Example 2 Signed data Unsigned data Negative Flag...

Page 414: ... 2 D 1 CY R 1 D00100 Subtraction at 2 0 0 0 0 0 0 8 R 1 D00101 Su 1 D00101 Su D00100 3 D 6 0 E A 7 9 6 5 1 F 9 2 D 1 CY R 1 D00100 Final Subtraction Result 1 Mi 1 CIO 0201 Mi CIO 0200 2 0 F 5 5 A 0 8 Mi Minuend word Su Subtrahend word R Result word C 412 Mi Su R Variations Executed Each Cycle for ON Condition C 412 Executed Once for Upward Differentiation C 412 Executed Once for Downward Different...

Page 415: ...sters Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Mi Su R CY Mi Su R CY Signed binary Signed binary Signed binary CY will turn ON when there is a borrow Name Label Operation Error Flag ER OFF Equals Flag ON when the subtraction result is 0 OFF in all other cases Carry Flag CY ON when the subtractio...

Page 416: ...ruction Examples When CIO 000000 is ON in the following example D00110 and CY will be subtracted from D00100 as 4 digit signed binary values and the result will be output to D00120 3 11 12 DOUBLE SIGNED BINARY WITH CARRY CL 413 Purpose Subtracts 8 digit double word hexadecimal data and or constants with the Carry Flag CY Ladder Symbol Variations Applicable Program Areas Operand Specifications Mi M...

Page 417: ...essing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Mi Su R Mi 1 Su 1 R 1 CY Mi Su R CY Signed binary Signed binary Signed binary CY will turn ON when there is a borrow Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Carry Flag CY ON when the results in a borrow OFF in ...

Page 418: ...signed binary values and the result will be output to D00121 and D00120 If the result of the subtraction is a negative number Mi Su or Mi 1 Mi Su 1 Su the result is output as a 2 s complement The Carry Flag CY will turn ON To convert the 2 s complement to the true number a program which subtracts the result from 0 is necessary as an input condition of the Carry Flag CY The Carry Flag turning ON th...

Page 419: ...s Interrupt tasks OK OK OK OK Area Mi Su R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E3...

Page 420: ... values and the result will be output to D00120 3 11 14 DOUBLE BCD SUBTRACT WITHOUT CARRY BL 415 Purpose Subtracts 8 digit double word BCD data and or constants Ladder Symbol Variations Mi Su R CY BCD BCD BCD CY will turn ON when there is a borrow Name Label Operation Error Flag ER ON when Mi is not BCD ON when Su is not BCD OFF in all other cases Equals Flag ON when the result is 0 OFF in all oth...

Page 421: ...a C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 99999999 BCD Data Registers Index Registers Indirect ad...

Page 422: ...g turning ON thus indicates that the result of the subtraction is negative Note 10 s Complement A 10 s complement is the value obtained by subtracting each digit from 9 and adding one to the result For example the 10 s complement for 7556 is calcu lated as follows 9999 7556 1 2444 For a four digit number the 10 s complement of A is 9999 A 1 B To obtain the true number from the 10 s complement B A ...

Page 423: ...isplay 2 RSET 002100 SET 002100 BL 00000000 D00100 D00100 6 Mi 1 CIO 0201 Mi CIO 0200 R 1 D00101 Su 1 CIO 0121 Su CIO 0120 0 9 5 8 3 9 0 1 4 6 2 7 0 7 1 9 2 5 1 1 3 1 9 1 CY R 1 D00100 Subtraction at 1 09583960 100000000 17072641 Su 1 D00101 Su D00100 0 0 9 2 5 1 1 3 1 9 Subtraction at 2 0 0 0 0 0 0 R 1 D00101 0 4 8 8 6 8 1 1 CY R 1 D00100 00000000 100000000 92511319 7 R 1 D00101 Su 1 D00101 Su D0...

Page 424: ...s Subroutines Interrupt tasks OK OK OK OK Area Mi Su R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to D32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 ...

Page 425: ... 041 instruction Examples When CIO 000000 is ON in the following example D00110 and CY will be subtracted from D00100 as 4 digit BCD values and the result will be output to D00120 3 11 16 DOUBLE BCD SUBTRACT WITH CARRY BCL 417 Purpose Subtracts 8 digit double word BCD data and or constants with the Carry Flag CY Ladder Symbol CY Mi Su R CY BCD BCD BCD CY will turn ON when there is a borrow Name La...

Page 426: ...i Su R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C I...

Page 427: ...ult from 0 is necessary as an input condition of the Carry Flag CY The Carry Flag turning ON thus indicates that the result of the subtraction is negative Note 10 s Complement A 10 s complement is the value obtained by subtracting each digit from 9 and adding one to the result For example the 10 s complement for 7556 is calcu lated as follows 9999 7556 1 2444 For a four digit number the 10 s compl...

Page 428: ...rea H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E327...

Page 429: ...ions Applicable Program Areas Operand Specifications Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of the result is 1 OFF in all other cases Md 1st multiplicand word Mr 1st multiplier word R 1st result word L 421 Md Mr R Variations Executed Each Cycle for ON Condition L 421 Executed Once for Upward Differe...

Page 430: ...to E32766 E00000 to E32764 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index...

Page 431: ... Upward Differentiation U 422 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Md Mr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A9...

Page 432: ... and D00110 will be multiplied as 4 digit unsigned binary values and the result will be output to D00121 and D00120 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_ 32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR1...

Page 433: ...program areas Subroutines Interrupt tasks OK OK OK OK Area Md Mr R CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 to H510 H000 to H508 Auxiliary Bit Area A000 to A958 A448 to A956 Timer Area T0000 to T4094 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D32764 EM Area without bank E00000 to E...

Page 434: ...00111 and D00110 will be multiplied as 8 digit unsigned binary values and the result will be output to D00123 D00122 D00121 and D00120 3 11 21 BCD MULTIPLY B 424 Purpose Multiplies 4 digit single word BCD data and or constants Ladder Symbol Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Are...

Page 435: ...0 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767...

Page 436: ...bel Operation Error Flag ER ON when Md is not BCD ON when Mr is not BCD OFF in all other cases Equals Flag ON when the result is 0 OFF in all other cases Md 1st multiplicand word Mr 1st multiplier word R 1st result word BL 425 Md Mr R Variations Executed Each Cycle for ON Condition BL 425 Executed Once for Upward Differentiation BL 425 Executed Once for Downward Differentiation Not supported Immed...

Page 437: ...En_00000 to En_32766 n 0 to C En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 99999999 BCD Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 ...

Page 438: ... Upward Differentiation 430 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958...

Page 439: ...e divided by D00110 as 4 digit signed binary values and the quotient will be output to D00120 and the remainder to D00121 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary 0001 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR...

Page 440: ...outines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 to H510 H000 to H508 Auxiliary Bit Area A000 to A958 A448 to A956 Timer Area T0000 to T4094 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D32764 EM Area without bank E00000 to E32766 E00000 to E3...

Page 441: ...rn ON Examples When CIO 000000 is ON in the following example D00101 and D00100 are divided by D00111 and D00110 as 8 digit signed hexadecimal values and the quotient will be output to D00121 and D00120 and the remainder to D00123 and D00122 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Ar...

Page 442: ...nes Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766...

Page 443: ... CIO 000000 is ON in the following example D00100 will be divided by D00110 as 4 digit unsigned binary values and the quotient will be output to D00120 and the remainder will be output to D00121 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Dd Dr R Dd Dr R 1 R Unsigned binary Unsigned...

Page 444: ...Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 to H510 H000 to H508 Auxiliary Bit Area A000 to A958 A448 to A956 Timer Area T0000 to T4094 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D32764 EM Area without bank E00000 to E32766 E00000 t...

Page 445: ...he following example D00100 and D00101 will be divided by D00111 and D00110 as 8 digit unsigned hexadecimal values and the quotient will be output to D00121 and D00120 and the remainder to D00123 and D00122 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Dd Dr R Dd 1 Dd Dr 1 Dr R 1 R R ...

Page 446: ... tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with...

Page 447: ...most bit of R is 1 the Negative Flag will turn ON Examples When CIO 000000 is ON in the following example D00100 will be divided by D00110 as 4 digit BCD values and the quotient will be output to D00120 and the remainder to D00120 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Dd Dr R ...

Page 448: ... Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 to H510 H000 to H508 Auxiliary Bit Area A000 to A958 A448 to A956 Timer Area T0000 to T4094 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D32764 EM Area without bank E00000 to E32766 E00000 to E32764 EM...

Page 449: ...t to D00121 and D00120 and the remainder to D00123 and D00122 3 12 Conversion Instructions This section describes instructions used for data conversion Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Dd Dr R Dd 1 Dd Dr 1 Dr R 1 R R 3 R 2 BCD BCD BCD Remainder Quotient Name Label Operati...

Page 450: ...onic Function code Page S Source word R Result word BIN 023 S R Variations Executed Each Cycle for ON Condition BIN 023 Executed Once for Upward Differentiation BIN 023 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6143 Work Ar...

Page 451: ...Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R BCD BIN R Name Label Operation Error Flag ER ON if the content of S is not BCD OFF in all other cases Equals Flag ON if the result is 0000 OFF in all other cases Negative Flag N OFF 103 102 101 100 163 162 161 160 R S First source word R Fir...

Page 452: ...000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect add...

Page 453: ... 3X164 13X162 7X161 2X160 S Source word R Result word BCD 024 S R Variations Executed Each Cycle for ON Condition BCD 024 Executed Once for Upward Differentiation BCD 024 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6143 Work ...

Page 454: ...CD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R BCD BIN R Name Label Operation Error Flag ER ON if the content of S exceeds 270F 9999 decimal OFF in all other cases Equals Flag ON...

Page 455: ...rea H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000...

Page 456: ... S 1 CIO 0011 S CIO 0010 1 9 3 0 0 2 9 6 x107 x106 x105 x104 x163 x162 x161 x160 x103 x102 x101 x100 2X165 13X164 3X163 2X162 10 2961930 R 1 D00101 R D00100 MBS MBS LSB LSB S Source word R Result word NEG 160 S R Variations Executed Each Cycle for ON Condition NEG 160 Executed Once for Upward Differentiation NEG 160 Executed Once for Downward Differentiation Not supported Immediate Refreshing Spec...

Page 457: ... 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to I...

Page 458: ... Variations Executed Each Cycle for ON Condition NEGL 161 Executed Once for Upward Differentiation NEGL 161 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit A...

Page 459: ... example NEGL 161 calculates the 2 s complement of the content of D00101 and D00100 and writes the result to D00201 and D00200 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 ...

Page 460: ... CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_0...

Page 461: ...he corresponding bit in the result word or 16 word range and turns OFF all other bits in the result word or 16 word range Ladder Symbol Variations Source word S 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 The content of S is transferred as is to R 1st result word R 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2nd result word R 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 If bit 15 of S is 1 FFFF is transferred to R 1 If bit 15 of S ...

Page 462: ...OK OK OK OK Specifies the first digit byte to be converted 4 to 16 0 to 3 digit 0 to 3 8 to 256 0 or 1 byte 0 or 1 Number of digits bytes to be converted 4 to 16 0 to 3 1 to 4 digits 8 to 256 0 or 1 1 or 2 bytes Conversion process 0 4 to 16 bits digit to word 1 8 to 256 bits byte to 16 word range Digit number 3 2 1 0 0 Area S C R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Are...

Page 463: ...left and will wrap around to the rightmost digit after the left most digit if necessary The following diagram shows some example values for C and the 4 to 16 bit conversions that they produce 8 to 256 bit Conversion When the leftmost digit of C is 1 MLPX 076 takes the value of the specified byte in S 00 to FF and turns ON the corresponding bit in the range of 16 result words All other bits in the ...

Page 464: ...uce Flags Examples 4 to 16 bit Conversion When CIO 000000 is ON in the following example MLPX 076 will convert 3 digits in S beginning with digit 1 the second digit as indicated by C 0021 The corresponding bits in D00100 D00101 and D00102 will be turned ON 1 Convert 2 bytes n 1 Start with second byte 8 to 256 bit decoding Bit m of R to R 15 is turned ON C R 1 R 14 R 15 R 16 R 17 R 30 R 31 l 16 C 1...

Page 465: ...d D00116 to D00131 will be turned ON C S 0100 R Bits 0 to 3 Starting digit Digit 1 Bits 4 to 7 Number of digits 3 digits Digits Digit 1 contains 6 so bit 6 is turned ON Digit 2 contains A so bit 10 is turned ON Digit 3 contains F so bit 15 is turned ON S C R C S 0100 R Bits 0 to 3 Starting byte Byte 1 Bits 4 to 7 Number of bytes 2 bytes Byte 1 contains 2D so bit 13 D of R 2 is turned ON Byte 1 Byt...

Page 466: ...most or rightmost ON bit will be encoded the number of digits or bytes that will be converted and the starting digit or byte where the results will be written Operand Specifications S First source word R Result word C Control word DMPX 077 S R C Variations Executed Each Cycle for ON Condition DMPX 077 Executed Once for Upward Differentiation DMPX 077 Executed Once for Downward Differentiation Not ...

Page 467: ...rightmost digit after the leftmost digit if necessary Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0...

Page 468: ...ords The locations of these bits are written to R beginning with the specified byte Set the third digit of C to 0 to find the leftmost ON bits or 1 to find the rightmost ON bits C 0011 C 0030 C 0013 C 0032 R R R R Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 l 0 Convert one 16 word range n 1 Start with byte 1 256 to...

Page 469: ... separate the conversion by using more than one DMPX 077 instructions DMPX 077 D0000 D0100 0300 DMPX 077 D0000 D0100 0000 DMPX 077 D0001 D0100 0001 DMPX 077 D0002 D0100 0002 DMPX 077 D0003 D0100 0003 Examples When CIO 000000 is ON in the following example DMPX 077 will find the leftmost ON bits in CIO 0100 CIO 0101 and CIO 0102 and write those loca tions to 3 digits in R beginning with digit 1 the...

Page 470: ...ator The digit designator specifies various parameters for the conversion as shown in the following diagram C S R D00100 Starting digit Digit 1 Digits DMPX 077 finds the leftmost ON bits S R C S Source word Di Digit designator D First destination word ASC 086 S Di D Variations Executed Each Cycle for ON Condition ASC 086 Executed Once for Upward Differentiation ASC 086 Executed Once for Downward D...

Page 471: ...rst byte of D to be used 0 Rightmost byte 1 Leftmost byte Parity 0 None 1 Even 2 Odd Digit number 3 2 1 0 Area S Di D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_3276...

Page 472: ...esignated the leftmost bit of each ASCII character will be adjusted so that there is an odd number of ON bits The status of the parity bit does not affect the meaning of the ASCII code Examples of even parity When adjusted for even parity ASCII 31 00110001 will be B1 10110001 parity bit turned ON to create an even number of ON bits ASCII 36 00110110 will be 36 00110110 parity bit remains OFF becau...

Page 473: ... writing leftmost byte the number of digits to read 3 and the starting digit when reading digit 1 Di 0011 Di 0112 Di 0030 Di 0130 Digit 3 Digit 2 Digit 1 Digit 0 Leftmost Rightmost Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 Leftmost Rightmost Leftmost Rightmost Leftmost Rightmost Digit 3 Digit 2 Digit 1 Digit 0 Leftmost Rightmost Rightmost Leftmost Name Label Operation Error F...

Page 474: ...following diagram D Destination word The converted hexadecimal digits are written into D from right to left begin ning with the specified first digit Any digits in the destination word that aren t overwritten with the converted data will be left unchanged S First source word Di Digit designator D Destination word HEX 162 S Di D Variations Executed Each Cycle for ON Condition HEX 162 Executed Once ...

Page 475: ...e of extended ASCII characters Area S Di D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E3...

Page 476: ... around to the rightmost digit if necessary The following diagram shows some example values for Di and the conversions that they produce Parity setting leftmost digit of Di Operation of HEX 162 No parity 0 HEX 162 will be executed only when the parity bit in each byte is 0 An error will occur if a parity bit is non zero Even parity 1 HEX 162 will be executed only when there is an even num ber of O...

Page 477: ...ers beginning with the leftmost byte of D00100 into their hexadecimal equivalents and writes this data to D00200 beginning with digit 1 When CIO 000000 is ON in the following example HEX 162 converts the ASCII data in D00010 beginning with the rightmost byte and writes the hexa decimal equivalents in D00300 beginning with digit 1 The digit designator setting of 1011 specifies even parity the start...

Page 478: ...copied from the source words S D00100 D D00300 Number of bytes 2 bytes Starting digit digit 1 Parity bits Result in even parity Not changed Not changed Conversion Parity Even Starting byte rightmost Starting digit in D Digit 1 Number of bytes 2 Starting byte in S Rightmost S First source word N Bit number D Destination word LINE 063 S N D Variations Executed Each Cycle for ON Condition LINE 063 Ex...

Page 479: ... to D32752 D00000 to D32767 EM Area without bank E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to En_32752 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 000F binary or 0 to 15 Dat...

Page 480: ...ecifies the first destination word D and D 15 must be in the same data area Name Label Operation Error Flag ER ON if N is not within the specified range of 0000 to 000F OFF in all other cases Equals Flag ON if D is 0000 after execution OFF in all other cases N 0005 S D D00200 to to 5 S Source word D First destination word N Bit number COLM 064 S D N Variations Executed Each Cycle for ON Condition ...

Page 481: ...80 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32752 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32752 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D3...

Page 482: ...LM 064 copies the 16 bits in D00200 bits 00 through 15 to bit 5 in D00100 through D00115 0 0 0 0 0 1 1 1 0 0 0 1 0 0 0 0 1 Bit 15 Bit 00 D Bi 1 1 0 1 0 0 1 0 0 1 1 1 0 0 0 1 D 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 1 1 D 2 0 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 D 15 1 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 D 3 0 1 1 S 1 Bit 15 Bit 00 Name Label Operation Error Flag ER ON if N is not within the specified range of 0000 to 0...

Page 483: ...fferentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area C S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E0000...

Page 484: ...ata will be treated as 0 and won t cause an error Also the status of bits 13 to 15 of S is not checked when C 0000 Note Some Special I O Units output signed BCD data Calculations using this data will normally be easier if it is first converted to signed binary data with BINS 470 The control word specifies the signed BCD format as shown below C 0000 Input Data Range 999 to 999 BCD C 0001 Input Data...

Page 485: ...verted to signed binary and output to D00400 Setting Signed BCD values Signed binary values C 0000 999 to 1 and 0 to 999 FC19 to FFFF and 0000 to 03E7 C 0001 7999 to 1 and 0 to 7999 E0C1 to FFFF and 0000 to 1F3F C 0002 999 to 1 and 0 to 9999 FC19 to FFFF and 0000 to 270F C 0003 1999 to 1 and 0 to 9999 F831 to FFFF and 0000 to 270F 3 digits BCD 12 bits 0 to 9 Fourth digit BCD A Negative 1 F Negativ...

Page 486: ...ted Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area C S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A000 to A958 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to...

Page 487: ... 3 12 6 DOUBLE 2 S COMPLEMENT NEGL 161 for details Values of 0 in the source data will be treated as 0 and won t cause an error Also the status of bits 13 to 15 of S 1 is not checked when C 0000 Note Some Special I O Units output signed BCD data Calculations using this data will normally be easier if it is first converted to signed binary data with BISL 472 The control word specifies the signed BC...

Page 488: ...to 1 FB3B 4C01 to FFFF FFFF 0 to 7999 9999 0000 0000 to 04C4 B3FF C 0002 999 9999 to 1 FF67 6981 to FFFF FFFF 0 to 9999 9999 0000 0000 to 05F5 E0FF C 0003 1999 9999 to 1 FECE D301 to FFFF FFFF 0 to 9999 9999 0000 0000 to 05F5 E0FF 7 digits BCD 28 bits S 1 S 0 to 9 Eighth digit BCD F Negative A to E Error 7 digits BCD 28 bits S 1 S 0 to 9 Eighth digit BCD A Negative 1 F Negative B to E Error Name L...

Page 489: ...word D Destination word BCDS 471 C S D Variations Executed Each Cycle for ON Condition BCDS 471 Executed Once for Upward Differentiation BCDS 471 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Setting Allowed values for S C 0000 FC19 to FFFF or 0000 to 03E7 C 00...

Page 490: ...ned binary data for output to these Units The control word specifies the signed BCD format that will be used for the result as shown below C 0000 Output Data Range 999 to 999 BCD C 0001 Output Data Range 7999 to 7999 BCD Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En...

Page 491: ... to 9 Fourth digit BCD F Negative 3 digits BCD 12 bits 0 to 9 Fourth digit BCD A Negative 1 F Negative Name Label Operation Error Flag ER ON if C is not within the specified range of 0000 to 0003 ON if C 0000 and the source data is not within the allowed ranges FC19 to FFFF or 0000 to 03E7 ON if C 0001 and the source data is not within the allowed ranges E0C1 to FFFF or 0000 to 1F3F ON if C 0002 a...

Page 492: ...S 1 and S C 0000 FF67 6981 to FFFF FFFF or 0000 0000 to 0098 967F C 0001 FB3B 4C01 to FFFF FFFF or 0000 0000 to 04C4 B3FF C 0002 FF67 6981 to FFFF FFFF or 0000 0000 to 05F5 E0FF C 0003 FECE D301 to FFFF FFFF or 0000 0000 to 05F5 E0FF Area C S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 t...

Page 493: ...equire signed BCD data inputs BDSL 473 can be used to convert double signed binary data for output to these Units The control word specifies the signed BCD format that will be used for the result as shown below C 0000 Output Data Range 999 9999 to 999 9999 BCD C 0001 Output Data Range 7999 9999 to 7999 9999 BCD C 0002 Output Data Range 999 9999 to 9999 9999 BCD Index Registers Indirect addressing ...

Page 494: ...0003 FECE D301 to FFFF FFFF 1999 9999 to 1 0000 0000 to 05F5 E0FF 0 to 9999 9999 7 digits BCD 28 bits S 1 S 0 to 9 Eighth digit BCD A Negative 1 F Negative Name Label Operation Error Flag ER ON if C is not within the specified range of 0000 to 0003 ON if C 0000 and the source data is not within the range FF67 6981 to FFFF FFFF or 0000 0000 to 0098 967F ON if C 0001 and the source data is not withi...

Page 495: ...VE NOR XNRW 037 485 DOUBLE EXCLUSIVE NOR XNRL 613 486 COMPLEMENT COM 029 488 DOUBLE COMPLEMENT COML 614 490 I1 Input 1 I2 Input 2 R Result word ANDW 034 I1 I2 R Variations Executed Each Cycle for ON Condition ANDW 034 Executed Once for Upward Differentiation ANDW 034 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step p...

Page 496: ... If as a result of the AND the leftmost bit of R is 1 the Negative Flag will turn ON Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 t...

Page 497: ...Subroutines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E0...

Page 498: ...the logical AND is taken of corresponding bits in CIO 0011 CIO 0010 and CIO 0021 CIO 0020 and the results will be output to corresponding bits in D00201 and D00200 3 13 3 LOGICAL OR ORW 035 Purpose Takes the logical OR of corresponding bits in single words of word data and or constants Ladder Symbol I1 I1 1 I2 I2 1 R R 1 1 1 1 1 0 0 0 1 0 0 0 0 Name Label Operation Error Flag ER OFF Equals Flag ON...

Page 499: ...ported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect...

Page 500: ...F Equals Flag ON when the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of R is 1 OFF in all other cases I1 Input 1 I2 Input 2 R Result word ORWL 611 I1 I2 R Variations Executed Each Cycle for ON Condition ORWL 611 Executed Once for Upward Differentiation ORWL 611 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported...

Page 501: ...of the OR the leftmost bit of R 1 is 1 the Negative Flag will turn ON EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressin...

Page 502: ...D D00500 D 1 D00501 Note The vertical arrow indicates logical OR I1 Input 1 I2 Input 2 R Result word XORW 036 I1 I2 R Variations Executed Each Cycle for ON Condition XORW 036 Executed Once for Upward Differentiation XORW 036 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK...

Page 503: ...R is 0000 Hex the Equals Flag will turn ON If as a result of the OR the leftmost bit of R is 1 the Negative Flag will turn ON Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indire...

Page 504: ...reas Subroutines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D327...

Page 505: ...exclusive OR the content of R R 1 is 00000000 Hex the Equals Flag will turn ON If as a result of the exclusive OR the leftmost bit of R 1 is 1 the Negative Flag will turn ON Examples When the execution condition CIO 00000000 is ON the logical exclusive OR is taken of corresponding bits in CIO 0901 CIO 0900 and D01001 D01000 and the results will be output to corresponding bits in D01201 and D01200 ...

Page 506: ...outines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000...

Page 507: ...f the NOR the leftmost bit of R is 1 the Negative Flag will turn ON 3 13 8 DOUBLE EXCLUSIVE NOR XNRL 613 Purpose Takes the logical exclusive NOR of corresponding bits in double words of word data and or constants Ladder Symbol Variations Applicable Program Areas I1 I2 R 1 1 1 1 0 0 0 1 0 0 0 1 Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Negativ...

Page 508: ...imer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Dat...

Page 509: ...urpose Turns OFF all ON bits and turns ON all OFF bits in Wd Ladder Symbol Variations Applicable Program Areas Operand Specifications S1 0800 CH S1 1 0801 CH S2 0100 CH S2 1 0101 CH D D00500 D 1 D00501 Note The symbol indicates exclusive logical NOR Wd Word COM 029 Wd Variations Executed Each Cycle for ON Condition COM 029 Executed Once for Upward Differentiation COM 029 Executed Once for Downward...

Page 510: ...the following example the status of each bit will be D00100 is reversed EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Regi...

Page 511: ...ation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with...

Page 512: ...it signed binary contents positive value of the specified words and outputs the integer portion of the result to the spec ified result word Ladder Symbol Variations Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of R is 1 OFF in all other cases Instruction Mnemonic Function code Page BINARY ROOT ROTB 620 49...

Page 513: ...000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 t...

Page 514: ...Operation Error Flag ER ON if bit 15 of S 1 is 1 ON OFF in all other cases Equals Flag ON if the result is 0000 OFF in all other cases Overflow Flag OF ON if the content of S 1 and S is 4000 0000 to 7FFF FFFF OFF in all other cases Underflow Flag UF OFF Negative Flag N OFF 014B 5A91 1234 D00100 CIO 0002 CIO 0001 Square root computation remainder eliminated S First source word R Result word ROOT 07...

Page 515: ...00 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 ...

Page 516: ... result This program example calculates the square root of the 4 digit number in CIO 0010 rounds off the result and writes it to CIO 0011 Basically the 4 digit number is multiplied by 10 000 1002 and the result is divided by 100 increasing the precision of the calculation by a factor of 100 Note Figures after the decimal point are rounded for 4 digit numbers Truncated ...

Page 517: ...000 2 The 4 digit number is moved to D00101 3 ROOT 072 calculates the square root of D00101 and D00100 and writes the result to D00102 1 2 3 4 5 The values after the decimal point should be rounded BSET MOV ROOT MOV MOV MOVD MOVD INC D00101 D00100 0 0 0 0 0 0 0 0 0000 0000 010 6 0 1 7 D00101 D00100 6 0 1 7 0 0 0 0 ...

Page 518: ...ction allows any relationship between X and Y to be approximated with line segments Ladder Symbol Variations Applicable Program Areas 6017 0000 7756 D00100 D00101 D00100 Square root computation Remainder eliminated 60 170 000 7 756 932 D00103 CIO 0011 0 0 0 0 0 0 0 0 0000 0000 D00102 7 7 5 6 CIO 0011 D00103 0 0 7 7 5 6 0 0 5600 4900 CIO 0011 0 0 7 8 C Control word S Source data R Result word APR 0...

Page 519: ...00 to 9999 BCD 0 0000 to 0 9999 9999 BCD 1 0000 Operand Value Data range C Data area address S 16 bit unsigned BCD data 0000 to 9999 16 bit unsigned binary data 0 to 65 535 16 bit signed binary data1 32 768 to 32 767 32 bit signed binary data1 2 147 483 648 to 2 147 483 647 Floating point data1 3 402823 1038 to 1 175494 10 38 1 175494 10 38 to 3 402823 1038 D 16 bit unsigned BCD data 0000 to 9999 ...

Page 520: ... S and writes the result to R The range for S is 0000 to 0900 BCD 0 0 to 90 0 and the range for R is 0000 to 9999 BCD 0 0000 to 0 9999 The remainder of the result beyond the fourth decimal place is eliminated Linear Extrapolation APR 069 linear extrapolation is specified when C is a word address The content of word C specifies the number of coordinates in a data table starting at C 2 the form of t...

Page 521: ...er the output is BCD or binary OFF specifies binary and ON specifies BCD Bit C 0 3 14 13 12 11 9 10 8 7 6 5 4 2 1 15 0 0 0 0 0 Number of coordinates minus one m 1 00 to FF Hex 1 m 256 Source data form 0 f x f S 1 f x f Xm S Output D data format 0 Binary 1 BCD Input S data format 0 Binary 1 BCD Floating point specification for S and D 0 Integer data Signed data specification for S and D 0 Unsigned ...

Page 522: ... 3 C 4 C 5 C 6 C 7 C 8 C 4n 1 C 4n 2 C 4n 3 C 4n 4 C 4m 1 C 4m 2 C 4m 3 C 4m 4 Note Write Xm max X value in the table in word C 1 when the I O data in S and D contain signed data bit 11 of C 0 16 bit BCD16 bit binary signed or unsigned or 16 bit BCD data 32 bit signed binary data Floating point data X0 rightmost 16 bits X0 leftmost 16 bits Y0 rightmost 16 bits Y0 leftmost 16 bits X1 rightmost 16 b...

Page 523: ...data and or the output data can be 16 bit unsigned BCD data Also the linear extrapolation function can be set to operate on the value specified in S directly or on Xm S Xm is the maximum value of X in the line segment data Setting name Bit in C Setting Input data S format 15 0 Binary 1 BCD Output data D format 14 0 Binary 1 BCD Source data form 13 0 Operate on S 1 Operate on Xm S Signed data speci...

Page 524: ... 1 BCD Source data form 13 0 Operate on S 1 Operate on Xm S Signed data specification for S and D 11 0 Unsigned data Data length specification for S and D 10 Invalid fixed at 16 bits Floating point specification 09 0 Integer data Setting name Bit in C Setting Input data S format 15 0 Binary Output data D format 14 0 Binary Source data form 13 0 Signed data specification for S and D 11 1 Signed dat...

Page 525: ...ON if C is a constant greater than 0001 ON if C is a word address but the X coordinates are not in ascending order X1 X2 Xm ON if C is a word address and bits 9 11 and 15 of C indi cate BCD input but S is not BCD ON if C is a word address and bit 9 of C indicates floating point data but S is a one word constant ON if C is 0000 or 0001 but S is not BCD between 0000 and 0900 OFF in all other cases E...

Page 526: ...of data is continuous as it must be from D00000 to D00026 C to C 2 12 2 The input data is taken from CIO 0010 and the result is output to CIO 0011 In this case the source word CIO 0010 contains 0014 and f 0014 0726 is output to R CIO 0011 Word Coordinate C 1 Xm max X value C 2 Y0 C 3 X1 C 4 Y1 C 5 X2 C 6 Y2 C 2m 1 Xm max X value C 2m 2 Ym Y0 Y2 Y1 Y3 Y4 Ym X0 X1 X2 X3 X4 Xm X Y D00000 000B Hex D00...

Page 527: ... Instructions Section 3 14 The linear extrapolation calculation is shown below X Y 1F20 0F00 0726 0402 0 0 0005 0014 001A 05F0 x y Values are all hexadecimal Hex Y 0F00 0402 0F00 001A 0005 0014 0015 0726 0F00 0086 000F ...

Page 528: ...n table 32 bit signed binary data Y data range 2 147 483 648 to 2 147 483 647 Y Fluid volume X Variation from standard Linear extrapolation of table The linear extrapolation can use signed source data if 32 bit signed binary data is used High resolution 32 bit signed binary data X data range 2 147 483 648 to 2 147 483 647 X0 rightmost 16 bits X0 leftmost 16 bits Y0 rightmost 16 bits Y0 leftmost 16...

Page 529: ...ange 3 402823 1038 to 1 175494 10 38 1 175494 10 38 to 3 402823 1038 or Y Fluid volume X Fluid height Linear extrapolation of table The linear extrapolation can provide a smooth high resolution curve floating point data is used High resolution floating point data X data range 3 402823 1038 to 1 175494 10 38 1 175494 10 38 to 3 402823 1038 or X0 rightmost 16 bits X0 leftmost 16 bits Y0 rightmost 16...

Page 530: ...Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32...

Page 531: ...significant digits The eighth and higher digits are eliminated The result must be between 0 1000000 10 7 and 0 9999999 107 R 1 R Quotient Dd 1 Dd Dr 1 Dr 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 First word exponent 0 to 7 sign of exponent 0 1 1 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 mantissa leftmost 3 digits 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Second word mantissa rightmost 4 digits 0 0...

Page 532: ...wo BCD Numbers In this example the 4 digit BCD number in D00000 is divided by the 4 digit BCD number in D00001 and the floating point result is written to D00003 and D00002 To perform the floating point division the BCD value in D00000 is converted to floating point format in D00101 and D00100 and the BCD value in D00001 is converted to floating point format in D00103 and D00102 D00101 D00100 A 5 ...

Page 533: ...0101 and D00103 are set to 4000 3 MOVD 083 is used to move the digits of the original source words to the proper digits in the 2 word floating point formats 1 2 3 4 5 6 7 MOV MOV MOV MOV MOVD MOVD MOVD MOVD FDIV D00101 D00100 4 0 0 0 0 0 0 0 0000 4000 D00103 D00102 4 0 0 0 0 0 0 0 0000 4000 ...

Page 534: ...00103 D00102 4 0 0 7 9 0 0 0 D00101 D00100 4 3 4 5 2 0 0 0 0 3452000 104 D00103 D00102 4 0 0 7 9 0 0 0 0 0079000 104 D00003 D00002 2 4 3 6 9 6 2 0 0 4369620 102 N Number of words S First source word R Result word BCNT 067 N S R Variations Executed Each Cycle for ON Condition BCNT 067 Executed Once for Upward Differentiation BCNT 067 Executed Once for Downward Differentiation Not supported Immediat...

Page 535: ...ry D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0001 to FFFF binary or 1 to 65 535 Data Registers DR0 to DR15 DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR...

Page 536: ... 2e 127 1 f s Sign e Exponent f Mantissa Instruction Mnemonic Function code Page FLOATING TO 16 BIT FIX 450 520 FLOATING TO 32 BIT FIXL 451 522 16 BIT TO FLOATING FLT 452 523 32 BIT TO FLOATING FLTL 453 525 FLOATING POINT ADD F 454 527 FLOATING POINT SUB TRACT F 455 529 FLOATING POINT MULTI PLY F 456 531 FLOATING POINT DIVIDE F 457 533 DEGREES TO RADIANS RAD 458 535 RADIANS TO DEGREES DEG 459 536 ...

Page 537: ...dit dis play in the CX Programmer standard decimal numbers input in the display are automatically converted to the floating point format shown above IEEE754 format and written to I O Memory Data written in the IEEE754 for mat is automatically converted to standard decimal format when monitored on the display It isn t necessary for the user to be aware of the IEEE754 data format when reading and wr...

Page 538: ...bers Non normalized numbers express real numbers with very small absolute val ues The sign bit will be 0 for a positive number and 1 for a negative number The exponent e will be 0 and the real exponent will be 126 The mantissa f will be expressed from 1 to 233 1 and it is assume that in the real mantissa bit 233 is 0 and the binary point follows immediately after it Non normalized numbers are expr...

Page 539: ... or dividing infinity by infinity The value of the result may not be correct if an overflow occurs when convert ing a floating point number to an integer Precautions in Handling Special Values The following precautions apply to handling zero infinity and NaN The sum of positive zero and negative zero is positive zero The difference between zeros of the same sign is positive zero If any operand is ...

Page 540: ...0 100 θ r 2 3 4 1 D00000 D00200 D00001 D00201 D00201 D00204 D00202 D00202 D00206 D00204 D00204 D00208 D00206 D00208 D00210 D00210 D00212 D00204 D00202 D00214 D00214 D00216 D00216 D00218 D00212 D00220 D00218 D00221 D00220 D00100 D00221 D00101 D00200 D00202 000000 ...

Page 541: ...adians so DEG 459 is used to convert to degrees The result is then output to D00219 and D00218 as floating point data 4 The data is converted back from floating point to BCD a First FIX 450 is used to temporarily convert the floating point data to binary data and then BCD 024 is used to convert the binary data to BCD data b The distance r is output to D00100 c The angle θ is output to D00101 3 15 ...

Page 542: ...IO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_327...

Page 543: ...0000 OFF in all other cases Negative Flag N ON if bit 15 of the result is ON OFF in all other cases S First source word R First result word FIXL 451 S R Variations Executed Each Cycle for ON Condition FIXL 451 Executed Once for Upward Differentiation FIXL 451 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program a...

Page 544: ... 15 3 16 BIT TO FLOATING FLT 452 Purpose Converts a 16 bit signed binary value to 32 bit floating point data and places the result in the specified result words Ladder Symbol Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 t...

Page 545: ...pt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with b...

Page 546: ... in all other cases Negative Flag N ON if the result is negative OFF in all other cases S First source word R First result word FLTL 453 S R Variations Executed Each Cycle for ON Condition FLTL 453 Executed Once for Upward Differentiation FLTL 453 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subrout...

Page 547: ... converted to 16 777 215 0 A signed binary value of 16 777 215 is converted to 15 777 215 0 Flags Precautions The result will not be exact if a number with an absolute value greater than 16 777 215 the maximum value that can be expressed in 24 bits is con verted Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Dat...

Page 548: ...program areas Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D0000...

Page 549: ...g will be turned ON and the instruction won t be executed Flags Precautions The augend Au 1 and Au and Addend Ad 1 and Ad data must be in IEEE754 floating point data format Augend Addend 0 Numeral NaN 0 0 Numeral Numeral Numeral See note 1 See note 2 See note 2 NaN See note 2 R 1 R Au Augend floating point data 32 bits Au 1 Ad Addend floating point data 32 bits Ad 1 Result floating point data 32 b...

Page 550: ...am areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Mi Su R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses i...

Page 551: ... and the instruction won t be executed Flags Precautions The Minuend Mi 1 and Mi and Subtrahend Su 1 and Su data must be in IEEE754 floating point data format Minuend Subtrahend 0 Numeral NaN 0 0 Numeral Numeral Numeral See note 1 See note 2 See note 2 NaN See note 2 R 1 R Mi Minuend floating point data 32 bits Mi 1 Su Subtrahend floating point data 32 bits Su 1 Result floating point data 32 bits ...

Page 552: ...areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Md Mr R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in b...

Page 553: ...ion won t be executed Flags Precautions The Multiplicand Md 1 and Md and Multiplier Mr 1 and Mr data must be in IEEE754 floating point data format Multiplicand Multiplier 0 Numeral NaN 0 0 0 See note 2 See note 2 Numeral 0 See note 1 See note 2 See note 2 NaN See note 2 R 1 R Md Multiplicand floating point data 32 bits Md 1 Mr Multiplier floating point data 32 bits Mr 1 Result floating point data ...

Page 554: ...reas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in bi...

Page 555: ...tion won t be executed Flags Precautions The Dividend Dd 1 and Dd and Divisor Dr 1 and Dr data must be in IEEE754 floating point data format Dividend Divisor 0 Numeral NaN 0 See note 3 Numeral 0 See note 1 0 See note 2 See note 3 See note 3 0 See note 2 See note 3 See note 3 NaN See note 3 R 1 R Dd Dividend floating point data 32 bits Dd 1 Dr Divisor floating point data 32 bits Dr 1 Result floatin...

Page 556: ... Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00...

Page 557: ...laces the result in the specified result words Ladder Symbol Variations Applicable Program Areas R 1 R S Source degrees 32 bit floating point data S 1 Result radians 32 bit floating point data Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data is not a number NaN OFF in all other cases Equals Flag ON if both the exponent and mant...

Page 558: ...ow Flag will turn ON and the result will be output as 0 Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 ...

Page 559: ...rge to be expressed as a 32 bit floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a 32 bit floating point value Negative Flag N ON if the result is negative OFF in all other cases S First source word R First result word SIN 460 S R Variations Executed Each Cycle for ON Condition SIN 460 Executed Once for Upward Differentiation SIN 460 Exe...

Page 560: ...d result Flags Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 t...

Page 561: ...xecuted Once for Upward Differentiation COS 461 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Coun...

Page 562: ...nship between the angle and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data COS S Angle radian data R R...

Page 563: ...ep program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000...

Page 564: ... than the maximum value that can be expressed as floating point data the Overflow Flag will turn ON and the result will be output as The following diagram shows the relationship between the angle and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data TAN S Angle radian d...

Page 565: ...Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 t...

Page 566: ...e following diagram shows the relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data SIN 1 S Input data sine value R Result radians R Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON ...

Page 567: ...iate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00...

Page 568: ...following diagram shows the relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data COS 1 S Input data cosine value R Result radians R Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON ...

Page 569: ...Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 t...

Page 570: ...een the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data TAN 1 S Input data tangent R Result radians R Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data is not a number NaN OFF in all ...

Page 571: ...ep program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000...

Page 572: ...s The following diagram shows the relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data R S Input data R Result Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data is...

Page 573: ...as Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to 4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D0...

Page 574: ...ut as 0 Note The constant e is 2 718282 The following diagram shows the relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data e R S Input data R Result Name Label Operation Error Flag ER ON if the source data is not recognized as floa...

Page 575: ...s Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D0...

Page 576: ... relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S Source 32 bit floating point data S 1 Result 32 bit floating point data loge R S Input data R Result Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data is negative ON if the source d...

Page 577: ...ep program areas Subroutines Interrupt tasks OK OK OK OK Area B E R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D000...

Page 578: ...n the comparison condition is true These instructions are supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Note Refer to 3 7 1 Input Comparison Instructions 300 to 328 for details on the signed and unsigned binary input comparison instructions and 3 16 21 Dou ble precision Floating point Input Instructions for details on double precision floating point input comparison instructions Expone...

Page 579: ... instruction Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with ban...

Page 580: ...1 and C2 S2 1 S2 Input type Operation LD The instruction can be connected directly to the left bus bar AND The instruction cannot be connected directly to the left bus bar OR The instruction can be connected directly to the left bus bar Symbol Option data format Equal Not equal Less than Less than or equal Greater than Greater than or equal F Single precision floating point data Code Mnemonic Name...

Page 581: ...SS THAN OR F OR FLOATING LESS THAN 332 LD F LOAD FLOATING LESS THAN OR EQUAL True if C1 C2 AND F AND FLOATING LESS THAN OR EQUAL OR F OR FLOATING LESS THAN OR EQUAL 333 LD F LOAD FLOATING GREATER THAN True if C1 C2 AND F AND FLOATING GREATER THAN OR F OR FLOATING GREATER THAN 325 LD F LOAD FLOATING GREATER THAN OR EQUAL True if C1 C2 AND F AND FLOATING GREATER THAN OR EQUAL OR F OR FLOATING GREATE...

Page 582: ...0 0 1 0 0 1 1 1 1 1 0 0 0 0 0 0 0 15 0 S1 D00100 S1 1 D00101 S2 D00200 S2 1 D00201 FLOATING LESS THAN Comparison F Yields an ON condition Decimal value 4 294 967 296 Decimal value 3 5 Does not yield an ON condition Decimal value 2 3 Decimal value 5 566 555 656 FSTR 448 S C D S First source word C First control word D First destination word Variations Executed Each Cycle for ON Condition FSTR 448 E...

Page 583: ...n_00000 to En_32766 n 0 to C En_00000 to En_32765 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_327...

Page 584: ...2 33 34 35 36 SP SP 1 2 3 4 5 6 15 87 0 2D 20 31 2E 32 33 45 2B 30 31 SP 1 2 3 E 0 0 15 87 0 D 20 31 32 34 00 2D 20 2E 33 00 20 2E 33 2B 30 00 2D 31 32 45 30 00 Decimal notation C 0000 Hex 1 23456 Example 1 23456 Floating point data Scientific notation C 0001 Hex 1 23E 00 Conversion to ASCII text Conversion to ASCII text Rounded off SP represents a space SP represents a space Stored in destination...

Page 585: ...zeroes ASCII 30 Hex will added to the end of the source data A decimal point ASCII 2E Hex is added if the number fractional digits is greater than 0 Spaces ASCII 20 Hex are added if the integer part of the floating point data is shorter than the integer part of the result total number of characters sign digit decimal point fractional digits Fractional part Decimal point Storage of ASCII Text After...

Page 586: ...TR 448 converts the floating point data in D00001 and D00000 to decimal notation ASCII text and writes the ASCII text to the destination words beginning with D00100 The contents of the control words D00010 to D00012 specify the details on the data format decimal notation 7 characters total 3 fractional digits Name Label Operation Error Flag ER ON if the data in S 1 and S is not a valid floating po...

Page 587: ... H CJ1M and CS1D CPU Units only 20 Space 2E 32 2 00 1 0 1 0 1 0 0 0 0 1 1 1 0 0 1 0 0 0 1 1 1 1 1 0 1 0 1 0 0 1 1 1 FSTR D00000 D00010 D00100 000000 15 0 D00000 D00001 0000 Hex 0007 Hex 0003 Hex D00010 D00011 D00012 0 327457 20 Space 30 0 33 3 37 7 D00100 D00101 D00102 D00103 0 3 2 7 4 5 7 Decimal notation Total characters 7 characters Fractional digits 3 digits characters Conversion Rounded off S...

Page 588: ...gram areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank...

Page 589: ...1 0 1 1 0 D D 1 1 1 1 0 1 0 0 1 0 1 1 1 1 0 0 1 1 1 0 0 0 0 1 0 1 1 1 1 0 1 1 0 15 0 Decimal notation Exponent Spaces are ignored during conversion Sign 32 bit floating point data If there are more than 6 digits the 7th and higher digits are ignored Digits do not include the sign decimal point and exponent characters Conversion of ASCII text number to 32 bit floating point data Stored in D and D 1...

Page 590: ...er digits are ignored The sign decimal point and exponent characters are not counted as digits Any spaces 20 Hex or zeroes 30 Hex before the first digit are ignored Positive number Space 20 Hex or Plus sign 2B Hex Negative number Minus sign 2D Hex Positive 2B Hex Negative 2D Hex Exponential part Sign Fractional part Decimal point Integer part Sign E 45 Sign Digit Digit Digit Sign Digit Digit Name ...

Page 591: ... 32 2 34 4 32 2 00 2D 30 0 2E 33 3 35 5 31 1 D00000 D00001 D00002 D00003 D00004 D00005 0 1 2 3 4 5 2 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 0 0 1 1 1 1 0 15 0 FVAL D00000 D00100 Conversion Storage Ignored The 7th and higher digits are ignored The sign decimal point and leading zeroes spaces are not counted 0 1 0 0 0 0 1 0 1 0 1 0 1 1 1 1 1 0 1 1 1 1 0 0 0 1 0 0 1 0 1 0 000000 15 0 D00...

Page 592: ...ING POINT DIVIDE D 848 589 DOUBLE DEGREES TO RADIANS RADD 849 591 DOUBLE RADIANS TO DEGREES DEGD 850 593 DOUBLE SINE SIND 851 594 DOUBLE COSINE COSD 852 596 DOUBLE TANGENT TAND 853 598 DOUBLE ARC SINE ASIND 854 600 DOUBLE ARC COSINE ACOSD 855 602 DOUBLE ARC TANGENT ATAND 856 604 DOUBLE SQUARE ROOT SQRTD 857 606 DOUBLE EXPONENT EXPD 858 608 DOUBLE LOGARITHM LOGD 859 610 DOUBLE EXPONENTIAL POWER PWR...

Page 593: ...ng point values occupy four words each Numbers Expressed as Floating point Values The following types of floating point numbers can be used Note A non normalized number is one whose absolute value is too small to be expressed as a normalized number Non normalized numbers have fewer sig nificant digits If the result of calculations is a non normalized number includ ing intermediate results the numb...

Page 594: ...of 0 0 Infinity Values of and can be expressed by setting the sign to 0 for positive or 1 for negative The exponent will be 2 047 211 1 and the mantissa will be 0 NaN NaN not a number is produced when the result of calculations such as 0 0 0 0 or does not correspond to a number or infinity The exponent will be 255 28 1 and the mantissa will be not 0 Note There are no specifications for the sign of...

Page 595: ...ative zero are treated as equivalent in comparisons Comparison or equivalency tests on one or more NaN will always be true for and always be false for all other instructions Double precision Floating point Calculation Results When the absolute value of the result is greater than the maximum value that can be expressed for floating point data the Overflow Flag will turn ON and the result will be ou...

Page 596: ...00 D00300 D10000 F D01200 D00400 D20000 FLT D00100 D00200 FLT D01000 D01200 RAD D00200 D00200 000000 BIN D00000 D00100 BIN D01000 D01000 SIND D00200 D00400 COSD D00200 D00300 END D D01200 D00300 D10000 D D01200 D00400 D20000 DBL D00100 D00200 DBL D01000 D01200 RADD D00200 D00200 Ladder Program for the Single precision Calculation Ladder Program for the Double precision Calculation ...

Page 597: ...or x r cos θ is output to D10000 and D10001 b The value for y r sin θ is output to D20000 and D20001 Coordinate Floating point number Real number x 4116 59CF 3 4202015399933 y 405A E495 9 3969259262085 1 This program section converts the BCD data to double precision floating point data 64 bits IEEE754 format a The BIN 023 instructions convert the BCD data to binary and the DBL 843 in structions co...

Page 598: ...rogram areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6140 CIO 0000 to CIO 6143 Work Area W000 to W508 W000 to W511 Holding Bit Area H000 to H508 H000 to H511 Auxiliary Bit Area A000 to A956 A448 to A959 Timer Area T0000 to T4092 T0000 to T4095 Counter Area C0000 to C4092 C0000 to C4095 DM Area D00000 to D32764 D00000 to D32767 EM Area without ba...

Page 599: ...on is supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol Variations Applicable Program Areas Operand Specifications S 3CH SCH DCH S 1CH S 2CH Floating point data 64 bits Signed binary data 16 bits Name Label Operation Error Flag ER ON if the source data S to S 3 is not a number NaN ON if the integer portion of the source data S to S 3 is not within the range of 32 768 to 32 76...

Page 600: ...C4092 C0000 to C4094 DM Area D00000 to D32764 D00000 to D32766 EM Area without bank E00000 to E32764 E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants...

Page 601: ...Upward Differentiation DBL 843 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6140 Work Area W000 to W511 W000 to W508 Holding Bit Area H000 to H511 H000 to H508 Auxiliary Bit Area A000 to A959 A448 to A956 ...

Page 602: ...nverts a 32 bit signed binary value to double precision 64 bit floating point data and places the result in the specified destination words This instruction is supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol Variations Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 A...

Page 603: ... to 15 777 215 0 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 to H510 H000 to H508 Auxiliary Bit Area A000 to A958 A448 to A956 Timer Area T0000 to T4094 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D...

Page 604: ...sult are 0 OFF in all other cases Negative Flag N ON if the result is negative OFF in all other cases D 845 Au Ad D Au First augend word Ad First addend word D First destination word Variations Executed Each Cycle for ON Condition D 845 Executed Once for Upward Differentiation D 845 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block prog...

Page 605: ... turn ON and the result will be output as 0 The various combinations of augend and addend data will produce the results shown in the following table Note 1 The results could be zero including underflows a numeral or 2 The Error Flag will be turned ON and the instruction won t be executed Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data ...

Page 606: ...result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all other cases D 846 Mi Su D Mi First Minuend word Su ...

Page 607: ... and subtrahend data will produce the results shown in the following table Note 1 The results could be zero including underflows a numeral or 2 The Error Flag will be turned ON and the instruction won t be executed EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000...

Page 608: ...the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all other cases D 847 ...

Page 609: ...l produce the results shown in the following table Note 1 The results could be zero including underflows a numeral or 2 The Error Flag will be turned ON and the instruction won t be executed EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses...

Page 610: ...s Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all ...

Page 611: ...wn in the following table Note 1 The results could be zero including underflows a numeral or 2 The results will be zero for underflows 3 The Error Flag will be turned ON and the instruction won t be executed EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirec...

Page 612: ...ls Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all...

Page 613: ...00 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D S 1CH D 1CH SCH DCH S 2CH D 2CH S 3CH D 3CH Result rad...

Page 614: ...ed Each Cycle for ON Condition DEGD 850 Executed Once for Upward Differentiation DEGD 850 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 A...

Page 615: ...se Calculates the sine of a double precision 64 bit floating point number in radians and places the result in the specified destination words This instruction is supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D S 1CH D 1CH SCH...

Page 616: ...diate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 A448 to A956 Timer Area T0000 to T4092 Counter Area C0000 to C4092 DM Area D00000 to D32764 EM Area without bank E00000 to E32764 EM Area with bank En_0...

Page 617: ... the result in the specified destination words This instruction is supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol Variations Applicable Program Areas S Angle radian data R Result sine R Name Label Operation Error Flag ER ON if the source data is not a number NaN ON if the absolute value of the source data exceeds 65 535 OFF in all other cases Equals Flag ON if both the exp...

Page 618: ... DOUBLE RADIANS TO DEGREES DEGD 850 The following diagram shows the relationship between the angle and result Area S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 A448 to A956 Timer Area T0000 to T4092 Counter Area C0000 to C4092 DM Area D00000 to D32764 EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_327...

Page 619: ...er cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases TAND 853 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition TAND 853 Executed Once for Upward Differentiation TAND 853 Executed On...

Page 620: ...DOUBLE DEGREES TO RADIANS RADD 849 or 3 16 10 DOUBLE RADIANS TO DEGREES DEGD 850 If the absolute value of the result is greater than the maximum value that can be expressed as floating point data the Overflow Flag will turn ON and the result will be output as The following diagram shows the relationship between the angle and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E327...

Page 621: ...exceeds 65 535 OFF in all other cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases ASIND 854 S D S First source word D Fir...

Page 622: ... cuted The result is output to words D to D 3 as an angle in radians within the range of π 2 to π 2 The following diagram shows the relationship between the input data and result EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000...

Page 623: ...ta ON if the source data is not a number NaN ON if the absolute value of the source data exceeds 1 0 OFF in all other cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases ACOSD 855 S D S First source word D First destination word Va...

Page 624: ...xe cuted The result is output to words D to D 3 as an angle in radians within the range of 0 to π The following diagram shows the relationship between the input data and result EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 t...

Page 625: ... the source data is not a number NaN ON if the absolute value of the source data exceeds 1 0 OFF in all other cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N Unchanged ATAND 856 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition ATAN...

Page 626: ...gle in radians within the range of π 2 to π 2 The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registe...

Page 627: ...cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases SQRTD 857 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition SQRTD 857 Executed Once for Upward Differentiation SQRTD 857 Executed On...

Page 628: ...s greater than the maximum value that can be expressed as floating point data the Overflow Flag will turn ON and the result will be output as The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En...

Page 629: ...uals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF Unchanged Negative Flag N Unchanged EXPD 858 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition EXPD 858 Execut...

Page 630: ...s If the absolute value of the result is less than the minimum value that can be expressed as floating point data the Underflow Flag will turn ON and the result will be output as 0 Note The constant e is 2 718282 The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect ...

Page 631: ...F in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision 64 bit floating point value Negative Flag N Unchanged LOGD 859 S D S First source word D First destination word Variations Executed Each...

Page 632: ... be expressed as floating point data the Overflow Flag will turn ON and the result will be output as Note The constant e is 2 718282 The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n ...

Page 633: ... both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases PWRD 860 B E D B First base word E First exponent word D First destination word Variations Exe...

Page 634: ...2767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area B E D S1 1 S1 S1 3 S1 2 D 1 D D 3 D 2 S2 1 S2 S2 3 S2 2 Exponent d...

Page 635: ...int input comparison instructions Ladder Symbol Variations Applicable Program Areas Operand Specifications Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all other cases Name Label Operation S1 Comparison data 1 S2 Comparison data 2 Symbol options S1 S2 Variations C...

Page 636: ...nstructions to control the execution of subsequent instructions Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S1 S2 Input type Operation LD The instruction can be c...

Page 637: ...LOAD DOUBLE FLOATING NOT EQUAL True if C1 C2 AND D AND DOUBLE FLOATING NOT EQUAL OR D OR DOUBLE FLOATING NOT EQUAL 337 LD D LOAD DOUBLE FLOATING LESS THAN True if C1 C2 AND D AND DOUBLE FLOATING LESS THAN OR D OR DOUBLE FLOATING LESS THAN 338 LD D LOAD DOUBLE FLOATING LESS THAN OR EQUAL True if C1 C2 AND D AND DOUBLE FLOATING LESS THAN OR EQUAL OR D OR DOUBLE FLOATING LESS THAN OR EQUAL 339 LD D L...

Page 638: ...f C1 C2 OFF in all other cases Less Than or Equal Flag ON if C1 C2 OFF in all other cases Negative Flag N Unchanged Name Label Operation D D00100 D00200 000000 005000 34580 14876 3 4580E 48 1 4876E 48 1 0 0 0 1 0 1 1 0 1 0 0 0 1 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 1 0 0 1 0 1 0 1 0 0 1 1 1 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 1 1 15 0 S1 D00100 S1 1 D00101 S1 2 D00102 S1 3 D00103 0 1 1 1 1 0 0 1 0 0 ...

Page 639: ...T RECORD LOCATION SETR 635 638 GET RECORD NUMBER GETR 636 640 DATA SEARCH SRCH 181 642 SWAP BYTES SWAP 637 644 FIND MAXIMUM MAX 182 646 FIND MINIMUM MIN 183 650 SUM SUM 184 653 FRAME CHECKSUM FCS 180 656 STACK NUMBER OUTPUT SNUM 638 659 STACK DATA READ SREAD 639 662 STACK DATA OVERWRITE SWRIT 640 665 STACK DATA INSERT SINS 641 668 STACK DATA DELETE SDEL 642 671 Group Purpose Instructions Stack Ope...

Page 640: ...erwrite insert and delete data elements in a stack For example when items are being handled on a conveyor these instructions can add remove or change a data element in the stack that corresponds to an item on the conveyor PUSH 632 Stores data in the address indicated by the stack pointer and increments the pointer by one FIFO 633 Reads first oldest word of data that was stored in the stack shifts ...

Page 641: ...in the stack The offset value indicates the location of the desired word the number of words before the cur rent pointer position Stack Pointer Stack Pointer Data region Data region A is the last word stored in the stack Decrements the pointer by one and reads content of A A B A B A A B C A B C Data region Pointer Pointer Unchanged Last word of data in stack Stack Data region Data in pointer posit...

Page 642: ...fore the current pointer position M A B C M B C Stack Data region Pointer Pointer Unchanged Last word of data in stack Stack Data region Pointer to last word in stack Data in pointer position n n 3 in this example Pointer Overwrites data at pointer position n n 3 in this example n n 3 M A B C M A B C Stack Data region Pointer Pointer Incremented by 1 Last word of data in stack Stack Data region Po...

Page 643: ...data Table data stored in the specified I O memory are can be registered as the table area using the DIM instruction Up to 16 separate tables can be defined with table numbers 0 to 15 A A B C B C C Stack Data region Pointer Pointer Decre mented by 1 Last word of data in stack Stack Data region Pointer to last word in stack Data in pointer position n n 3 in this example Pointer Deletes the data ele...

Page 644: ...ACK SSET 630 Purpose Defines a stack of the specified length beginning at the specified word Ladder Symbol Variations Applicable Program Areas Operands TB through TB 3 Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer the PLC memory address of the next word to be overwritten by PUSH 632 Table Record Same number ...

Page 645: ... digits Stack pointer leftmost 4 digits 15 0 TB 15 0 TB 1 15 0 TB 2 15 0 TB 3 Data storage region 15 0 TB 4 TB N 1 Area TB N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to ...

Page 646: ...utomatically updated when PUSH 632 FIFO 633 or LIFO 634 is executed Normally users need not be concerned about the stack control word When accessing the contents of the stack other than by using the above instructions set the stack pointer value using the Index Register IR for indirect referencing Flags Precautions The minimum value for the number of words in the stack N is 5 because N includes th...

Page 647: ...ack pointer the PLC memory address of the next word to be overwritten by PUSH 632 Last word in stack Stack pointer PC memory address 10 words PC memory address of last word in stack Stack pointer 10 TB First stack address S Source word PUSH 632 TB S Variations Executed Each Cycle for ON Condition PUSH 632 Executed Once for Upward Differentiation PUSH 632 Executed Once for Downward Differentiation ...

Page 648: ...TB 3 Data storage region 15 0 TB 4 TB N 1 Area TB S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00...

Page 649: ...e stack must be defined in advance with SSET 630 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB S m n n m D D 1 D 2 D 3 S m m 1 n n m 1 D D 1 D 2 D 3 A A A PLC memory address PLC memory Write A Pointer Increment pointer by 1 Pointer Name Label Operation Error Flag ER ON if the addre...

Page 650: ... in stack Stack pointer PC memory address PC memory address of last word in stack Stack pointer Write A Last word in stack PC memory address PC memory address of last word in stack Stack pointer A After the data is written to D00007 the stack pointer is incremented by one TB First stack address D Destination word FIFO 633 TB D Variations Executed Each Cycle for ON Condition FIFO 633 Executed Once ...

Page 651: ...of the last word in the stack leftmost 4 digits Stack pointer rightmost 4 digits Stack pointer leftmost 4 digits 15 0 TB 15 0 TB 1 15 0 TB 2 15 0 TB 3 Data storage region 15 0 TB 4 TB N 1 Area TB D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area ...

Page 652: ...irst in first out basis FIFO 633 reads the beginning data from the stack and deletes this data to move the next one forward Flags Precautions The stack must be defined in advance with SSET 630 Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB D m 1 m 1 PC mem...

Page 653: ... of data written to the specified stack the newest data in the stack Ladder Symbol Variations Applicable Program Areas TB D D00300 Last word in stack Stack pointer PC memory address of last word in stack Stack pointer Read by FIFO 633 TB 1 D D00300 Last word in stack PC memory address of last word in stack Stack pointer Stack pointer TB First stack address D Destination word LIFO 634 TB D Variatio...

Page 654: ...ord in the stack leftmost 4 digits Stack pointer rightmost 4 digits Stack pointer leftmost 4 digits 15 0 TB 15 0 TB 1 15 0 TB 2 15 0 TB 3 Data storage region 15 0 TB 4 TB N 1 Area TB D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank ...

Page 655: ...r indicates the address next to the last data Flags Precautions The stack must be defined in advance with SSET 630 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB D TB TB 1 TB 2 TB 3 TB TB 1 TB 2 TB 3 m 1 m 1 m 1 Newest data Reading Stack pointer Stack pointer A is left unchanged The...

Page 656: ...declaring the length of each record and the number of records Up to 16 record tables can be defined Ladder Symbol Variations TB Last word in stack Stack pointer PC memory address of last word in stack Stack pointer 1 D D00300 Last word in stack Stack pointer PC memory address of last word in stack Stack pointer Read by LIFO 634 N Table number LR Length of each record NR Number of records TB First ...

Page 657: ...nged once the region has been declared as records Use DIM 631 in combination with SETR 635 SET RECORD NUMBER or GETR 636 GET RECORD NUMBER to simplify the calculation of Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N LR NR TB CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer A...

Page 658: ... are SETR 635 and GETR 636 SETR 635 sets the leading PLC memory address of the specified record number in the specified Index Register GETR 636 outputs the record number of the record that includes the specified Index Register value PLC memory address Flags Precautions Records in a registered table are identified by their record numbers which range from 0 to NR 1 Examples When CIO 000000 is ON in ...

Page 659: ...ecord number D Destination Index Register SETR 635 N R D Variations Executed Each Cycle for ON Condition SETR 635 Executed Once for Upward Differentiation SETR 635 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N R D CIO Area CIO 0000 to CIO 6143 Work Area ...

Page 660: ...memory address of the first word of record 3 of table number 10 and stores this address in Index Register IR11 Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area N R D Record number R Table number N PC memory address SETR 635 writes the PC memory address m of the first word of ...

Page 661: ...ch Cycle for ON Condition GETR 636 Executed Once for Upward Differentiation GETR 636 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N IR D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Tim...

Page 662: ...lowing example GETR 636 finds the record number of the record that contains the PLC memory address in Index Register IR11 and writes this record number to D01000 Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area N IR D Record number R Table number N PC memory address GETR 636 ...

Page 663: ...he first word in the search range The words from R1 to R1 C 1 are searched for the desired data C is the number of words set in C Note R1 and R1 C 1 must be in the same data area C First control word R1 First word in range Cd Comparison data SRCH 181 C R1 Cd Variations Executed Each Cycle for ON Condition SRCH 181 Executed Once for Upward Differentiation SRCH 181 Executed Once for Downward Differe...

Page 664: ...000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A000 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000...

Page 665: ...ten to IR00 and the total number of matches is written to DR00 If the table length is specified as 10 10 decimal or A hexadecimal the num ber of matches will not be output to the data register DR00 3 17 9 SWAP BYTES SWAP 637 Purpose Switches the leftmost and rightmost bytes in all of the words in the range In CS1 H CJ1 H and CJ1M CPU Units this instruction can be run in the background Refer to CS ...

Page 666: ... Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK R1 R1 N 1 Leftmost byte Rightmost byte 15 0 8 7 to Area N R1 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00...

Page 667: ...00 to W009 3 17 10 FIND MAXIMUM MAX 182 Purpose Finds the maximum value in the range In CS1 H CJ1 H and CJ1M CPU Units this instruction can be run in the background Refer to CS CJ Series Programmable Controllers Programming Manual for details on background execution Ladder Symbol Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15...

Page 668: ...1 C 1 are searched for the maximum value C is the number of words specified in C Note R1 and R1 C 1 must be in the same data area Variations Executed Each Cycle for ON Condition MAX 182 Executed Once for Upward Differentiation MAX 182 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrup...

Page 669: ... Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A000 to A959 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect...

Page 670: ...alue The maxi mum value is written to D00300 and the PLC memory address of the word containing the maximum value is written to IR00 Name Label Operation Error Flag ER ON if the content of C isn t within the specified range of 0001 through FFFF OFF in all other cases Equals Flag ON if the maximum value is 0000 OFF in all other cases Negative Flag N ON if bit 15 is ON in the word containing the maxi...

Page 671: ...ddress of the word that contains the minimum value to IR00 Note C and C 1 must be in the same data area The following table shows the possible values of C C First control word R1 First word in range D Destination word MIN 183 C R1 D Variations Executed Each Cycle for ON Condition MIN 183 Executed Once for Upward Differentiation MIN 183 Executed Once for Downward Differentiation Not supported Immed...

Page 672: ... H000 to H511 Auxiliary Bit Area A000 to A958 A000 to A959 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D0000 to D32767 E00000 to E32767 E...

Page 673: ... the data within the range is treated as signed binary data and hexadecimal values 8000 to FFFF are considered negative Thus the results of the search will differ depending on the data type setting Examples When CIO 000000 turns ON in the following example MIN 183 searches the 10 word range beginning at D00200 for the minimum value The minimum value is written to D00300 and the PLC memory address ...

Page 674: ...umber of words 10 words Always 0 1 Outputs address to IR00 1 Treats data as signed binary 1 R1 100CF 000100CF 0 0 0 A C First control word R1 First word in range D First destination word SUM 184 C R1 D Variations Executed Each Cycle for ON Condition SUM 184 Executed Once for Upward Differentiation SUM 184 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification N...

Page 675: ...tput to D 1 and D The leftmost four digits are stored in D 1 and the rightmost four digits are stored in D Operand Specifications Number of words bytes in range Data type Effective if bit 14 is 0 0 Unsigned binary data 1 Signed binary data Data type 0 Binary 1 BCD Units 0 Words 1 Bytes Starting byte Effective if bit 13 is 1 0 Leftmost byte 1 Rightmost byte 15 0 C 15 0 14 0 C 1 13 12 11 0000 0000 0...

Page 676: ...o E32766 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers Index Registers Indirect addressing using...

Page 677: ...ations C D00300 C 1 D00301 R1 D D00200 D 1 D00201 Number of words bytes Data type 0 Unsigned binary data Data type 0 Binary Units 1 Bytes Starting byte 1 Rightmost byte 10 bytes Always 0 The shaded bytes are added Table length C 3 9 F 2 7 2 A D C 2 A 2 A 2 0 2 0 5 5 0 3 0 0 7 8 0 0 R1 C First control word R1 First word in range D First destination word FCS 180 C R1 D Variations Executed Each Cycle...

Page 678: ...of the words in the calculation range must be in the same data area D First destination word The result of the calculation is output to D if bytes have been selected The result of the calculation is output to D 1 and D if words have been selected In this case the leftmost four digits are stored in D 1 and the right most four digits are stored in D Operand Specifications Block program areas Step pr...

Page 679: ... R1 bit 12 0 Flags Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_0000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767...

Page 680: ...iations Applicable Program Areas Table length Units 1 Bytes Starting byte Effective only if bit 13 is 1 1 Rightmost byte 10 bytes Always 0 The FCS value for the shaded bytes is calculated and converted to ASCII Always 0 C D00300 C 1 D00301 R1 D D00200 0 2 0 4 0 6 0 8 0 0 3 0 0 1 0 3 0 5 0 7 0 0 3 8 R1 SNUM 638 TB D TB First stack address D Destination word Variations Executed Each Cycle for ON Con...

Page 681: ...st 4 digits Stack pointer rightmost 4 digits Initial value is the rightmost 4 digits of the PLC memory address for Stack pointer leftmost 4 digits Initial value is the leftmost 4 digits of the PLC memory address for TB 4 Data storage region 15 0 TB 4 TB N 1 Area TB D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 ...

Page 682: ...ack pointer indicates D00007 Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB D A TB TB 1 TB 2 TB 3 TB 4 N m n D n m PLC memory address Pointer Counts the number of words N from the address of the beginning of the stack TB 4 to the pointer position 1 Last wo...

Page 683: ...ss of the next available word in the stack SREAD 639 TB C D TB First stack address C Offset value D Destination word Variations Executed Each Cycle for ON Condition SREAD 639 Executed Once for Upward Differentiation SREAD 639 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks O...

Page 684: ...olding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 ...

Page 685: ...e data in the specified word in the stack starting at D00000 and outputs the data to D00100 In this case the stack pointer indicates D00007 and the offset value is 3 so the data is read from D00004 A A B C TB TB 1 TB 2 TB 3 TB 4 D m n C n m PLC memory address Pointer Reads the data A in the specified word and outputs that data to D The address of the desired word is calculated by subtracting the o...

Page 686: ...06 D00007 D00008 D00009 A D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 D00100 A 3 PLC memory address Stack pointer Last word in stack Stack pointer Stack pointer Last word in stack PLC memory address of last word in the The stack pointer position remains unchanged after the data is read PLC memory address of last word in the Stack pointer SWRIT 640 TB C S TB First stack ad...

Page 687: ...4 digits Stack pointer rightmost 4 digits Initial value is the rightmost 4 digits of the PLC memory address for Stack pointer leftmost 4 digits Initial value is the leftmost 4 digits of the PLC memory address for TB 4 Data storage region 15 0 TB 4 TB N 1 Area TB C S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer...

Page 688: ...s Examples When CIO 000000 is ON in the following example SWRIT 640 writes the data in D00100 to the specified word in the stack starting at D00000 In this Constants 0001 to FFFB Hexadecimal 0000 to FFFF Hexadecimal Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 A...

Page 689: ... B D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 A D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 D00100 A 3 PLC memory address Stack pointer Last word in stack Stack pointer Stack pointer Last word in stack PLC memory address of last word in the stack The stack pointer position remains unchanged after the data is written Overwrite Stack pointer PLC m...

Page 690: ...4 digits Stack pointer rightmost 4 digits Initial value is the rightmost 4 digits of the PLC memory address for Stack pointer leftmost 4 digits Initial value is the leftmost 4 digits of the PLC memory address for TB 4 Data storage region 15 0 TB 4 TB N 1 Area TB C S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer...

Page 691: ...ter than the address of the last word in the stack TB 1 and TB when SINS 641 is executed a stack overflow error will occur and the source data will not be inserted Constants 0001 to FFFB Hexadecimal 0000 to FFFF Hexadecimal Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 t...

Page 692: ...tination word and shifts the remaining the data in the stack upward The offset value indicates the location of the desired data ele ment how many data elements before the current pointer position This instruction is supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol SINS D00000 0003 D00100 000000 B C D D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 A B C...

Page 693: ...reshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK TB 0 15 TB 1 0 15 TB 2 0 15 TB 3 0 15 PLC memory address of the last word in the stack rightmost 4 digits PLC memory address of the last word in the stack leftmost 4 digits Stack pointer rightmost 4 digits Initial value is the rightmost 4 digits of the PLC memory address for Stack poi...

Page 694: ...h bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0001 to FFFB Hexadecimal Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR1...

Page 695: ... word and the stack pointer is decremented from D00007 to D00006 Name Label Operation Error Flag ER ON if the content of the stack pointer TB 3 and TB 2 is less than or equal to the PLC memory address of first word in the data region of the stack TB 4 This is a stack underflow error ON if the offset value specified in C is 0 or greater than the maximum data region size FFFB Hex OFF in all other ca...

Page 696: ...ons Executed Each Cycle for ON Condition PID 190 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed Set value SV Proportional band P Integral constant Tik Derivative constant Tdk Sampling perio...

Page 697: ...e manipulated variable in order to avoid the adverse effects of sud den changes When the execution condition turns ON the PV for the specified sampling period is entered and processing is performed Area S C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6105 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W473 W000 to W511 Holding Bit Area H000 to H511 H000 to H473 H000 to H511 Auxiliary Bit ...

Page 698: ...ction of proportional operation can be designated as either forward or reverse The upper and lower limits of the manipulated variable output can be desig nated The sampling period can be designated in units of 10 ms 0 01 to 99 99 s but the actual PID action is determined by a combination of the sampling period and the time of PID 190 instruction execution with each cycle The timing of enabling cha...

Page 699: ...value that can be changed while the input condition is ON is the set value for C If any other value is changed be sure to turn the input condition from OFF to ON to enable the new value Example At the rising edge of CIO 000000 OFF to ON the work area in D00209 to D00238 is initialized according to the parameters shown below set in D00200 to D00208 After the work area has been initialized PID contr...

Page 700: ...90 and then the manipulated variable output from PID 190 is converted back to the range 0000 to 1770 Hex again using APR 069 for output from the Analog Output Unit C D00200 C 1 D00201 C 2 D00202 C 3 D00203 C 4 D00204 C 5 D00205 C 6 D00206 C 7 D00207 C 8 D00208 C 9 D00209 to C 38 D00238 Set value 300 Proportional band 10 0 Integral time 120 0 s Derivative time 40 0 s Sampling period 0 5 s Reverse o...

Page 701: ...pling period multiple 9999 Derivative constant Tdk 0 to 8191 No derivative action for sampling period multiple 0 Set value SV 0 to 65535 Valid up to maximum value of input range Measured value PV 0 to 65535 Valid up to maximum value of input range Manipulated variable MV 0 to 65535 Valid up to maximum value of output range ARP From Analog Input Unit Analog input value Control Data C D01000 0000 He...

Page 702: ...ng period τ Sets the period for executing the PID action 0001 to 270F hex 1 to 9999 0 01 to 99 99 s in units of 10 ms Not allowed Bits 04 to 15 of C 5 2 PID parameter α The input filter coefficient Nor mally use 0 65 i e a setting of 000 The filter efficiency decreases as the coefficient approaches 0 000 hex α 0 65 Setting from 100 to 163 hex means that the value of the right most two digits is se...

Page 703: ...e is consistently 60 ms For the first cycle after the initial execution PID 190 will not be executed because 60 ms is less than 100 ms For the second cycle 60 ms 60 ms is greater than 100 ms so PID 190 will be executed The surplus of 20 ms i e 120 ms 100 ms 20 ms will be carried forward For the third cycle the surplus 20 ms is added to 60 ms Because the sum of 80 ms is less than 100 ms PID 190 wil...

Page 704: ...he proportional constant and the stronger the corrective action will be With proportional action an offset residual deviation generally occurs but the offset can be reduced by making the proportional band smaller If it is made too small however hunting will occur Integral Action I Combining integral action with proportional action reduces the offset accord ing to the time that has passed so that t...

Page 705: ...e which is the time required for the manipulated variable of the derivative action to reach the same level as the manipulated variable of the proportional action with respect to the step deviation as shown in the following illustration The longer the derivative time the stronger the correction by the derivative action will be PID Action PID action combines proportional action P integral action I a...

Page 706: ...en it is not a problem if a certain amount of time is required for stabili zation settlement time but it is important not to cause overshooting then enlarge the proportional band When overshooting is not a problem but it is desirable to quickly stabilize control then narrow the proportional band If the proportional band is nar rowed too much however then hunting may occur Step Response of PID Cont...

Page 707: ...he specified parameters The PID con stants can be autotuned This instruction is supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol Variations Applicable Program Areas When P is narrowed Control by measured PID SV Control by measured PID when loose hunting occurs Enlarge I or P SV Control by measured PID when hunting occurs in a short period Lower D SV PIDAT 191 S C D S Input w...

Page 708: ...ng designation C 7 C 8 0 15 C 11 C 40 C 9 C 10 0 15 0 15 12 14 13 0 0 0 Manipulated variable output lower limit Manipulated variable output upper limit Work area 30 words Cannot be used by user AT Command Bit AT Calculation Gain Limit cycle Hysteresis Area S C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6105 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W473 W000 to W511 Holding Bit Area...

Page 709: ...ges When the execution condition turns ON the PV for the specified sampling period is entered and processing is performed Autotuning The status of the AT Command Bit bit 15 of C 9 is checked every cycle If this control bit is turned ON in a given cycle PIDAT 191 will begin autotuning the PID constants The changes in the SV will not be reflected while autotun ing is being performed The limit cycle ...

Page 710: ...s interrupted PID Control The number of valid input data bits within the 16 bits of the PV input S is designated by the input range setting in C 6 bits 08 to 11 For example if 12 bits 4 hex is designated for the input range the range from 0000 hex to 0FFF hex will be enabled as the PV Values greater than 0FFF hex will be regarded as 0FFF hex The set value range also depends on the input range Meas...

Page 711: ...condition is ON When any other values have been changed be sure to change the execution condition from OFF to ON to enable the new settings Set value SV in C Can be changed during PID control only An SV change during autotun ing will not be reflected PID constant change enable setting bit 1 of C 5 P I and D constants in C 1 C 2 and C 3 Changes to these constants will be reflected each sampling per...

Page 712: ...ut range Allowed C 1 Proportional band The parameter for P action expressing the proportional con trol range total control range 0001 to 270F hex 1 to 9999 0 1 to 999 9 in units of 0 1 Can be changed with input condition ON if bit 1 of C 5 is 1 C 2 Tik A constant expressing the strength of the integral action As this value increases the integral strength decreases 0001 to 1FFF hex 1 to 8191 9999 I...

Page 713: ...DAT 191 is being exe cuted This bit is turned OFF auto matically when autotuning is completed Autotuning will be interrupted if the AT Command Bit is turned OFF manually In this case the PID constants will be enabled if they were already calculated when autotuning was inter rupted As a Control Bit 0 1 Executes autotuning 1 0 Interrupts autotuning PID 191 turns the bit OFF automatically when autotu...

Page 714: ...en if the proportional band P integral constant Tik or derivative constant is changed after CIO 000000 turns ON At the rising edge of W 000000 OFF to ON SETB 532 turns ON bit 15 of D00209 C 9 and starts autotuning When autotuning is completed the cal culated P I and D constants are written to C 1 C 2 and C 3 PID control is then restarted with the new PID constants PIDAT 0010 D00200 0020 000000 S C...

Page 715: ...694 Data Control Instructions Section 3 18 CIO 000000 W000000 PV SV MV PID control starts Calculated PID constants are set PID control PID control AT executing Bit 15 of D00209 Time Time ...

Page 716: ...pting Autotuning Before Completion Autotuning can be interrupted by turning bit 15 of D00209 C 9 from ON to OFF PID control will be restarted with the P I and D constants that were in effect before autotuning was started CIO 000000 PV SV MV PID 0010 D00200 0020 000000 S C D PID control and autotuning start Calculated PID constants are set PID control AT executing Bit 15 of D00209 Time Time CIO 000...

Page 717: ...CIO 6143 CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to 959 A000 to A958 A448 to A959 Timer Area T0000 to T4095 T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4094 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32766 D00000 to D32767 EM Area withou...

Page 718: ...or equal to the lower limit C and less than or equal to the upper limit C 1 the input data S will be output to D Flags Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S C D C Lower limit data minimum output data C 1 Upper limit data maximum output data Upper limit Lower limit C 1 C Name...

Page 719: ...e Flag will turn ON Example If D00100 is 0050 hex 80 then 0064 hex 100 will be output to D00300 because 80 is less than the lower limit of 100 If D00100 is 00C8 hex 200 then 0064 hex 100 will be output to D00300 because 200 is within the upper and lower limits If D00100 is 012C hex 300 then 015E hex 350 will be output to D00300 because 350 is greater than the upper limit of 300 3 18 4 DEAD BAND CO...

Page 720: ...W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A958 A448 to A959 Timer Area T0000 to T4095 T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4094 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32766 E00000 to E32767 EM Area with ba...

Page 721: ...data S is greater than the upper limit the Greater Than Flag will turn ON If the output word D is 0000 hex the Equals Flag will turn ON If the input data S is less than the lower limit the Less Than Flag will turn ON If the status of the leftmost bit of the output word D is 1 the Negative Flag will turn ON Example If D00100 is 00B4 hex 180 then 180 200 FFEC hex 20 will be output to D00300 because ...

Page 722: ... Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to...

Page 723: ... If the output data is smaller than the 8000 hex or if is greater than 7FFF the sign will be reversed For example for a negative bias value of FF00 hex and input data of 8000 hex the output data will be as follows 8000 hex 32768 FF00 hex 256 7F00 hex 32512 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary ...

Page 724: ...ue is less than 0 and the resulting value will be stored in D00300 If the value of D00100 is 0 then 0000 hex will be stored in D00300 If the value of D00100 is greater than 0 then a bias of 100 will be applied and the resulting value will be stored in D00300 Name Label Operation Error Flag ER ON if the upper limit is less than the lower limit OFF in all other cases Greater Than Flag ON if the inpu...

Page 725: ... Executed Once for Upward Differentiation SCL 194 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Scaled value for point A Ar 0000 to 9999 4 digit BCD Unscaled value for point B Bs 0000 to FFFF binary Scaled value for point B Br 0000 to 9999 4 digit BCD Unscaled ...

Page 726: ...put as the result If the result is greater than 9999 9999 will be output Timer Area T0000 to T4095 T0000 to T4092 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4092 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32764 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32764 E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32764 n 0 to C En_0...

Page 727: ...ues for As C 1 and Bs C 3 are equal The Equals Flag will turn ON when the contents of the result word D is 0000 Examples In the following example it is assume that an analog signal from 1 to 5 V is converted and input to CIO 0200 as 0000 to 0FA0 hexadecimal SCL 194 is used to convert scale the value in CIO 0200 to a value between 0000 and 0300 BCD When CIO 000000 is ON the contents of CIO 0200 is ...

Page 728: ...nted as 0000 hexadecimal before using SCL 194 as shown in the following exam ple In this example values from 0000 to 00C8 hexadecimal will be converted to negative values SCL 194 however can output only unsigned BCD values from 0000 to 9999 so 0000 BCD will be output whenever the contents of D00000 is between 0000 and 00C8 hexadecimal BCD BIN BCD BIN P1 D00100 P1 1 D00101 P1 2 D00102 P1 3 D00103 C...

Page 729: ...signed BCD data according to the specified linear function An offset can be input in defining the linear function Ladder Symbol Variations Applicable Program Areas R unsigned BCD Point A Point B S unsigned binary R Point A Point B S Source word P1 First parameter word R Result word SCL2 486 S P1 R Variations Executed Each Cycle for ON Condition SCL2 486 Executed Once for Upward Differentiation SCL...

Page 730: ...000 to A957 A448 to A959 Timer Area T0000 to T4095 T0000 to T4093 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4093 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32765 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32765 E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32765 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM address...

Page 731: ...n value and the sign will be indicated by the Carry Flag The result can thus be between 9999 and 9999 If the result is less than 9999 9999 will be output as the result If the result is greater than 9999 9999 will be output SCL2 486 can be used to scale the results of analog signal conversion val ues from Analog Input Units according to user defined scale parameters For example if a 1 to 5 V input ...

Page 732: ...O 000000 is ON the contents of CIO 0205 is scaled using the linear function defined by X 0FA0 Y 0300 and the offset 0 These values are contained in D00100 to D00102 and the result is output to D00200 Scaling 1 to 5 V Analog Input to 200 to 200 In the following example it is assume that an analog signal from 1 to 5 V is converted and input to CIO 2005 as 0000 to 0FA0 hexadecimal SCL2 486 is used to...

Page 733: ...can be input in defining the linear function Ladder Symbol Variations Applicable Program Areas X X Y P1 P1 1 P1 2 Contents of R D00200 Contents of S CIO 0200 Offset Offset 07D0 Hex 0FA0 Hex 0400 Y P1 R 0 F A 0 D00100 D00101 D00102 S Source word P1 First parameter word R Result word SCL3 487 S P1 R Variations Executed Each Cycle for ON Condition SCL3 487 Executed Once for Upward Differentiation SCL...

Page 734: ... to CIO 6143 CIO 0000 to CIO 6139 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W507 W000 to W511 Holding Bit Area H000 to H511 H000 to H507 H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A000 to A443 A448 to A955 A448 to A959 Timer Area T0000 to T4095 T0000 to T4091 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4091 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32763 ...

Page 735: ...the conversion The offset and slope can be a positive value 0 or a negative value Using a negative slope enables reverse scaling The result will be rounded to the nearest integer The source value in S is treated as an absolute BCD value and the sign is indicated by the Carry Flag The source value can thus be between 9999 and 9999 If the result is less than the minimum conversion value the minimum ...

Page 736: ...o 0200 is converted scaled to signed binary value of 0000 to 0FA0 for an Analog Output Unit When CIO 000000 turns ON in the following example the contents of D00000 is scaled using the linear function defined by X 0200 Y 0FA0 and the offset 0 These val ues are contained in D00100 to D00102 The sign of the BCD value in D00000 is indicated by the Carry Flag The result is output to CIO 2011 R signed ...

Page 737: ...on the averaging process and R 2 to R N 1 contain the previous values of S as shown in the following diagram X 0200 Y 0FA0 Hex Y X P1 P1 1 P1 2 P1 3 P1 4 Contents of R 2011 signed binary Contents of S D00000 signed BCD Min conversion Offset Max conversion P1 R S Source word N Number of cycles R Result word R 1 First work area word AVG 195 S N R Variations Executed Each Cycle for ON Condition AVG 1...

Page 738: ...R 1 R 2 R N 1 15 0 14 Previous value 1 Previous value N Average Valid Flag OFF Not valid AVG 195 has not yet been executed the specified number of cycles ON Valid R Average R 1 Processing information Area S N R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area...

Page 739: ... the start of operation If AVG 195 is to be executed in the first program scan clear the First Work Area Word from the program If N Number of Cycles contains 0000 an error will occur and the Error Flag will turn ON When CIO 000000 is ON in the following example the contents of D00100 will be stored one time each scan for the number of scans specified in D00200 The contents will be stored in order ...

Page 740: ...nged On the third and later cycles AVG 195 calculates the average value of the contents of D01002 to D01004 and writes that average value to D01000 S D00100 N D00200 R CIO 0300 R 1 CIO 0301 R 2 CIO 0302 R 3 CIO 0303 R 11 CIO 0311 S N R Average Pointer Average Valid Flag 10 times S scan 2 S scan 1 S scan n D01000 0000 0001 0001 0002 Average D01001 0001 0002 8000 8001 Pointer D01002 0000 0000 0000 0...

Page 741: ...completed program execution continues with the next instruc tion after SBS 091 N Subroutine number SBS 091 N Variations Executed Each Cycle for ON Condition SBS 091 Executed Once for Upward Differentiation SBS 091 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK A...

Page 742: ...ne program such as shown in the following example which is nested to 3 levels Main program Subroutine program SBN 092 to RET 093 Execution condition ON Program end SBN 10 SBN 11 RET SBN 11 SBS 12 RET RET SBN 12 Main program Subroutine program n Execution condition ON Subroutine program m Execution condition ON Program end Two level nesting ...

Page 743: ...001 is ON in the same cycle subroutine 0001 will be executed again but this time DIFU 013 will turn CIO 000100 OFF without checking the status of CIO 000001 In contrast the output of a differentiated instruction DIFU 013 or DIFD 014 would remain ON if the instruction was executed and the output was turned ON but the same subroutine wasn t called a second time In the following example subroutine 00...

Page 744: ...e following example subroutine 1 is executed and program execution returns to the next instruction after SBS 091 The remainder of the main program through the instruction just before SBN 092 1 is then executed Example 2 Sequential Non nested Subroutines When CIO 000000 is ON in the following example subroutine 1 is executed and program execution returns to the next instruction after SBS 091 1 When...

Page 745: ...in subroutine 1 and program execution returns to the next instruction after SBS 091 2 when sub routine 2 is completed Execution of subroutine 1 continues and program exe cution returns to the next instruction after SBS 091 1 when subroutine 1 is completed 1 3 5 2 4 A S1 B S2 C A S1 B C A B S2 C A B C Main program Subroutines CIO 000000 ON CIO 000001 ON Order of execution Program end ...

Page 746: ...ions 1 5 2 4 3 A S1 1 S2 S1 2 B A S1 1 S1 2 B A B A B CIO 000000 ON CIO 000001 ON Order of execution Subroutine 1 Subroutine 2 1 2 2 1 N Subroutine number S First input parameter word D First output parameter word MCRO 099 N S D Variations Executed Each Cycle for ON Condition MCRO 099 Executed Once for Upward Differentiation MCRO 099 Executed Once for Downward Differentiation Not supported Immedia...

Page 747: ...ough D 3 and program execution continues with the next instruction after MCRO 099 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A444 A448 to A956 A448 to A956 Timer Area T0000 to T4092 Counter Area C0000 to C4092 DM Area D00000 to D32764 EM Area ...

Page 748: ...owing example two MCRO 099 instruc tions pass different input and output data to subroutine 1 1 2 3 1 The first MCRO 099 instruction passes the input data in CIO 0100 to CIO 0103 and executes the subroutine When the subroutine is complet ed the output data is stored in CIO 0300 to CIO 0303 MCRO 099 MCRO 099 Execution of subrou tine between SBN 092 and RET 093 The subroutine uses A600 to A603 as in...

Page 749: ...ates in the same way but the input data in CIO 0200 to CIO 0203 is passed to A600 to A603 and the output data in A604 to A607 is passed to CIO 0400 to CIO 0403 Input Output 1 1 1 Subroutine 1 Macro area output words Input data is passed when the subroutine is called Macro area input words Execution of subroutine 1 D 0300 D 1 0301 D 2 0302 D 3 0303 A604 A605 A606 A607 Output data is passed when ret...

Page 750: ...ted by RET 093 The region of the program beginning at the first SBN 092 instruction is the subroutine region A subroutine is executed only when it has been called by SBS 091 or MCRO 099 N Subroutine number SBN 092 N Variations Executed Each Cycle for ON Condition SBN 092 Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed ...

Page 751: ...ored Note The input method for the subroutine number N is different for the CX Pro grammer and a Programming Console Input 0 to 1023 on the CX Program mer and 0000 to 1023 on a Programming Console Be sure to place each subroutine in the same program task as its corre sponding SBS 091 or MCRO 099 instruction A subroutine in one task can t be called from another task It is possible to program a subr...

Page 752: ...n subrou tines Example When CIO 000000 is ON in the following example subroutine 10 is executed and program execution returns to the next instruction after the SBS 091 or MCRO 099 instruction that called the subroutine Task 1 Task 2 Task Not allowed OK Not allowed OR 10 10 10 Subroutine 10 ...

Page 753: ...NTRY SBN 092 for examples of the operation of RET 093 3 19 5 GLOBAL SUBROUTINE CALL GSBS 750 Purpose Calls the global subroutine with the specified subroutine number and exe cutes that program The same global subroutine can be called from two or more tasks This instruction is supported by the CS1 H CJ1 H CJ1M and CS1D CPU Units only GSBS 750 is used in combination with GSBN 751 and GRET 752 the GL...

Page 754: ...t tasks The program can be modularized by making global subroutines into standard subroutines that are common to many tasks The global subroutine region between GSBN 751 and GRET 752 must be defined in interrupt task 0 If it is defined in another task an error will occur and the Error Flag will be turned ON when the GSBS 750 instruction is exe cuted The GSBS 750 instruction can be written in both ...

Page 755: ...o GRET 752 can be defined in interrupt task 0 B A END A GSBN n GRET C A B GSBS n 000000 C GSBS n 000001 Execution condition ON Execution condition ON Main program Cyclic or interrupt task Cyclic or interrupt task Interrupt task 0 Global subroutine program GSBN 751 to GRET 752 ...

Page 756: ...ions in subroutines The operation of differentiated instructions in a global subroutine is unpredict able if a subroutine is executed more than once in the same cycle In the fol lowing example global subroutine 0001 is executed when CIO 000000 is ON and CIO 000100 is turned ON by DIFU 013 when CIO 000001 has gone B A D C B GSBS n 000000 D GSBS m 000001 END A GSBN n C GSBN m GRET END GRET Execution...

Page 757: ... if the instruction was executed and the output was turned ON but the same global subroutine wasn t called a second time In the following example global subroutine 0001 is executed if CIO 000000 is ON Output CIO 000100 is turned ON by DIFU 013 when CIO 000001 has gone from OFF to ON If CIO 000000 is OFF in the following cycle subrou tine 0001 won t be executed again and output CIO 000100 will rema...

Page 758: ...ore than once When GSBS 750 is executed in the following cases the global subroutine won t actually be called and the Error Flag will be turned ON 1 2 3 1 The specified global subroutine is not defined 2 Subroutine nesting counting both regular and global subroutines ex ceeds 16 levels 3 The global subroutine is calling itself 4 The specified global subroutine is being executed 5 The specified glo...

Page 759: ...xt instruction after GSBS 750 Example 2 Two or more global subroutine programs can be programmed in interrupt task 0 In this case interrupt task 0 can be divided and used as the subroutine function s task Status of CIO 000000 Order of program execution ON A S B OFF A B Status of CIO 000000 Order of program execution ON C S D OFF C D GSBN 1 END B GSBS n A 000000 GRET END END D GSBS n C 000001 CIO 0...

Page 760: ...D 000000 GSBN 1 GSBN 2 GRET GRET 000001 CIO 000000 ON Cyclic or interrupt task It is possible to debug problems within particular tasks by using regular subroutines in the local task only as well as global subroutines that are shared with other tasks Interrupt task 0 Global subroutine program S1 Global subroutine program S2 Subroutine program S CIO 000001 OFF CIO 000001 ON ...

Page 761: ...ubroutine number The end of the subroutine is indicated by GRET 752 The region of the program beginning at the first GSBN 751 instruction is the subroutine region A subroutine is executed only when it has been called by GSBS 750 The global subroutine region between GSBN 751 and GRET 752 must be defined in interrupt task 0 If it is defined in another task an error will occur GSBN 751 N N Global sub...

Page 762: ...on When two or more global subroutines are being used group them together in interrupt task 0 after the end of the main program If part of the main program is placed after the global subroutine region that program section will be ignored The input method for the global subroutine number N is different for the CX Programmer and a Programming Console Input 0 to 1023 on the CX Programmer and 0000 to ...

Page 763: ...obal subroutine is called and the subroutine is not in interrupt task 0 The step instructions STEP 008 and SNXT 009 cannot be used in glo bal subroutines GSBS n END GSBN n GRET END GSBS n END GSBN n GRET END Cyclic task 1 Not allowed OK Cyclic task 1 Cyclic task 2 Interrupt task 0 GSBN SNXT STEP GRET Not allowed ...

Page 764: ...dicates the end of a global subroutine and GSBN 751 indicates the beginning of a global subroutine See 3 19 6 GLOBAL SUBROUTINE ENTRY GSBN 751 for more details on the operation of global subroutines When program execution reaches GRET 752 it is automatically returned to the next instruction after the GSBS 750 instruction that called the global sub routine Precautions When the subroutine isn t bein...

Page 765: ...Interrupt Input Unit cannot be used with a CJ1 CPU Unit Also I O interrupt tasks cannot be executed The relationship between Interrupt Input Unit unit numbers and interrupt task numbers is shown in the following table N Interrupt identifier S Interrupt data MSKS 690 N S Variations Executed Each Cycle for ON Condition MSKS 690 Executed Once for Upward Differentiation MSKS 690 Executed Once for Down...

Page 766: ...l interrupt inputs that have been detected will be cleared when the rising fall ing edge designation is changed Operand Contents N Specify the Interrupt Input Unit s unit number 2 Unit number 0 3 Unit number 1 S Specify either the rising or falling edge of the interrupt input sig nal Set to 0000 to FFFF Hex 16 bits per Unit Individual bits indicate the following 0 Rising edge 1 Falling edge Unit n...

Page 767: ...ut 0 7 Interrupt input 1 8 Interrupt input 2 9 Interrupt input 3 S Interrupt mask 0000 hex Interrupt enabled direct mode 0001 hex Interrupt masked direct mode 0002 hex Decrementing counter started and interrupts enabled counter mode 0003 hex Incrementing counter started and interrupts enabled counter mode Interrupt input number Interrupt task numbers Interrupt input 0 140 CIO 296000 Interrupt inpu...

Page 768: ...d interrupt 1 interrupt task 3 S Disable scheduled interrupt 0000 hex Set sched ule inter rupt time and start schedule interrupt For 10 to 99 990 ms or 1 to 9 999 ms i e when unit is 10 ms or 1 ms 0001 to 270F hex For 0 5 to 999 9 ms i e when unit is 0 1 ms 0005 to 270F hex Settings 0001 to 0004 hex cannot be used an instruction error will occur Area N S CIO Area CIO 0000 to CIO 6143 Work Area W00...

Page 769: ... to set the scheduled in terrupt interval and does not set the time to the first scheduled interrupt To accurately control the time to the first interrupt and the interrupt interval program CLI 691 to set the time to the first schedule interrupt just before programming MSKS 690 If MSKS 690 is used to restart a schedule in terrupt for a CJ1M CPU Unit however the time to the first scheduled inter ru...

Page 770: ...r Flag A40213 will be turned ON When IORF 097 is being executed within an interrupt task to refresh I O in a Special I O Unit cyclic refreshing with that Special I O Unit must be disabled Name Label Operation Error Flag ER ON if N isn t within the specified range of 0 to 5 0 to 15 for CJ1M Built in Interrupt Inputs ON if S isn t within the specified range of 0000 to 00FF hex when N is 0 to 3 when ...

Page 771: ...following example MSKS 690 unmasks enables interrupt inputs 1 3 and 5 in Interrupt Input Unit 2 Example for Scheduled Interrupts When CIO 000001 is ON in the following example MSKS 690 sets a 10 sec ond time interval for scheduled interrupt 2 In this case the scheduled time interval units are set to 10 ms in the PLC Setup 3 20 2 READ INTERRUPT MASK MSKR 692 Purpose Reads the current interrupt proc...

Page 772: ...ecuted Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Operand Contents N Specify the Interrupt Input Unit s unit number 0 Unit number 0 1 Unit number 1 D Interrupt mask status 0000 to FFFF Hex 16 bits per Unit Individual bits indicate the following 0 Interrupt enabled 1 ...

Page 773: ...Hex 8 bits per Unit Individual bits indicate the following 0 Interrupt enabled 1 Interrupt masked Unit number Interrupt task numbers 0 100 to 107 Bits 00 to 07 of S correspond to the input interrupt tasks 1 108 to 115 2 116 to 123 3 124 to 131 Operand Contents N Specify the interrupt input number 6 Interrupt input 0 7 Interrupt input 1 8 Interrupt input 2 9 Interrupt input 3 D Interrupt mask 0000 ...

Page 774: ... Scheduled interrupt 1 interrupt task 3 D 0000 Scheduled interrupt disabled 0001 to 270F hex Scheduled interrupt interval 1 to 9999 Note The unit for the scheduled interrupt interval can be set to either 10 ms or 1 0 ms in the PLC Setup interrupt settings For the CJ1M 0 1 ms can also be set in which case the time will be 0005 to 270F hex 5 to 9999 Operand Contents N Specify the scheduled interrupt...

Page 775: ...ndicates that the interrupt has been dis abled The units for the scheduled interrupt interval can be set in the PLC Setup 00 10 ms 01 1 0 ms so the range for the time interval is 10 ms to 99 99 s or 1 ms to 9 999 s N 14 or 15 When N is 14 or 15 the PV of the scheduled interrupt timer for the scheduled interrupt task specified by N is stored in D Flags Precautions MSKR 692 can be executed in the ma...

Page 776: ...ns ON in the following example MSKR 692 reads the setting for scheduled interrupt 2 In this case the time interval is set to 1 000 3E8 hexadecimal which is equivalent to 10 s if the scheduled time interval units are set to 10 ms in the PLC Setup 3 20 3 CLEAR INTERRUPT CLI 691 Purpose Clears or retains recorded interrupt inputs for I O interrupts or sets the time to the first scheduled interrupt fo...

Page 777: ...691 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Operand Contents N Specify the Interrupt Input Unit s unit number 0 Unit number 0 1 Unit number 1 S Interrupt mask clear specification 16 bits Unit 0000 to FFFF hex Meaning of Each Bit 0 Recorded interrupt input...

Page 778: ...ecorded interrupt input retained 0001 hex Recorded interrupt input cleared Interrupt input number Interrupt task numbers Interrupt input 0 140 CIO 296000 Interrupt input 1 141 CIO 296001 Interrupt input 2 142 CIO 296002 Interrupt input 3 143 CIO 296003 Operand Contents N Specify the high speed counter input 10 High speed counter input 0 11 High speed counter input 1 S Interrupt mask clear specific...

Page 779: ... recorded I O interrupts are executed later in order of their priority from the lowest number to the highest CLI 691 can be used to clear these recorded interrupts before they are executed Note 1 MSKS 690 can be used to enable a particular I O interrupt task in a par ticular cycle and disable the task in other cycles Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C...

Page 780: ...l its interrupt task has been completed so a new interrupt input will be ignored if it is received while its interrupt task is being executed Only interrupt inputs from regular CS CJ series Interrupt Input Units and C200H Interrupt Input Units are supported for interrupt tasks Interrupt inputs from Inner Boards and Special I O Units are not supported Interrupts have different priority levels A pow...

Page 781: ...isabled it is possible to disable power OFF interrupt processing simultaneously Ladder Symbol Variations Applicable Program Areas Description DI 693 is executed from the main program to temporarily disable all interrupt tasks except the power OFF interrupt I O interrupts scheduled interrupts and external interrupts All interrupt tasks will be disabled until they are enabled again by execution of E...

Page 782: ...an one cycle execution task insert DI 693 in each cyclic task Any inter rupts that occur while one cycle execution task is being executed will be exe cuted after the cycle execution task has been completed unless they are disabled by CLI 691 as shown in the following example When using DI 693 to disable Power OFF Interrupt Processing in a CS1 H CJ1 H and CJ1M CPU Unit it is possible to disable the...

Page 783: ...abled EI 694 simultaneously releases the disabled power OFF interrupt processing Ladder Symbol Variations Applicable Program Areas DI END EI END The mask on power OFF interrupt processing is enabled Task No 0 Task No 1 Disables execution of all interrupt tasks except the power OFF interrupt 000000 With CS1 H CJ1 H and CJ1M CPU Units Power OFF interrupt processing can be disabled at the same time i...

Page 784: ...le power OFF interrupt process ing Flags Related Flags and Words The following word is in the Auxiliary Area Precautions EI 694 doesn t require an execution condition It is always executed with an ON execution condition EI 694 enables the interrupt tasks that were disabled by DI 693 It cannot unmask I O interrupts that haven t been unmasked by MSKS 690 or set scheduled interrupts that haven t been...

Page 785: ...f the interrupt Numbers 0 to 3 indicate Interrupt Input Units 0 to 3 and numbers 4 and 5 indicate scheduled interrupts 2 and 3 I O Interrupt Processing N 0 to 3 An I O interrupt is caused by an input signal from an Interrupt Input Unit Up to four Interrupt Input Units can be connected to the PLC Unit numbers 0 to 3 are assigned to the Units based on their position in the PLC from left to right The...

Page 786: ...der of their priority after the current interrupt task is completed If a scheduled interrupt occurs the scheduled interrupt task will take priority over the I O interrupt tasks Operation of CLI 691 If an interrupt input is received while a different I O interrupt task is being exe cuted the input s interrupt number is recorded internally until the current task and any higher priority tasks have be...

Page 787: ...e I O interrupt inputs are recorded they are executed in order of their priority The order in which the recorded inputs were received is irrelevant Scheduled Interrupt Processing N 4 or 5 A scheduled interrupt is repeated at regular intervals set with MSKS 690 and independent of the timing of the PLC cycle N numbers 4 and 5 correspond to scheduled interrupt numbers 2 and 3 respectively Scheduled I...

Page 788: ...is abled 4 Disabling a Scheduled Interrupt A scheduled interrupt task can be disabled by setting the scheduled time interval to 0000 with MSKS 690 When enabling the scheduled interrupt task again be sure to set the time to the first scheduled interrupt with CLI 691 before setting the scheduled time interval again with MSKS 690 Scheduled Interrupt Operation In the following example the scheduled ti...

Page 789: ...t is executed after the specified time interval plus the execution time for one instruction Normally the time required to execute one instruction is negligible but it can cause errors when instructions that take a long time are being used it can also cause errors in timers TIM and TIMH and data tracing Be particularly careful when the scheduled time interval units are set to 0 5 ms or 1 ms in the ...

Page 790: ...Ladder Symbol Variations Applicable Program Areas Operands P Port Specifier P specifies the port to which the operation applies Instruction Mnemonic Function code Page MODE CONTROL INI 880 769 HIGH SPEED COUNTER PV READ PRV 881 773 REGISTER COMPARISON TABLE CTBL 882 777 SPEED OUTPUT SPED 885 781 SET PULSES PULS 886 786 PULSE OUTPUT PLS2 887 789 ACCELERATION CONTROL ACC 888 795 ORIGIN SEARCH ORG 88...

Page 791: ...01 hex PWM 891 output 1 C INI 880 function 0000 hex Starts comparison 0001 hex Stops comparison 0002 hex Changes the PV 0003 hex Stops pulse output P Port S S 1 Lower word of new PV Upper word of new PV 0 15 For Pulse Output or High speed Counter Input 0000 0000 to FFFF FFFF hex For Interrupt Input in Counter Mode 0000 0000 to 0000 FFFF hex Area P C NV CIO Area CIO 0000 to CIO 6142 Work Area W000 ...

Page 792: ...ON Stopping Comparison C 0001 hex If C is 0001 hex INI 880 stops comparison of a high speed counter s PV to the comparison table registered with CTBL 882 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area P C NV P Port specifier C Control data 0000 hex Start comparison 0001 hex Stop compar...

Page 793: ... instruction if the specified port is not set for a high speed counter 8000 0000 to 7FFF FFFF hex 2 147 483 648 to 2 147 483 647 Increment pulse input 0000 0000 to FFFF FFFF hex 0 to 4 294 967 295 Ring Mode 0000 0000 to FFFF FFFF hex 0 to 4 294 967 295 Interrupt inputs in counter mode P 0100 0101 0102 or 0103 hex The present value of the interrupt input is changed The new value is specified in NV ...

Page 794: ...y Ladder Symbol Variations SPED 0000 0000 D00100 01F4 0000 000000 INI 0000 0003 0000 000001 Pulse output 0 CW CCW method CW Continuous Mode D00100 D00101 Target frequency 500 Hz Pulse output 0 Stop pulse output Not used Status type Contents Pulse output status Pulse Output Status Flag PV Underflow Overflow Flag Pulse Output Amount Set Flag Pulse Output Completed Flag Pulse Output Flag No origin Fl...

Page 795: ... hex Interrupt input 2 in counter mode 0103 hex Interrupt input 3 in counter mode 1000 hex PWM 891 output 0 1001 hex PWM 891 output 1 C PRV 881 function 0000 hex Reads the PV 0001 hex Reads status 0002 hex Reads range comparison results 0003 hex Reads the high speed counter frequency for high speed counter input 0 D D 1 Lower word of PV Upper word of PV 0 15 2 word PV Pulse output PV high speed co...

Page 796: ...ange comparison results 0003 hex Read high speed counter frequency 0000 or 0001 hex Pulse output OK OK Not allowed Not allowed 0010 or 0011 hex High speed counter input OK OK OK OK high speed counter 0 only 0100 0101 0102 or 0103 hex Interrupt input in counter mode OK Not allowed Not allowed Not allowed 1000 or 1001 hex PWM 891 output Not allowed OK Not allowed Not allowed Port and mode Operation ...

Page 797: ... Flag OFF No error ON Pulse output stopped due to error Pulse Output Status Flag OFF Constant speed ON Accelerating decelerating PV Overflow Underflow Flag OFF Normal ON Error Pulse Output Amount Set Flag OFF Not set ON Set Pulse Output Completed Flag OFF Output not completed ON Output completed Pulse Output In progress Flag OFF Stopped ON Outputting No origin Flag OFF Origin established ON Origin...

Page 798: ...isons are possible An interrupt task is executed when a specified condition is met This instruction is supported by the CJ1M CPU22 CPU23 CPU Units only Ladder Symbol Name Label Operation Error Flag ER ON if the specified range for P or C is exceeded ON if the combination of P and C is not allowed ON if reading range comparison results is specified even though range comparison is not being executed...

Page 799: ...BL 882 Executed Once for Upward Differentiation CTBL 882 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK P Port 0000 hex High speed counter 0 0001 hex High speed counter 1 C CTBL 882 function 0000 hex Registers a target value comparison table and starts compariso...

Page 800: ...000 0000 to FFFF FFFF hex See note 0000 0000 to FFFF FFFF hex See note 0000 0000 to FFFF FFFF hex See note Interrupt task number 0000 to 00FF hex Interrupt task number 0 to 255 AAAA hex Do not execute interrupt task FFFF hex Ignore the settings for this range 0 15 TB 35 TB 36 TB 37 TB 38 TB 39 Lower word of range 8 lower limit Upper word of range 8 lower limit Lower word of range 8 upper limit Upp...

Page 801: ...the PV is being decremented The comparison table can contain up to 48 target values and the number of target values is specified in TB i e the length of the table depends on the number of target values that is specified Comparisons are performed for all target values registered in the table Note 1 An error will occur if the same target value with the same comparison di rection is registered more t...

Page 802: ...nuous mode speed control is possible For indepen dent mode positioning the number of pulses is set using PULS 886 SPED 885 can also be executed during pulse output to change the output frequency creating stepwise changes in the speed This instruction is supported by the CJ1M CPU22 CPU23 CPU Units only Name Label Operation Error Flag ER ON if the specified range for P or C is exceeded ON if the sam...

Page 803: ...nce for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex Pulse output 1 Mode 0 hex Continuous 1 hex Independent Direction 0 hex CW 1 hex CCW Pulse output method See note 0 hex CW CCW 1 hex Pulse direction Always 0 hex Note Use the same pulse ...

Page 804: ...e until stopped from the program An error will occur if the mode is changed between independent and continu ous mode while pulses are being output Continuous Mode Speed Control When continuous mode operation is started pulse output will be continued until it is stopped from the program DM Area D00000 to D32766 EM Area without bank EM Area with bank Indirect DM EM addresses in binary D00000 to D327...

Page 805: ...uction Starting pulse output To output with spec ified speed Changing the speed fre quency in one step Outputs pulses at a specified frequency SPED 885 Con tinuous Changing settings To change speed in one step Changing the speed during operation Changes the fre quency higher or lower of the pulse output in one step SPED 885 Con tinuous SPED 885 Con tinuous Stopping pulse output Stop pulse out put ...

Page 806: ...dent Stopping pulse output To stop pulse out put Num ber of pulses setting is not pre served Immediate stop Stops the pulse out put immediately and clears the number of output pulses set ting PULS 886 SPED 885 Independent INI 880 PLS2 887 INI 880 Stop pulse out put Num ber of pulses setting is not pre served Immediate stop Stops the pulse out put immediately and clears the number of output pulses ...

Page 807: ...exceeded ON if PLS2 887 or ORG 889 is already being executed to control pulse output for the specified port ON if SPED 885 or INI 880 is used to change the mode between continuous and independent output during pulse output ON if SPED 885 is executed in an interrupt task when an instruction controlling pulse output is being executed in a cyclic task ON if SPEC 885 is executed in independent mode wi...

Page 808: ...t pulses the set number of pulses the PV Operand Specifications Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex Pulse output 1 T Pulse type 0000 hex Relative 0001 hex Absolute N N 1 Lower word with number of pulses Upper word with number of pulses Relative pulse output 0 to 2 147 483 647 0000 0000 to 7FFF FFFF hex Absolute puls...

Page 809: ...the range of the PV of the pulse output amount 2 147 483 648 to 2 147 483 647 Example When CIO 000000 turns ON in the following programming example PULS 886 sets the number of output pulses for pulse output 0 An absolute value of 5 000 pulses is set SPED 885 is executed next to start pulse output using the CW CCW method in the clockwise direction in independent mode at a target frequency of 500 Hz...

Page 810: ...hanges This instruction is supported by the CJ1M CPU22 CPU23 CPU Units only Ladder Symbol Variations Applicable Program Areas Operands P Port Specifier The port specifier indicates the port M Output Mode The content of M specifies the parameters for the pulse output as follows PLS2 887 P M S F P Port specifier M Output mode S First word of settings table F First word of starting frequency Variatio...

Page 811: ... 1 to 100 000 Hz 0000 0000 to 0001 86A0 hex Specify the frequency after acceleration in Hz S1 S1 1 Acceleration rate Deceleration rate 1 to 2 000 Hz 0001 to 07D0 hex 1 to 2 000 Hz 0001 to 07D0 hex Specify the increase or decrease in the frequency per pulse control period 4 ms 0 15 F F 1 Lower word with starting frequency Upper word with starting frequency 0 to 100 000 Hz 0000 0000 to 0001 86A0 hex...

Page 812: ... PLS2 887 is executed It is thus normally sufficient to use the differentiated version PLS2 887 of the instruction or an execution condition that is turned ON only for one scan PLS2 887 can be used only for positioning With the CJ1M CPU Units PLS2 887 can be executed during pulse output for ACC 888 in either independent or continuous mode and during accelera tion constant speed or deceleration See...

Page 813: ...ates PLS2 887 PLS2 887 PULS 886 ACC 888 Indepen dent PLS2 887 To change target position Changing the tar get position dur ing positioning multiple start function PLS2 887 can be exe cuted during position ing to change the target position num ber of pulses acceler ation rate deceleration rate and target fre quency Note If a constant speed cannot be maintained after changing the set tings an error w...

Page 814: ...pulses setting is not pre served Immediate stop Stops the pulse output immediately and clears the number of output pulses PLS2 887 INI 880 Stop pulse out put smoothly Number of pulses setting is not pre served Decelerate to a stop Decelerates the pulse output to a stop PLS2 887 ACC 888 Indepen dent target frequency of 0 Hz Opera tion Purpose Application Frequency changes Description Procedure inst...

Page 815: ...cy changes Description Procedure instruction Change from speed control to fixed distance positioning during oper ation PLS2 887 can be exe cuted during a speed control operation started with ACC 888 to change to positioning operation ACC 888 Continu ous PLS2 887 Fixed distance feed interrupt Pulse frequency Target frequency Outputs the number of pulses specified in PLS2 887 Both relative and absol...

Page 816: ...in combination with PULS 886 ACC 888 can also be executed during pulse output to change the target frequency or acceleration deceleration rate enabling smooth sloped speed changes This instruction is supported by the CJ1M CPU22 CPU23 CPU Units only Ladder Symbol Name Label Operation Error Flag ER ON if the specified range for P M S or F is exceeded ON if PLS2 887 is executed for a port that is alr...

Page 817: ...rrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex Pulse output 1 Mode 0 hex Continuous mode 1 hex Independent mode Direction 0 hex CW 1 hex CCW Pulse output method See note 0 hex CW CCW 1 hex Pulse direction Always 0 hex Note Use the same pulse output method when using both pulse outputs 0 and 1 0 3 4 7 8 11 12 15 M S 1 S 2 Lower word with target frequency Upper word with target freq...

Page 818: ...to switch between independent and continuous mode during pulse output With the CJ1M CPU Units PLS2 887 can be executed during pulse output for ACC 888 in either independent or continuous mode and during accelera tion constant speed or deceleration See note ACC 888 can also be exe cuted during pulse output for PLS2 887 during acceleration constant speed or deceleration Note Executing PLS2 887 durin...

Page 819: ...he speed smoothly during operation Changes the fre quency from the present frequency at a fixed rate The frequency can be accelerated or decelerated ACC 888 or SPED 885 Continu ous ACC 888 Continu ous Changing the speed in a polyline curve during operation Changes the accel eration or decelera tion rate during acceleration or deceleration ACC 888 Continu ous ACC 888 Continu ous Pulse frequency Tar...

Page 820: ...opping pulse output To stop pulse out put Immediate stop Immediately stops pulse output ACC 888 Continu ous INI 880 Continu ous To stop pulse out put Immediate stop Immediately stops pulse output ACC 888 Continu ous SPED 885 Continu ous target frequency of 0 To stop pulse out put smoothly Decelerating to a stop Decelerated pulse output to a stop Note If ACC 888 started the operation the original a...

Page 821: ...To stop pulse out put Num ber of pulses set ting is not preserved Immediate stop Pulse output is stopped immedi ately and the remaining number of output pulses is cleared PULS 886 ACC 888 Indepen dent INI 880 To stop pulseoutput smoothly Number of pulses set ting is not preserved Decelerating to a stop Decelerates the pulse output to a stop Note If ACC 888 started the operation the original accele...

Page 822: ...ses Specified with PLS2 887 Execution of PLS2 887 Time Name Label Operation Error Flag ER ON if the specified range for P M or S is exceeded ON if pulses are being output using ORG 889 for the specified port ON if ACC 888 is executed to switch between indepen dent and continuous mode for a port that is outputting pulses for SPED 885 ACC 888 or PLS2 887 ON if ACC 888 is executed in an interrupt tas...

Page 823: ...port where the pulses will be output C Control Data The value of C determines the origin search method Operand Specifications ORG 889 P C P Port specifier C Control data Variations Executed Each Cycle for ON Condition ORG 889 Executed Once for Upward Differentiation ORG 889 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas...

Page 824: ...ty Speed using the Origin Search Decelera tion Rate 4 in diagram Pulses are then output at constant speed until the Origin Input Signal turns ON 5 in diagram Pulse output is stopped when the Origin Input Signal turns ON 6 in diagram When the origin search operation has been completed the Error Counter Reset Output will be turned ON The above operation however depends on Timer Area Counter Area DM ...

Page 825: ... speed Origin search proximity speed ORG 889 executed Origin Proximity Input Signal Stop Origin Input Signal Time A B C D E F Origin search acceleration rate Origin search deceleration rate Pulse frequency ORG 889 executed Origin return target speed Origin return deceleration rate Stop Time Origin return initial speed A B C D E Origin return acceleration rate Name Label Operation Error Flag ER ON ...

Page 826: ... P Port Specifier The port specifier specifies the port where the pulses will be output ORG 0000 1000 000000 Pulse output 0 Origin return CW CWW method Time 200 pps 100 pps Speed ORG 889 executed Output stopped Parameter Setting Pulse Output 0 Starting Speed for Origin Search and Origin Return 0000 0064 hex 100 pps Pulse Output 0 Origin Return Target Speed 0000 00C8 hex 200 pps Pulse Output 0 Orig...

Page 827: ...hus normally sufficient to use the differentiated version PWM 891 of the instruction or an execution condition that is turned ON only for one scan The pulse output will continue either until INI 880 is executed to stop it C 0003 hex stop pulse output or until the CPU Unit is switched to PROGRAM mode Area P F D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W511 H...

Page 828: ... range for P F or D is exceeded ON if pulses are being output using ORG 889 for the specified port ON if PWM 891 is executed in an interrupt task when an instruction controlling pulse output is being executed in a cyclic task PWM 0000 07D0 0032 000000 PWM 0000 07D0 0019 000001 Pulse output 0 Frequency 200 0 Hz Duty factor 50 Pulse output 0 Frequency 200 0 Hz Duty factor 25 CIO 000000 ON Duty facto...

Page 829: ...e start of each process and specified the control bit for it It is also placed at the end of the step programming area after the last SNXT 009 to indicate the end of the step programming area When it appears at the end of the step programming area STEP 008 does not take a control bit Ladder Symbols Process A Process B Process C End Corresponds Starts the step programming area a turns ON Proceeds t...

Page 830: ...ON Condition STEP 008 SNXT 009 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK Not allowed Not allowed Area B CIO Area Work Area W00000 to W51115 Holding Bit Area Auxiliary Bit Area Timer Area Counter Area...

Page 831: ...008 functionS in following 2 ways depending on its position and whether or not a control bit has been specified 1 2 3 1 Starts a specific step 2 Ends the step programming area i e step execution Starting a Step STEP 008 is placed at the beginning of each step with an operand B that serves as the control bit for the step The control bit B will be turned ON by SNXT 009 and the instruction in the ste...

Page 832: ... programming must be sequential and from the same word SNXT 009 will be executed only once i e on the rising edge of the execution condition Input SNXT 009 at the end of the step programming area and make sure that the control bit is a dummy bit in the Work Area If a control bit for a step is used in the last SNXT 009 in the step programming area the corresponding step will be started when SNXT 00...

Page 833: ...d Within Step Programs The instructions that cannot be used within step programs are listed in the fol lowing table Related Bits Function Mnemonic Name Sequence Control Instruc tions END 001 END IL 002 INTERLOCK ILC 003 INTERLOCK CLEAR JMP 004 JUMP JME 005 JUMP END CJP 510 CONDITIONAL JUMP CJPN 511 CONDITIONAL JUMP NOT JMP0 515 MULTIPLE JUMP JME0 516 MULTIPLE JUMP END Subroutine Instructions SBN 0...

Page 834: ...ns Section 3 22 Step a starts when C turns ON A executed When d turns ON b starts A is interlocked B executed e turns ON B is interlocked End of step programming area Returns to normal ladder program Normal ladder program ...

Page 835: ...W00000 turns OFF W00001 turns ON and step W00001 starts Step W00001 starts from the next instruction Step W00000 starts from the next instruction W00001 turns OFF and dummy bit W10000 turns ON Step W00000 000001 Step A starting condition Step A W00000 Step B W00001 Step C W00002 End 000002 Step A Step B transition condition 000003 Step B Step C transition condition 000004 Step C reset conditions ...

Page 836: ... B ladder program Step C ladder program Step W00001 B Step W00002 C 000001 Step A starting condition Step A W00000 Step B W00001 Step C W00002 End 000003 Step A Step C transition condition 000004 Step B Step C transition condition 000005 Step C reset conditions 000002 Step B starting condition ...

Page 837: ...ted for W00002 the branch ing moves onto the next steps even though the same control bit is used twice This is not picked up as an error in the program check using the CX Program mer A duplicate bit error will only occur in a step ladder program only when a control bit in a step instructions is also used in the normal ladder diagram Step A ladder program Step W00000 A Step B ladder program Step C ...

Page 838: ...eous starting condition Step A W00000 Step B W00001 Step C W00002 End 000002 Step A Step B transi tion condition 000003 Step C Step D transition condition 000005 Step C reset conditions Step D W00002 Step E W00004 000004 When both Step B and Step D are complete moves to Step E ...

Page 839: ...ep Instructions Section 3 22 Step A ladder program Step W00000 A Step B ladder program Step C ladder program Step W00001 B Step W00002 C Step D ladder program Step E ladder program Step W00003 D Step W00004 E ...

Page 840: ...sors SW1 SW2 SW3 and SW4 are positioned to signal when processes are to start and end The following diagram demonstrates the flow of processing and the switches that are used for execution control The program for this process shown below utilizes the most basic type of step programming each step is completed by a unique SNXT 009 that starts the next step Each step starts when the switch that indic...

Page 841: ...gramming for process B Programming for process C Process A started Process A reset Process B started Process B reset Process C started Process C reset Process A Process B Process C 000000 LD 000001 000001 SNXT 009 W00000 000002 STEP 008 W00000 000100 LD 000002 000101 SNXT 009 W00001 000102 STEP 008 W00001 000100 LD 000003 000101 SNXT 009 W00002 000102 STEP 008 W00002 000200 LD 000004 000201 SNXT 0...

Page 842: ...ng diagram demonstrates the flow of processing and the switches that are used for execution control Here either process A or process B is used depending on the status of SW A1 and SW B1 Process A Process C End SW A1 SW B1 SW A2 SW B2 SW D Process B ...

Page 843: ... Process B reset Process C started Process C reset Programming for process A Programming for process B Programming for process C Process A Process B Process C 000201 SNXT 009 024614 000000 LD 000001 000001 AND NOT 000002 000002 SNXT 009 010000 000003 LD NOT 000001 000004 AND 000002 000005 SNXT 009 010001 000006 STEP 008 010000 000100 LD 000003 000101 SNXT 009 010002 000102 STEP 008 010001 000100 L...

Page 844: ...instruction line and are always executed together starting steps for both A and C When the steps for both A and C have finished the steps for process B and D begin immediately When both process B and process D have finished i e when SW5 and SW6 turn ON processes B and D are reset together by the SNXT 009 at the end of the programming for process B Although there is no SNXT 009 at the end of proces...

Page 845: ...rted Process E reset Process A Process B Process C Process D Process E 000000 LD 000001 000001 SNXT 009 W00000 000002 SNXT 009 W00002 000003 STEP 008 W00000 000100 LD 000002 000101 SNXT 009 W00001 000102 STEP 008 W00001 000100 LD 000003 000101 OUT W00003 000101 AND 000004 000101 SNXT 009 W00004 000102 STEP 008 W00002 000200 LD 000003 000201 SNXT 009 W00003 000202 STEP 008 W00003 000300 STEP 008 W0...

Page 846: ...nemonic Function code Page I O REFRESH IORF 097 825 7 SEGMENT DECODER SDEC 078 828 INTELLIGENT I O READ IORD 222 831 INTELLIGENT I O WRITE IOWR 223 834 St Starting word E End word IORF 097 St E Variations Executed Each Cycle for ON Condition IORF 097 Executed Once for Upward Differentiation IORF 097 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not sup...

Page 847: ...ords will be refreshed if the first word allocated to the Unit is in the specified range of I O words The Unit s words won t be refreshed if the starting word is after the first word allocated to the Unit but they will be refreshed even if the end word is before the last word allocated to the Unit CS Series only IORF 097 can be used in interrupt tasks allowing high speed response for the specific ...

Page 848: ... 097 a non fatal Duplicate Refreshing Error will occur and the Interrupt Task Error Flag A40213 will be turned ON Examples Refreshing Words in the I O Bit Area The following example shows how to refresh 16 words from CIO 0015 to CIO 0030 when CIO 000000 turns ON Refreshing Words in the Special I O Unit Bit Area The following example shows how to refresh 30 words from CIO 2000 to CIO 2029 when CIO ...

Page 849: ...Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK First digit of S to convert 0 to 3 0 Digit 0 bits 0 to 3 of S 1 Digit 1 bits 4 to 7 of S 2 Digit 2 bits 8 to 11 of S 3 Digit 3 bits 12 to 15 of S Number of digits to convert 0 to 3 1 to 4 digits First half of D to receive converted data 0 Rightmost 8 bits 1s...

Page 850: ...ontents of the 3 digits beginning with digit 1 in D00100 will be converted from hexadecimal data to 7 segment data and the results will be output to the upper byte of D00200 and both bytes of D00201 The specifications of the bytes to be con verted and the location of the output bytes are made in CIO 0100 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 ...

Page 851: ...d c b a Hex 0 0 0 0 0 0 0 1 1 1 1 1 1 3F 1 0 0 0 1 0 0 0 0 0 1 1 0 06 2 0 0 1 0 0 1 0 1 1 0 1 1 5B 3 0 0 1 1 0 1 0 0 1 1 1 1 4F 4 0 1 0 0 0 1 1 0 0 1 1 0 66 5 0 1 0 1 0 1 1 0 1 1 0 1 6D 6 0 1 1 0 0 1 1 1 1 1 0 1 7D 7 0 1 1 1 0 0 1 0 0 1 1 1 27 8 1 0 0 0 0 1 1 1 1 1 1 1 7F 9 1 0 0 1 0 1 1 0 1 1 1 1 6F A 1 0 1 0 0 1 1 1 0 1 1 1 77 B 1 0 1 1 0 1 1 1 1 1 0 0 7C C 1 1 0 0 0 0 1 1 1 0 0 1 39 D 1 1 0 1 0...

Page 852: ...Step program areas Subroutines Interrupt tasks OK OK OK OK S 1 S S 1 Leftmost 4 digits S Rightmost 4 digits Area C S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A958 A448 to A959 Timer Area T0000 to T4095 T0000 to T4094 T0000...

Page 853: ...hex The unit number S is outside the range of 0000 to 005F Constants 0000 to FFFF binary Specified values only Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area C S D Desig nated number of words read S S 1 Unit number of Special I O Unit Name Label Operation Err...

Page 854: ...e Special I O Unit is busy the reading operation will not be executed Use the Equals Flag to create a self maintaining program as shown below so that IORD 222 will be executed with each cycle until the reading operation is exe cuted When the input condition is met self maintenance is performed by output A and IORD 222 is executed with each cycle until the Equals Flag turns ON When the reading is c...

Page 855: ... 10 When CIO 000000 is turned ON 10 words are read from the Special I O Unit with unit number 3 and are stored in D00100 to D00109 CPU Unit Special I O Unit Unit 3 10 words The control code C varies depending on the Special I O Unit S C Control data S Transfer source and number of words D Transfer destination and number of words IOWR 223 C S D Variations Executed Each Cycle for ON Condition IOWR 2...

Page 856: ...00 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 ...

Page 857: ...s designated When IOWR 223 is executed the execution results are reflected in the condi tion flags In particular the Equals Flag turns ON when reading is completed Input the condition flags such as the Equals Flag with output branching from the same input conditions as the IOWR 223 instruction If the Special I O Unit is busy the writing operation will not be executed Use the Equals Flag to create ...

Page 858: ...mple IOWR 223 is used to write data 3 23 5 CPU BUS UNIT I O REFRESH DLNK 226 Purpose Performs I O refreshing immediately for the CPU Bus Unit with the specified unit number The following data is refreshed The words allocated to the CPU Bus Unit in the PLC s CPU Bus Unit Areas 25 words in the CIO Area and 100 words in the DM Area Specific data refreshing for Units such as Units that support data li...

Page 859: ...tion DLNK 226 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 ...

Page 860: ...perform I O refreshing with a CPU Bus Unit if that Unit is currently exchanging data If DLNK 226 is executed too frequently I O refreshing will not be performed We recommend allowing a delay between executions of DLNK 226 that is longer than the communications cycle time CPU Bus Unit Data refreshing specific to the Unit Controller Link Unit or SYSMAC Link Unit Data link refreshing DeviceNet Unit D...

Page 861: ...his case a Controller Link Unit If I O refreshing cannot be performed because the Controller Link Unit is refreshing data the Equals Flag will be turned OFF causing W001 to be turned ON so that the instruction execution will be retried in the next cycle When the I O refreshing is completed normally the Equals Flag will be turned ON and the instruction will not be retried in the next cycle Name Lab...

Page 862: ...is input was received from the network the last time that the token right was acquired The data received is delayed up to 1 communications cycle time max Examples of Data Transfer Processing Transferring Data from the Previous I O Refreshing 000000 DLNK 1 W001 W001 W000 W000 Equals Flag Equals Flag DLNK 1 000000 Controller Link Refresh Data link area Controller Link Unit with unit number 1 Data li...

Page 863: ...0 sends and receives data using user defined protocols with an external device The difference is shown in the fol lowing tables Note The PMCR 260 protocol macro function includes the no protocol communi cations function of TXD 236 and RXD 235 TXD 236 and RXD 235 are used only for the serial port in the CPU Unit PMCR 260 is used only for the Cycle time Refreshing data link data within PLC Data tran...

Page 864: ...ns ports TXD 236 and RXD 235 No protocol custom PMCR 260 Protocol macro Any of the following can be used No Start or End Code Data Start and End Code Data Only Start Code Data CR LF End Code Data Only End Code Start and CR LF End Code Data Data The following type of frames messages can be created to meet the requirements of the external device Header Address Data Error check Terminator Communicati...

Page 865: ...to be sent 1 i e including the S word and send data starts in S 1 Between 0000 and 00FA hex 0 and 250 decimal words can be sent C1 Control word 1 C2 Control word 2 S First send word R First receive word PMCR 260 C1 C2 S R Variations Executed Each Cycle for ON Condition PMCR 260 Executed Once for Upward Differentiation PMCR 260 Executed Once for Downward Differentiation Not supported Immediate Refr...

Page 866: ...rd address for R even if there is no receive data If a constant is set an error will occur the Error Flag will turn ON and PMCR 260 will not be executed If there is no receive data R will not be used and can be used for other purposes If there is no receive data be sure to set the constant to 0000 to FFFF Operand Specifications Number of send words 1 to n words of data must be prepared in advance ...

Page 867: ...ns The data in the send area specified with S is actually sent using the symbol read option R in a send message Data is actually received to the receive area specified by R using the symbol write option W in a receive message Constants Specified values only 0000 to 03E7Hex 0 to 999 0000 binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to ...

Page 868: ...uld be used as part of the execution condition whenever executing PMCR 260 to be sure that only one communications sequence is being executed at the same time for the same physical port An example is shown below SEND 090 RECV 098 and CMND 490 also use the logical ports 0 to 7 to execution communications sequences through Serial Communications Unit and Boards internally using FINS commands PMCR 260...

Page 869: ...A certain value backup data is set in advance so that the present value will not be read as zero when transmis sion failure occurs while protocol is being executed for reading the present value of a controller Related Flags and Words The following flags and words can be used as required when executing PMCR 260 Auxiliary Area CPU Unit PMCR 260 PMCR 260 Name Address Contents Communications Port Enab...

Page 870: ...ution has been completed The contents of these words is cleared when operation is started Code Contents 1106 hex No corresponding program number Specified Send Receive Sequence No that has not been registered Modify the Send Receive Sequence No or add the number using the CX Programmer 2201 hex Not operable due to protocol execution Since one protocol macro has already been executed no further exe...

Page 871: ... specified for the symbol in a receive message 2 words of data will be stored starting from D00201 and the number of words received 1 will be written to D00200 Name Address Contents Port 1 Protocol Macro Exe cution Flag CIO 190915 ON when PMCR 260 is executed The flag will remain OFF if execution fails The flag will turn OFF when the com munications sequence has been com pleted either an end or ab...

Page 872: ...uted This pre vents the receive area from being temporarily cleared to all zeros by writing the most recent receive data when new receive data is not successfully obtained Specify the number of words of the receive area to be maintained as the value m If 0 or 1 is specified the holding function will be disabled and the receive area will be cleared to all zeros 0 1 0 0 0 2 0 0 Communications sequen...

Page 873: ... Communica tions Port En abled Flag Set Data that was set will be transfer if new data is not successfully received m words Receive buffer Error Recv Error Recv Cleared data all zeros stored Set data stored if no new data has been received Cleared Cleared and previous data stored Receive Area Not Held Communications sequence Receive buffer Receive area starting at R 1 Receive Area Held Communicati...

Page 874: ...orted Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Byte order 0 Most significant bytes first 1 Least significant bytes first RS and ER signal control 0 No RS and ER signal control 1 RS signal control 2 ER signal control 3 RS and ER signal control Not used 15 8 0 11 3 7 4 12 C Area S C N CIO Area CIO 0000 to CIO 6143...

Page 875: ...767 En_00000 to En_32767 n 0 to C Constants Specified values only 0000 to 0100 binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S C N 1 3 5 2 4 6 N bytes of data is sent in the following order when sending the most significant bytes first is specified 1 ...

Page 876: ...C bit 15 of S will be used as the ER signal If RS and ER signal control is specified in C bit 15 of S will be used as the RS signal and bit 14 of S will be used as the ER signal If 1 2 or 3 hex is specified for RS and ER signal control in C TXD 236 will be executed regardless of the status of the Send Ready Flag A39205 An error will occur and the Error Flag will turn ON in the following cases The ...

Page 877: ...ni cations 0 None default 1 Yes set 00 to FF hex No protocol Mode End Code Specifies if an code is to be used in the frame format for no protocol mode communications 0 None default 1 Yes set 00 to FF hex or CR LF No protocol Mode Send Delay The specified data will be sent from the port only after the specified delayed time has elapsed from the time TXD 236 was executed in the ladder program 0 to 9...

Page 878: ... C D00200 S Byte order 1 Least significant bytes first RS and ER signal control 0 No RS and ER signal Not used Most signifi cant bytes Least signif icant bytes Sent in speci fied order 5 bytes Start and end codes added according to set ting in PC Setup this example assumes that both a start and end code have been set ST Start code e g 02 hex ED End code e g 03 hex Sent ST 12 34 AB CD EF ED 10 0 ...

Page 879: ...reas C D00400 S D00300 Byte order 0 Disabled RS and ER signal control 3 RS and ER signal control Not used 3 1 3 4 20 0 1 0 0 0 ER signal set to 0 RS signal set to 1 15 14 13 12 D First destination word C Control word N Number of bytes to store 0000 to 0100 hex 0 to 256 decimal RXD 235 D C N Variations Executed Each Cycle for ON Condition RXD 235 Executed Once for Upward Differentiation RXD 235 Exe...

Page 880: ... bytes first 1 Least significant bytes first CS and DR signal monitoring 0 No CS and DR signal monitoring 1 CS signal monitoring 2 DR signal monitoring 3 CS and DR signal monitoring Not used 15 8 0 11 3 7 4 12 C Area D C N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A447 A448 to A959 Timer Area T0000 to T4095 Counter Ar...

Page 881: ...he PC Setup Receive bytes before ED 256 max Receive bytes between ST and ED 256 max Receive bytes before CR LF 256 max Receive bytes between ST and CR LF 256 max Received CPU Unit s CS 232C port Bytes Max 256 bytes N bytes stored in the specified or der When receiving the most signifi cant bytes first is specified 0 When receiving the least signifi cant bytes first is specified 0 Most signifi cant...

Page 882: ... A39207 is ON and the Reception Counter A393 will be cleared to 0 Data will be stored in memory in the order specified in C If start and end codes are specified in the PLC Setup the number of bytes specified for N will be ignored and the data received when RXD 235 is exe cuted from the start code to the end code will be stored starting at D If 0 is specified for N the Reception Completed Flag A392...

Page 883: ... Address Contents RS 232C Port Reception Completed Flag A39206 ON when no protocol reception is com pleted Number of Receive Bytes Specified The flag will turn ON when the specified number of bytes has been received End Code Specified The flag will turn ON when the end code is received or when 256 bytes have been received RS 232C Port Reception Overflow Flag A39207 ON when more that the expected n...

Page 884: ...ons Applicable Program Areas S C D00200 Byte order 1 Least significant bytes first CS and DR signal monitoring 0 No CS and DR signal monitoring Not used Most signifi cant bytes Least signif icant bytes This example assumes that both a start and end code have been specified in the PC Setup ST Start code e g 02 hex ED End code e g 03 hex Stored 10 C Control word port S First source word STUP 237 C S...

Page 885: ...a CIO 0000 to CIO 6143 CIO 0000 to CIO 6134 Work Area W000 to W511 W000 to W502 Holding Bit Area H000 to H511 H000 to H502 Auxiliary Bit Area A000 to A438 A448 to A959 A000 to A438 A448 to A950 Timer Area T0000 to T4095 T0000 to T4086 Counter Area C0000 to C4095 C0000 to C4086 DM Area D00000 to D32767 D00000 to D32758 EM Area without bank E00000 to E32767 E00000 to E32758 EM Area with bank En_0000...

Page 886: ...fer to CS CJ series Programmable Controllers Operation Manual W339 or CS CJ series Serial Communications Boards and Serial Communications Unit Operation Manual W336 for the serial port that is to be set for details Unit address Unit Port No Serial port Serial port communications setup area 00 Hex CPU Unit 1 hex Port 1 Communications parameters for the peripheral port in the PLC Setup 2 hex Port 2 ...

Page 887: ...he periph eral port RS 232C Port Parameters Changing Flag A61902 ON when the communications param eters are being changed for the RS 232C port Port Parameters Changing Flags for ports 1 to 4 on Serial Communications Units 1 to 15 A620 bit 01 to bit 04 to A635 bit 01 to bit 04 ON when the communications param eters are being changed for a port on a Serial Communications Unit Port Parameters Changin...

Page 888: ...t by specifying the network address node number and unit number of the destination Unit In the following example a FINS command is sent to the CPU Unit through node number 2 in network address 00 1 2 3 1 Network address Address of the network local network 00 2 Node number Logical address in the network 3 Unit number Unit number of the destination Unit a CPU Unit 00 b CPU Bus Unit Unit number 10 h...

Page 889: ...ost computer connected by a Host Link Communications to Another Device in the Network The following example shows communications from a PLC to devices in another PLC the CPU Unit CPU Bus Unit or Inner Board For more details refer to the Operation Manual for the network Controller Link or Ethernet being used This example shows communications from a PLC to a personal computer Unit number hexadecimal...

Page 890: ...hich data will be transferred to the desired node Each routing table is made up of a local network table and a relay network table 1 2 3 1 Local network table This table shows the unit numbers and network addresses of the nodes connected to the local PLC 2 Relay network table This table shows the node numbers and network addresses of the first re lay nodes to destination networks that aren t conne...

Page 891: ...Spe cial I O Units computers etc In this case the necessary Host Link header and terminator must be attached to the FINS command when it is sent Host computer connected to the CPU Unit s built in port Host computer connected to a Serial Communications Board Host computer connected to a Serial Port Unit Host computer Host Link CPU Unit To port Host Link header FINS command Host Link FCS and termina...

Page 892: ...s can be executed simultaneously Only one instruction can be exe cuted at a time for each communications port Exclusive control must be used when more than 8 instructions are executed These 8 communications port numbers are shared by the network instructions SEND 090 RECV 098 and CMND 490 and the PROTOCOL MACRO instruction PMCR 260 Be sure not to specify the same port number on two instructions at...

Page 893: ...was necessary to confirm the availability of com munications ports before using them Execution condition Communications Port Enabled Flag Bit A remains ON while the communications instruction is being executed Reset B Destination Node Active Flag Local Node Active Flag Copies the operand and control data to the desired data area Executes the communications instruction Writes the reset input Reset ...

Page 894: ...nabled Flag here for port 0 A20200 b Executing c Executing Communica tions port 1 KEEP Communica tions instruction Communica tions port 0 Communica tions instruction Communica tions port 0 Communica tions instruction a Executing Exclusive control was required by the user when the same communications port was used more than once Item Specific number assignments Automatic allocation Specification of...

Page 895: ... A215 00 to 07 First Cycle Flags after Network Communications Error Each flag will turn ON for just one cycle after a communications error occurs Bits 00 to 07 correspond to ports 0 to 7 Use the Used Communications Port Number stored in A218 to determine which flag to access Note These flags are not effective until the next cycle after the communications instruction is executed Delay accessing the...

Page 896: ...s when communications instructions have been exe cuted Words A203 to A210 correspond to communications ports 0 to 7 A219 00 to 07 Communications Port Error Flags ON when an error occurred during execution of a communications instruction When a flag is ON check the completion code in A203 to A210 to troubleshoot the error Turn OFF then execution has been finished normally Bits 00 to 07 correspond t...

Page 897: ...e communications port number that was automatically allocated is stored in a work word b Used port from A218 Used Communications Port Number Confirms that the First Cycle Flags after Network Communications Finished for the automatically allocated port number corresponding bit for word b in A214 is ON Confirms that the First Cycle Flags after Network Communications Error for the automatically alloc...

Page 898: ...location a Executing c Standby b Used port d Execution completed e Code storage location When a Executing turns ON a communications instruction SEND 090 RECV 098 CMND 490 or PMCR 260 is executed with the communications port specified as F The communications port number that was automatically allocated is stored in a work word b Used port from A218 Used Communications Port Number Places the I O mem...

Page 899: ...composes a FINS command based on the oper ands see note and sends the FINS command to the Communications Unit or other destination node A20201 W00000 A20201 W00001 Port 1 Port 1 Port F Communications were previously enabled by exclusively controlling operation using W00000 and W00001 Automatic port alloca tion was add ed to the pro gram This instruction may at times use communications port 1 Even ...

Page 900: ... Communications Port Error Flag A21900 to A21907 and Communications Port Completion Code A203 to A210 3 25 2 NETWORK SEND SEND 090 Purpose Sends data to a node in the network Ladder Symbol Variations Cycle time First cycle END 001 executed 3 Processing is divided up over several cycles Cycle time Second cycle Program execution Program execution 1 SEND 090 RECV 098 or CMND 490 executed END 001 exec...

Page 901: ...set in bits 0 to 7 of C 2 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Word Bits 00 to 07 Bits 08 to 15 C Number of words 0001 to maximum allowed1 4 digit hexadecimal C 1 Destination network address 00 to 7F 0 to 127 2 Bits 08 to 11 Serial port number3 physical port 1 hex Port 1 2 hex Port 2 Do not set 0 3 or 4 Bits 12 to 15 Always 0 C 2 Destination unit address 0...

Page 902: ...Unit 00 hex CPU Bus Unit 10 hex unit number Special I O Unit except C200H series Special I O Units 20 hex unit number Inner Board CS Series only E1 hex Computer 01 hex Unit connected to net work not necessary to specify Unit FE hex Area S D C CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6139 Work Area W000 to W511 W000 to W507 Holding Bit Area H000 to H511 H000 to H507 Auxiliary Bit Area A000 toA...

Page 903: ...omputer connected to the PLC s serial port when set to host link mode as well as a PLC or computer connected through a Controller Link or Ethernet network If the Communications Port Enabled Flag is ON for the communications port specified in C 3 when SEND 090 is executed the corresponding Communi cations Port Enabled Flag ports 00 to 07 A20200 to A20207 and Communi cations Port Error Flag ports 00...

Page 904: ...mand is a FINS mes sage enclosed between a host link header and terminator The FINS com mand is a MEMORY AREA WRITE command command code 0102 and the host link header code is 0F hexadecimal A program must be created in the host computer to process the received com mand the FINS command enclosed in the host link header and terminator If the destination serial port is in the local PLC set the networ...

Page 905: ... we recommend setting the number of retries to a non zero value which will cause SEND 090 to be executed again if the response is not received within the response monitoring time Example 1 When the input condition and A20200 the Communications Port Enabled Flag for port 0 are ON in the following example the ten words from CIO 100 to CIO 109 are transmitted to the host computer connected to port 1 ...

Page 906: ...port 1 of Serial Communications Board Node number 0 unit address 10 Response requested port number 0 no retries Response monitoring time 2 seconds 0000 default value Input condition A20200 SEND 0100 0000 D00200 C D00200 0 0 0 A C 1 D00201 0 1 0 0 C 2 D00202 0 0 1 0 C 3 D00203 0 0 0 0 C 4 D00204 0 0 0 0 Number of words to send 10 words Transmit to the local network and the device itself Node number...

Page 907: ... the local node Word Bits 00 to 07 Bits 08 to 15 C Number of words 0001 to maximum allowed1 4 digit hexadecimal C 1 Source network address 00 to 7F 0 to 127 2 Bits 08 to 11 Serial port number physical port 1 hex Port 1 2 hex Port 2 Do not set 0 3 or 4 Bits 12 to 15 Always 0 C 2 Source unit address4 Source node address 00 to maximum allowed5 C 3 No of retries 00 to 0F 0 to 15 Port number 00 to 07 F...

Page 908: ...bits 0 to 3 of C 3 Area S D C CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6139 Work Area W000 to W511 W000 to W507 Holding Bit Area H000 to H511 H000 to H507 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 A000 to A443 A448 to A955 Timer Area T0000 to T4095 T0000 to T4091 Counter Area C0000 to C4095 C0000 to C4091 DM Area D00000 to D32767 D00000 to D32763 EM Area without bank E00000 to...

Page 909: ...Host Link When the CPU Unit s built in serial port a Serial Communications Board CS Series only or Serial Communications Unit is in host link mode and con nected one to one with a host computer RECV 098 can be executed to receive data from the host computer the next time that the PLC has the right to transmit commands It is also possible to receive data from other host com puters connected to othe...

Page 910: ... response to be cor rupted or lost so we recommend setting the number of retries to a non zero value which will cause RECV 098 to be executed again if the response is not received within the response monitoring time Name Label Operation Error Flag ER ON if the serial port number specified in C 1 is not within the range of 00 to 04 ON if the Communications Port Enabled Flag is OFF for the communica...

Page 911: ...rst response word C First control word CMND 490 S D C Variations Executed Each Cycle for ON Condition CMND 490 Executed Once for Upward Differentiation CMND 490 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Word Bits 00 to 07 Bits 08 to 15 C Bytes of command da...

Page 912: ...utomatic allocation of the communications port number logical port 8 When the destination node number is set to FF broadcast transmission there will be no response even if bits 12 to 15 are set to 0 Unit address Unit Serial port number Serial port 00 Hex CPU Unit 1 Hex Built in RS 232C port 2 Hex Peripheral port 10 Hex unit number Serial Communications Unit CPU Bus Unit 1 Hex Port 1 2 Hex Port 2 E...

Page 913: ...etwork address bits 00 to 07 of C 2 00 Hex local network Serial port No bits 08 to 11 of C 2 0 Hex not used Destination unit address bits 00 to 07 of C 3 00 Hex CPU Unit Destination node address bits 08 to 15 of C 3 00 Hex local node Number of retries bits 00 to 03 of C 4 0 Hex this setting is invalid set it to 0 EM Area without bank E00000 to E32767 E00000 to E32762 EM Area with bank En_00000 to ...

Page 914: ...ing Communi cations Port Enabled Flag ports 00 to 07 A20200 to A20207 and Communi cations Port Error Flag ports 00 to 07 A21900 to A21907 will be turned OFF and 0000 will be written to the word that contains the completion code ports 00 to 07 A203 to A210 The command data will be transmitted to the desti nation node s once the flags have be set Transmission through the Network CMND 490 can be used...

Page 915: ...mands not related to file memory Always use A34313 in an NC input condition for CMND 490 to ensure that only one FINS command is being executed for the CPU Unit at the same time Flags The following table shows relevant bits and flags in the Auxiliary Area Memory Card PC EM file memory FINS command Name Label Operation Error Flag ER ON if the serial port number specified in C 2 is not within the ra...

Page 916: ...it Noise and other factors can cause the transmission or response to be cor rupted or lost so we recommend setting the number of retries to a non zero value which will cause CMND 490 to be executed again if the response is not received within the response monitoring time Examples The following program section shows an example of sending a FINS com mand to another CPU Unit When CIO 000000 and A2020...

Page 917: ... The response is stored in D00100 to D00101 Here the FINS command will create a directory called CS CJ under the OMRON directory The command code 2 bytes and the end code 2 bytes will be returned and stored as the response Command code 0101 hexadecimal MEMORY AREA READ D00010 Data area 82 hexadecimal address 000A00 Number of words to read 0A hexadecimal 10 decimal Bytes of command data 0008 8 deci...

Page 918: ...ex Memory Card Parameter 0000 Hex create directory Subdirectory name CS1 space Directory name length 0006 6 characters Absolute directory path OMRON Bytes of command data 001A 26 decimal Bytes of response data 0004 4 Destination network address 00 Hex local network Destination unit address 00 Hex Destination node number 00 Hex CPU Unit at local node Response requested port number 7 0 retries Respo...

Page 919: ...ach file regardless of how small the file is If you save 10 words of DM Area data to the Memory Card 4 096 bytes of memory will be used even though the actual file size is only 68 bytes Using files of such a small size greatly reduces the utility rate of the Memory Card If the allocation unit size is reduced to increase the utility rate however the access speed will be reduced The allocation unit ...

Page 920: ...ctual data or the number of words of data is to be read the third digits indicates the presence of carriage returns and the fourth digit indicates the data type FREAD C S1 S2 D A34315 A34313 Execution condition Memory Card Recognized Flag File Memory Operation Flag C Control word S1 Number of words and First source word FREAD 700 C S1 S2 D S2 Filename D First destination word Variations Executed E...

Page 921: ...eld 1 4 Comma delimited double words extension CSV words field 2 5 Tab delimited words extension TXT words field 1 6 Tab delimited double words extension TXT words field 2 Carriage returns 0 No returns 8 Return every 10 fields 9 Return every 1 field A Return every 2 fields B Return every 4 fields C Return every 5 fields D Return every 16 fields Function specifier 0 Read data 1 Read number of words...

Page 922: ...n the IOM extension will be added automatically Note 1 Be sure that the character string containing the pathname and filename doesn t exceed the end of the data area 2 If the specified file or directory doesn t exist the File Missing Flag A34311 will be turned ON and the file data won t be read Write the path name and filename in ASCII beginning with the leftmost byte of S2 as shown in the followi...

Page 923: ...exceeds the capacity of the data area specified in D See Precautions for more details When FREAD 700 is executed the number of words or fields specified in S1 and S1 1 is written to A346 and A347 Number of Data to Transfer and this value is decremented by 1 as each word or field is transferred The con tent of these words can be checked to verify that the expected number of words or fields were tra...

Page 924: ...2767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified val ues only Data Registers Index Registers Indirect addressing using Index Regis ters IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Name Label Operation Error Flag ER ON if the fi...

Page 925: ...f the following The CPU Unit has sent a FINS command to itself using CMND 490 FREAD 700 or FWRIT 701 are being exe cuted The program is being overwritten using a con trol bit in memory A simple backup operation is being performed Accessing File Flag A34314 ON when file data is actually being accessed Use this flag as an execution condition to pre vent a file memory instruction from being exe cuted...

Page 926: ...delimiters must be every 4 digits for word data and every 8 digits for dou ble word data Data will be read up to the point where an illegal character is detected A few seconds is required for the CPU Unit to detect a Memory Card after it has been inserted If a Memory Card is going to be accessed soon after power is turned ON or after a Memory Card is inserted use the Memory Card Detected Flag A343...

Page 927: ...t source word FWRIT 701 C D1 D2 S Variations Executed Each Cycle for ON Condition FWRIT 701 Executed Once for Upward Differentiation FWRIT 701 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Function specifier 0 Append 1 Overwrite File memory specifier 0 Memory C...

Page 928: ...i e bits 08 to 11 of C set to 0 Hex or 2 for binary data Always set D1 2 and D1 3 to 00000000 Hex when Data type Bits 12 to 15 of C Contents of D1 and D1 1 Binary 0 Hex binary Number of words to write from file memory 00000000 to 3FFFFFFF Hex Word 1 Hex non delimited 3 Hex comma delimited or 5 Hex tab delimited Number of fields to write from file memory i e the number of words to write from file m...

Page 929: ...ry Data is read by absolute PLC memory addresses so FWRIT 701 will continue reading source data from the next data area if the number of words being read exceeds the end of the data area specified in S Description During normal instruction processing FWRIT 701 is used only to start writing of the file memory The instruction execution times given toward the end of this manual are thus the times req...

Page 930: ... D2 with file name extension IOM TXT or CVS starting at the address specified in D1 2 and D1 3 Appending Data to an Existing File Third Digit of C 0 FWRIT 701 appends data area data starting at the word specified in S to a data file in file memory in the specified data type It appends the number of words or field specified in D1 and D1 1 to the file specified in D2 with file name extension IOM TXT...

Page 931: ...00 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified val ues only Data Registers Index Registers Indirect addressing using Index Regis ters IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Name Label Operation Error Flag ER ON if the file memory...

Page 932: ...D 490 FREAD 700 or FWRIT 701 are being exe cuted The program is being overwritten using a con trol bit in memory A simple backup operation is being performed Accessing File Flag A34314 ON when file data is actually being accessed Use this flag as an execution condition to pre vent a file memory instruction from being exe cuted while another is in progress Memory Card Detected Flag A34315 ON when a...

Page 933: ... in the file ABC IOM although the user does not normally need to be concerned with this structure For word CSV format CSV the data will be as follows when 1234 Hex 5678 Hex 9ABC Hex and DEF0 Hex are stored in the file ABC CSV the basic structure would be the same for text data TXT For long word CSV format CSV the data will be as follows when 1234 Hex 5678 Hex 9ABC Hex and DEF0 Hex are stored in th...

Page 934: ...rogramming Console Ladder Symbol 8 bytes Converted to ASCII higher addressed word first in field Delimiter Contents of ABC CSV File Displayed as Text Data I O memory 1234 5678 9ABC DEF0 to 35 5 36 6 37 7 38 8 31 1 32 2 33 3 34 4 2C 56781234 DEF09ABC D1 D00200 D1 1 D00201 D1 2 D00202 D1 3 D00203 D2 D00300 D2 1 D00301 D2 2 D00302 D2 3 D00303 D2 4 D00304 0 0 0 0 4 4 5 5 File memory Memory Card Functi...

Page 935: ...ach Cycle for ON Condition MSG 046 Executed Once for Upward Differentiation MSG 046 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N M CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer A...

Page 936: ...ssage characters after the null character 00 are converted to spaces in the Programming Console display The character stored in the leftmost byte is displayed before the character in the rightmost byte Examples The following diagram shows how 16 words of hexadecimal data are con verted to a message displayed on the Programming Console When CIO 000000 turns ON in the following example the 16 words ...

Page 937: ...bits SP Instruction Mnemonic Function code Page CALENDAR ADD CADD 730 916 CALENDAR SUBTRACT CSUB 731 920 HOURS TO SECONDS SEC 065 923 SECONDS TO HOURS HMS 066 925 CLOCK ADJUSTMENT DATE 735 928 C First calendar word T First time word R First result word CADD 730 C T R Variations Executed Each Cycle for ON Condition CADD 730 Executed Once for Upward Differentiation CADD 730 Executed Once for Downwar...

Page 938: ...ime Data Set the time data in T and T 1 as shown in the following diagram T and T 1 must be in the same data area Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Minutes 00 to 59 BCD Seconds 00 to 59 BCD Day 01 to 31 BCD Hour 00 to 23 BCD Year 00 to 99 BCD Month 01 to 12 BCD 15 8 0 7 C 15 8 0 7 C 1 15 8 0 7 C 2 Minutes 00 to 59 BCD Seconds 00 to 59 BCD Hours 0000 to ...

Page 939: ...o H509 H000 to H510 H000 to H509 Auxiliary Bit Area A000 to A957 A000 to A958 A448 to A957 Timer Area T0000 to T4093 T0000 to T4094 T0000 to T4093 Counter Area C0000 to C4093 C0000 to C4094 C0000 to C4093 DM Area D00000 to D32765 D00000 to D32766 D00000 to D32765 EM Area without bank E00000 to E32765 E00000 to E32766 E00000 to E32765 EM Area with bank En_00000 to En_32765 n 0 to C En_00000 to En_3...

Page 940: ... D00300 through D00302 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR005 to IR15 IR0 to IR15 Area C T R Minutes Seconds Day Hour Year Month Minutes Seconds Hours Minutes Seconds Day Hour Year Month C 1 C C 2 T 1 T R 1 R R 2 Name Label Operation Error Flag ER ON if the calendar data in C through C 2 is not withi...

Page 941: ...ame data area C First calendar word T First time word R First result word CSUB 731 C T R Variations Executed Each Cycle for ON Condition CSUB 731 Executed Once for Upward Differentiation CSUB 731 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Minutes 00 to 59 BC...

Page 942: ... 15 0 T 1 Minutes 00 to 59 BCD Seconds 00 to 59 BCD Day 01 to 31 BCD Hour 00 to 23 BCD Year 00 to 99 BCD Month 01 to 12 BCD 15 8 0 7 R 15 8 0 7 R 1 15 8 0 7 R 2 Area C T R CIO Area CIO 0000 to CIO 6141 CIO 0000 to CIO 6142 CIO 0000 to CIO 6141 Work Area W000 to W509 W000 to W510 W000 to W509 Holding Bit Area H000 to H509 H000 to H510 H000 to H509 Auxiliary Bit Area A000 to A957 A000 to A958 A448 t...

Page 943: ... En_00000 to En_32766 n 0 to C En_00000 to 3En_2765 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to...

Page 944: ...must be in the same data area C T R 18 30 20 10 July 1998 50 hours 10 minutes 15 seconds 16 20 05 8 July 1998 C T R S First source word D First destination word SEC 065 S D Variations Executed Each Cycle for ON Condition SEC 065 Executed Once for Upward Differentiation SEC 065 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program ar...

Page 945: ...ea A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants S...

Page 946: ...nverts seconds data to an equivalent time in hours minutes seconds for mat Ladder Symbol Variations Minutes Seconds Hours Seconds Name Label Operation Error Flag ER ON if the minutes data in S bits 08 to 15 is not BCD and in the range 00 to 59 ON if the seconds data in S bits 00 to 07 is not BCD and in the range 00 to 59 OFF in all other cases Equals Flag ON if the content of D is 0000 after the o...

Page 947: ...s OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_...

Page 948: ...t is output to D00200 and D00201 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 35999999 BCD Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D Minutes Seconds Hours Seconds Name Label Operation Error...

Page 949: ...S through S 3 must be in the same data area S First source word DATE 735 S Variations Executed Each Cycle for ON Condition DATE 735 Executed Once for Upward Differentiation DATE 735 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Minutes 00 to 59 BCD Seconds 00 t...

Page 950: ...0 to 06 Sunday to Saturday hexadecimal A35408 to A35415 Always set to 00 Area S CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 Timer Area T0000 to T4092 Counter Area C0000 to C4092 DM Area D00000 to D32764 EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D0000...

Page 951: ...icable Program Areas Description Before TRSM 045 is executed the bit or word to be traced must be specified with a Peripheral Device Each time that TRSM 045 is executed the current value of the specified bit or word is sampled and recorded in order in Trace Name Label Operation Error Flag ER ON if the new clock setting in S through S 3 isn t within the specified range OFF in all other cases S Minu...

Page 952: ...xecution condition is ON If the instruc tion s execution condition is ON every cycle the specified bit or word s value will be stored in Trace Memory every cycle It is possible to incorporate two or more TRSM 045 instructions in a program In this case the value of the same specified bit or word will be stored in Trace Memory each time that one of the TRSM 045 instructions is executed Note Refer to...

Page 953: ...ontents of Trace Memory with the Peripheral Device The following table shows relevant bits and flags in the Auxiliary Area Only A50814 and A50815 are meant to be controlled by the user and A00815 must not be turned ON from the program i e it must be turned ON only from a Peripheral Device Name Address Operation Trace Trigger Monitor Flag A50811 This flag is turned ON when the trigger condition has...

Page 954: ...al Device Example The following example shows the overall data trace operation Note Trace Memory has a ring structure Data is stored to the end of the Trace Memory area and then wraps to the beginning of the area ending just before the first valid data sample Operated from Peripheral Device Sampling Start Bit A50815 Trace Start Bit A50814 Trace Busy Flag A50813 Trace Completed Flag A50812 Trace Tr...

Page 955: ...d errors is slightly different from the function when FAL 006 is used to generate system errors CS1 H CJ1 H CJ1M and CS1D CPU Units only Generating or Clearing User defined Non fatal Errors The following table shows the function of the operands Instruction Mnemonic Function code Page FAILURE ALARM FAL 006 934 SEVERE FAILURE ALARM FALS 007 942 FAILURE POINT DETECTION FPD 269 950 FAL 006 N S N FAL n...

Page 956: ...e corre sponding FAL number no message Word address Generates a non fatal error with the corre sponding FAL number The 16 character ASCII message contained in S through S 7 will be displayed on the Pro gramming Device Operand Function N 1 to 511 These FAL numbers are shared with FALS numbers S Error code that will be generated See Description below S 1 Error details code that will be generated See...

Page 957: ... time as the FAL 006 instruction the more serious error s error code will be written to A400 4 The error code and the time that the error occurred will be written to the Error Log Area A100 through A199 Note With CS1 H CJ1 H and CJ1M CPU Units the error record will not be written to the Error Log Area if the PLC Setup has been set so that errors generated by FAL 006 are not recorded i e if Program...

Page 958: ...r code and the time that the error occurred will be written to the Error Log Area A100 through A199 3 The appropriate Auxiliary Area Flags are set based on the error code and error details 4 The ERR Indicator on the CPU Unit will flash and PLC operation will con tinue 5 The non fatal error message for the specified system error will be dis played on the Programming Console Note 1 FAL 006 can be us...

Page 959: ... Error Log entries for user defined FAL 006 errors when you want to record only the system generated errors For example this function is useful during debugging if the FAL 006 instructions are used in several applications Error name S S 1 Interrupt Task Error 008B Hex Bit 15 OFF Interrupt task error Bits 00 to 14 Task number of interrupt task where error occurred Bit 15 ON Interrupt task execution...

Page 960: ...d with FAL 006 Turn the PLC OFF and then ON again When keeping the PLC ON the system error must be cleared as if the specified error had actually occurred Flags Item Setting Programming Console setting address Word 129 Bit 15 Name FAL Error Log Registration Settings 0 Record FAL Errors in Error Log 1 Do not record FAL Errors in Error Log Default setting 0 Record FAL Errors in Error Log Times that ...

Page 961: ...date that the error occurred will be written to the Error Log Area A100 through A199 5 The ERR Indicator on the CPU Unit will flash 6 The ASCII message in D00100 to D00107 will be displayed at the Periph eral Device If a message isn t required specify a constant for S Name Address Operation FAL Error Flag A40215 ON when an error is generated with FAL 006 Executed FAL Num ber Flags A36001 to A39115...

Page 962: ...umber Flag and the FAL Error Flag A40215 will be turned OFF Generating a Non fatal System Error CS1 H CJ1 H CJ1M or CS1D Only When CIO 000000 is ON in the following example FAL 006 will generate a CPU Bus Unit Setup Error for unit number 1 In this case dummy FAL number 10 is used and the corresponding value 000A Hex is stored in A529 1 2 3 1 The specified error code 0400 will be written to A400 if...

Page 963: ... Symbol Generating User defined Fatal Errors Generating Fatal System Errors CS1 H CJ1 H CJ1M or CS1D Only Variations Applicable Program Areas MOV 000A A529 000A A529CH S D00200 D00201 0400 0001 000000 FAL 10 D00200 N S Error code 0400 CPU Bus Unit Setup Error Matching values Error unit number 1 FALS 007 N S N FALS number S First message word or constant 0000 to FFFF FALS 007 N S N FALS number valu...

Page 964: ...essage isn t required Operand Function N 1 to 511 These FALS numbers are shared with FAL numbers S Error code that will be generated See Description below S 1 Error details code that will be generated See Description below Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095...

Page 965: ...will be registered displayed on the Peripheral Device The following table shows the error codes for FALS 007 Note The input method for the FALS number N is different for the CX Programmer and a Programming Console Input 1 to 511 on the CX Programmer and input 001 to 511 on a Programming Console Displaying Messages with Fatal User defined Errors If S is a word address the ASCII message beginning at...

Page 966: ...ors different er rors can be generated by executing the FAL FALS FPD instructions more than once with the same values in A529 and N but different values in S and S 1 2 If a more serious error including a system generated fatal error or another FALS 007 error occurs at the same time as the FALS 007 instruction the more serious error s error code will be written to A400 3 To clear a system error gen...

Page 967: ...ed I O table Bit 07 Routing table Bit 08 CPU Bus Unit Setup Bit 09 Memory Card transfer error Bits 10 to 15 Invalid I O Bus Error 80C0 Hex Bits 00 to 07 Slot number where the I O Bus error occurred Slot 0 to 9 00 to 09 Hex Slot unknown 0F Hex Bits 08 to 15 Rack number where the I O Bus error occurred Slot 0 to 7 00 to 07 Hex Rack unknown 0F Hex Unit Number Duplication Error 80E9 Hex CPU Bus Unit s...

Page 968: ...its 00 to 12 All zeroes A Slave Unit s unit number is duplicated or a C500 Slave Unit has more than 320 I O points Bits 13 to 15 010 Bits 00 to 12 Slave Unit s unit number binary The unit number of an I O Interface excluding Slave Racks is duplicated Bits 13 to 15 011 Bits 00 to 12 Unit number binary A Master Unit s unit number is duplicated or out side of the allowed setting range Bits 13 to 15 1...

Page 969: ...code and the time date that the error occurred will be written to the Error Log Area A100 through A199 4 The ERR Indicator on the CPU Unit will be lit 5 The ASCII message in D00100 to D00107 will be displayed at the Periph eral Device If a message isn t required specify a constant for S Name Label Operation Error Flag ER ON if N isn t within the specified range of 0001 to 01FF 1 to 511 decimal ON ...

Page 970: ...400 if it is the most se rious error 2 The error code and the time date that the error occurred will be written to the Error Log Area A100 through A199 3 The Too Many I O Points Flag A40111 will be turned ON 4 The CPU Unit s ERR Indicator will light and PLC operation will stop 5 A message TOO MANY I O PNT will be displayed at the Programming Console indicating that a Too Many I O Points Error has ...

Page 971: ...99 9 seconds R First Register Word The functions of the register words are described on page 953 Operand Specifications C Control word T Monitoring time R First register word FPD 269 C T R Variations Executed Each Cycle for ON Condition FPD 269 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supp...

Page 972: ...rect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only 0000 to 270F binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 Area C T R...

Page 973: ... higher error code at the same time the error code of the more serious error will be stored in A400 4 The error code and the time date that the error occurred will be written to the Error Log Area A100 through A199 5 The ERR Indicator on the CPU Unit will flash 6 If the output mode has been set for bit address and message output left most digit of C set to 8 the ASCII message stored in R 2 through...

Page 974: ...dress output mode Leftmost digit of C 0 Bit 15 of R the Bit Address Found Flag is turned ON when an input bit address has been found and bit 14 of R indicates whether the input is nor mally ON or normally OFF The 8 digit hexadecimal PLC memory address of the input bit is output to R 3 and R 2 2 Bit address and message output mode Leftmost digit of C 8 Bit 15 of R the Bit Address Found Flag is turn...

Page 975: ...ble shows the ASCII representations for each area Area ASCII text Notes Auxiliary Area A00000 to A95915 Holding Area H00000 to H51115 Work Area W00000 to W51115 CIO Area 000000 to 665515 Task Flags TK0000 to TK0031 Timer Area _T0000 to _T4095 The _ represents an ASCII space Character code 20 Counter Area _C0000 to _C4095 Input type 0 Normally open 1 Normally closed Bit Address Found Flag 0 Not fou...

Page 976: ...error code will be written to A400 Disable Error Log entries for FPD 269 time monitoring errors when you want to record only the system generated errors For example this function is use ful during debugging if the FPD 269 and FAL 006 instructions are used in several applications and the Error Log is becoming full of these errors The fol lowing table shows the PLC Setup setting Even if PLC Setup wo...

Page 977: ...ng time is refreshed only when FPD 269 is executed If the cycle time is longer than 100 ms the monitoring time will not be refreshed normally and FPD 269 will not operate correctly because the monitoring time is updated in units of 100 ms Name Label Operation Error Flag ER ON if C is not within the specified range of 0000 to 01FF or 8000 to 81FF ON if T is not within the specified range of 0000 to...

Page 978: ... C specify an FAL number of 00A hex 10 the corresponding Executed FAL Number Flag A36010 will be turned ON the corresponding error code 410A is written in A400 and the FAL Error Flag A40215 is turned ON Logic Diagnosis Function C 000A Since the leftmost digit of C is 0 bit address output mode the PLC memory address of CIO 010000 is output to D00303 and D00302 CIO 010000 is on a higher instruction ...

Page 979: ...000 goes ON If the measured time exceeds the monitoring time in T the measured time is multiplied by 1 5 and that value is stored in T as the new monitoring time FAL number 10 Diagnostic output mode 8 bit address and message output Bit Address Found Flag 1 Bit address found Input type 0 Normally open Not used Contains bit address in ASCII 010000 is converted to ASCII User set FAL error message out...

Page 980: ...FPD Teaching Bit A59800 Execution condition CIO 030000 Diagnostic output CIO 020000 Measured time ta Teaching No error generated t s ta 1 5 Instruction Mnemonic Function code Page SET CARRY STC 040 959 CLEAR CARRY CLC 041 960 SELECT EM BANK EMBC 281 961 EXTEND MAXIMUM CYCLE TIME WDT 094 963 SAVE CONDITION FLAGS CCS 282 965 LOAD CONDITION FLAGS CCL 283 967 CONVERT ADDRESS FROM CV FRMCV 284 968 CONV...

Page 981: ...on operations Use CLC 041 just before any of these instructions to prevent any influence from other preceding instructions C 412 CL 413 BC 416 and BCL 417 make use of the Carry Flag in their subtraction operations Use CLC 041 just before any of these instruc tions to prevent any influence from other preceding instructions ROL 027 ROLL 572 ROR 028 and RORL 573 make use of the Carry Flag in their ro...

Page 982: ...wnward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32...

Page 983: ...r ation is switched between tasks For example if EMBC 281 is used in task 1 to change the current EM bank from bank B to bank C bank C will remain the current EM bank for all cyclic tasks even when operation is switched to task 2 The current EM bank number changed in an interrupt task is valid only during execution of the interrupt in which it was changed The previous EM bank number will be return...

Page 984: ... the cycle in which this instruc tion is executed The watchdog timer setting in the PLC Setup is extended by an interval of T 10 ms 0 to 39 990 ms T Timer setting WDT 094 T Variations Executed Each Cycle for ON Condition WDT 094 Executed Once for Upward Differentiation WDT 094 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program ar...

Page 985: ...ored As a result the second WDT 094 instruction ac tually extends the maximum cycle time by 38 700 ms 3 When CIO 000002 turns ON the third WDT 094 instruction attempts to extend the maximum cycle time by another 1 000 ms Since the maximum cycle time has already reached the upper limit of 40 000 ms the third WDT 094 instruction is not executed Name Function Settings Watchcycle time A Cycle Time Too...

Page 986: ...t status of the Condition Flags except for the ALWAYS ON and ALWAYS OFF Flags in a separate area in the CPU Unit The Status of the following Condition Flags will be preserved ER CY N OF UF and The preserved status of the Condition Flags can be read restored later only with CCL 283 the LOAD CONDITION FLAGS instruction The status can be read in any of the following cases Within a task Between differ...

Page 987: ...ags There are no flags affected by these instructions Examples In the following example CCS 282 preserves the results of a Comparison so that this result can be used as an execution condition later in the program A CCS CCL CCS CCL A B CCS CCL Between cycles Between cyclic tasks Within a task CCL 283 is executed to read the status in the next cycle after CCS 282 was executed to save the status CCS ...

Page 988: ...us of the Condition Flags would not be affected by intervening instructions The CCS 282 and CCL 283 instructions allow the controlling instruction to be separated from the execution conditions that rely on the result For example CCS 282 can store the status of the Equals Flag after execu tion of a Comparison Instruction and the result can be restored later The result does not have to be used immed...

Page 989: ...erted to its equivalent CV series data area address 2 FRMCV 284 determines the CS CJ series PLC memory address that cor responds to the same CV series data area address 3 The CS CJ series PLC memory address is output to D An index register IR0 to IR15 must be specified for D The following example shows FRMCV 284 used to convert the CV series PLC memory address for D00001 CCL CCL 283 is used alone ...

Page 990: ...nverted to its equivalent CV series data area address CV series PLC memory address CV series data area address CS CJ series data area address CS CJ series PLC memory 2 The corresponding CV series data area address is converted to its CS CJ series PLC memory address Storage 3 The CS CJ series PLC memory address is stored in D 0000Hex 0001Hex 2000Hex 2001Hex FFFDHex 0000CH 0001CH D00000 D00001 E3276...

Page 991: ...Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Any constant...

Page 992: ... addressing CS CJ series program Equivalent program In this case the value in D00000 is 0200 Hex The corresponding data area address is CIO 0512 so 1234 is transferred to CIO 0512 Word address D00000 Word address CIO 0512 MOV 021 CS CJ series PLC memory address CS CJ series PLC memory address In this case the value in D00000 is 0200 Hex The corresponding CV series data area address is CIO 0512 The...

Page 993: ...D 000000 FRMCV 0200 IR0 S D 0200Hex 0200 IR0 000C200 IR CV series program Program using PLC memory addresses stored directly in IR CS CJ series program Equivalent program In this case the PLC memory address 0200 Hex is stored in Index Register IR0 In this case the CV series PLC memory address 0200 Hex corresponds to CIO 0512 The CS CJ series PLC memory address for CIO 0512 is 0000C200 Hex so this ...

Page 994: ...C memory address is output to D The following example shows TOCV 285 used to convert the CS CJ series PLC memory address for D00001 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK TOCV IR1 D00100 10001 Hex IR1 2001 Hex D00001 D00001 10001 Hex D00100 2001 Hex 1 The CS CJ series PLC memory address is converted to its equivalent CS CJ series data area address CS CJ seri...

Page 995: ...000 D00001 EC_32767 D Specify the CS CJ series PLC memory address in S In this case 10001 Hex is the PLC memory address of D00001 Data area address PLC memory address Convert Corresponding data area address CS CJ series The corresponding CV series PLC memory address is stored in D In this case data area address D00001 is converted to PLC memory address 2001 Hex and stored Convert CV series Area S ...

Page 996: ...ress in the CV series program Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 Area S D Area or addresses PLC memory addresses Task Flag Area 0000 B800 to 0000 B801 Hex A512 to A959 0000 BA40 to 0000 BBFF Hex CIO 2556 to CIO 6143 0000 C9FC to 0000 D7FF Hex T1024 to T4095 0000 BE40 to 0000 BEFF Hex and 00...

Page 997: ... Hex The data area address corresponding to PLC memory address 10001 Hex is D00001 so 1234 is transferred to D00001 CV series PLC memory address CS CJ series data area CS CJ series data area address Transfer contents of D00200 to CV series CV series program In this case IR0 contains 10001 Hex Since the data area address corresponding to CS CJ series PLC memory address 10001 Hex is D00001 TOCV 285 ...

Page 998: ...ssary to disable peripheral servicing in more than one task program IOSP 287 separately in each task Example The following example shows IOSP 287 and IORS 288 used to disable peripheral servicing in a program section IOSP IORS Disables execution of peripheral servicing Execution condition Execution of peripheral servicing is disabled between IOSP 287 and IORS 288 Enables execution of peripheral se...

Page 999: ...interrupt task Flags 3 32 Block Programming Instructions This section describes block programs and the block programming instruc tions IORS 288 Variations Executed Each Cycle for ON Condition IORS 288 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas...

Page 1000: ...ic form The block program is thus a combination of ladder and mnemonic instructions Block programs enable programming operations that can be difficult to pro gram with ladder diagrams such as conditional branches and step progres sions The following example shows two block programs HIGH SPEED TIMER WAIT TMHW BCD 817 1004 TMHWX binary 815 LOOP LOOP 809 1007 LOOP END NOT LEND NOT 810 1007 Instructio...

Page 1001: ...ons are not used with block programs unless inten tionally programmed with IF 802 WAIT 805 EXIT 806 IEND 810 or other instructions Also there are some instructions that cannot be used within block programs such as those that detect upward and downward differentia tion Block programs can be used either within cyclic tasks or interrupt tasks Each block program number from 0 to 127 can be used only o...

Page 1002: ...g Execution Conditions within Block Programs The following instruction can take execution conditions within a block pro gram Instructions with Application Restrictions within Block Programs The instructions listed in the following table can be used only to create execu tion conditions for IF 802 WAIT 805 EXIT 806 LEND 810 CJP 510 or CJPN 511 and cannot be used by themselves The execution of these ...

Page 1003: ... BREAK LOOP IL 002 and ILC 003 INTERLOCK and INTER LOCK CLEAR Divide the block program into smaller blocks JMP 004 0 and JME 005 0 Multiple JUMP and Multi ple JUMP END Use JMP 004 and JME 005 but the jump will be made unconditionally END 001 END Use BEND 801 Timer and Counter Instructions TIM TIMER Use TIMW 813 TIMWX 816 TMHW 815 TMHWX 817 CNTW 814 and CNTWX 818 Other instructions in the block pro...

Page 1004: ...LURE POINT DETEC TION None Upward and Downward Differenti ated Instruc tions Mnemonics with Upward Differentiated Instructions None Mnemonics with Downward Differentiated Instructions None Instruction group Mnemonic Name Alternative N Block program number BPRG 096 N Variations Executed Each Cycle for ON Condition BPRG 096 Executed Once for Upward Differentiation Not supported Executed Once for Dow...

Page 1005: ...ck program even if the execution condition for BPRG 096 is ON Flags BPRG 096 BEND 801 Precautions Each block program number can be used only once within the entire user pro gram Block programs cannot be nested Indirect DM EM addresses in binary Indirect DM EM addresses in BCD Constants 0 to 127 decimal Data Registers Index Registers Indirect addressing using Index Registers Area N Block program Ex...

Page 1006: ... is no block program or if the same block pro gram number is used more than once Examples When CIO 000000 turns ON in the following example block program 0 will be executed When CIO 000000 is OFF the block program will not be executed The two program sections shown below both execute MOV 021 B 594 and SET for the same execution condition i e when CIO 000000 turns ON 3 32 3 BLOCK PROGRAM PAUSE REST...

Page 1007: ...RS 812 restarts the block program specified by N the block program num ber Once restarted the block program will be executed as long as the BPRG 096 for the block program has an ON execution condition Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N CIO Area Work Area Holding Bit Area Auxiliary Bit Area Timer Area Counter Area DM Area EM Area without bank EM Ar...

Page 1008: ...k program appears before BPPS 811 it will be paused starting the next cycle If CIO 000000 is ON the following program pauses execution of either block program 1 or block program 2 depending on the status of CIO 000001 The block program that was paused is then restarted after 10 seconds Name Label Operation Error Flag ER ON if BPPS 811 or BPRS 812 is not in a block program ON if N is not between 0 ...

Page 1009: ...gram Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A44715 A44800 to A95915 Timer Area T0000 to T4095 Counter Area C0000 to C4095 Task Flags TK0000 to TK0031 Condition Flags ER CY N OF UF ON OFF AER Clock Pulses 0 02 s 0 1 s 0 2 s 1 s 1 ...

Page 1010: ...r IF NOT 802 If the operand bit is ON the instructions between IF 802 and ELSE 803 will be executed If the operand bit is OFF the instructions between ELSE 803 and IEND 804 will be executed For IF NOT 802 the instructions between IF 802 and ELSE 803 will be executed and if the operand bit is ON the instructions be ELSE 803 and IEND 804 will be executed is the operand bit is OFF If the ELSE 803 ins...

Page 1011: ...00 and CIO 000002 The first block executes one of two additions depending on the status of CIO 000001 This block is executed when CIO 000000 is ON If CIO 000001 is ON 0001 is added to the contents of CIO 0001 If CIO 000001 is OFF 0002 is added to the contents of CIO 0001 In either case the result is placed in D00000 The second block is executed when CIO 000002 is ON and shows nesting two levels If...

Page 1012: ...dress Instruction Operands 000000 LD 000000 000001 BPRG 096 00 000002 IF 802 000001 000003 B 404 0001 0001 D00000 000004 ELSE 803 000005 B 404 0001 0002 D00000 000006 IEND 804 000007 BEND 801 000008 LD 000002 000009 BPRG 096 1 000010 LD 000003 000011 AND 000004 000012 IF 802 000013 B 404 1200 0002 D00010 000014 IF 802 A50004 000015 MOV 030 0001 D00011 000016 IEND 804 000017 ELSE 803 000018 SET 016...

Page 1013: ...t be executed Variations Always Executed in Block Program EXIT 806 EXIT 806 B EXIT NOT 806 B Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A44715 A44800 to A95915 Timer Area T0000 to T4095 Counter Area C0000 to C4095 Task Flags TK0000 t...

Page 1014: ...IO 000000 is OFF the block program is executed If CIO 000001 is ON A is executed and then B is skipped and program control jumps to BEND 801 Section B of the program will continue to be skipped until CIO 000001 turns OFF again Although EXIT NOT 806 is similar to IF IEND programming execution time is normally shorter for EXIT NOT 806 because the instructions from EXIT NOT 806 to the end of the bloc...

Page 1015: ... CIO 000001 ON Block ended CIO 000003 and CIO 000004 ON Block ended CIO 000001 OFF CIO 000003 or CIO 000004 OFF 0 2 B Bit operand WAIT 805 WAIT 805 B WAIT 805 NOT B Variations Always Executed in Block Program Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary ...

Page 1016: ...he operand bit is OFF ON for WAIT NOT 805 the rest of the instructions in the block program will be skipped In the next cycle none of the block program will be executed except for the execution condition for WAIT 805 or WAIT 805 NOT When the execution condition goes ON OFF for WAIT 805 NOT the instruction from WAIT 805 or WAIT 805 NOT to the end of the program will be executed EM Area without bank...

Page 1017: ...xecuted from the beginning Examples When CIO 000000 is ON in the following example block program 00 will be executed Execution would proceed as follows 1 2 3 1 If CIO 000001 is OFF none of the block program will be executed until CIO 000001 turns ON When CIO 000001 turns ON A will be executed 2 If CIO 000002 is OFF after A is executed the rest of the block program will not be executed until CIO 00...

Page 1018: ...003 ON CIO 000 001 OFF 0 Operand bits Program execution CIO 000001 CIO 000002 CIO 000003 First cycle CIO 000000 is ON Next cycle Following cycles OFF Any status Any status Nothing executed Nothing executed wait ing for CIO 000001 When CIO 000001 turns ON A is exe cuted and the status of CIO 000002 is checked ON OFF Any status A executed Waiting for CIO 000002 When CIO 000002 turns ON B is exe cute...

Page 1019: ... 0 to 65535 decimal 0000 to FFFF hex Operand Specifications N Timer number SV Set value TIMW 813 N SV N Timer number SV Set value TIMWX 816 N SV Variations Always Executed in Block Program Block program areas Step program areas Subroutines Interrupt tasks OK OK OK Not allowed Area N SV CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A44...

Page 1020: ...will be executed to update the timer When the timer times out the Completion Flag will turn ON and the rest of the block program will be executed Once the entire block program has been executed the process will be repeated TIMW 813 TIMWX 816 can be thought of as a WAIT instruction with a timer for the execution condition and it can thus be used for timed step progres sions Flags Constants BCD 0000...

Page 1021: ...le if the same timer number is used for more than one timer instruction Use each timer number only once The only way that the same timer number can be used dependably is if only one of the timers is ever operating at the same time An error will occur in the program check if the same timer number is used in more than one timer instruction An error will occur and the Error Flag will turn ON if an in...

Page 1022: ...d Binary Variations Applicable Program Areas Note CNTW 814 CNTWX 818 must be used in block programming regions even within subroutines and interrupt tasks Operands N Counter Number BCD 0 to 4095 decimal Binary 0 to 4095 decimal S Set Value BCD 0000 to 9999 BCD Binary 0 to 65535 decimal 0000 to FFFF hex 1 2 3 4 N Counter number SV Set value I Count input CNTW 814 N SV I N Counter number SV Set valu...

Page 1023: ...5 A44800 to A95915 Timer Area T0000 to T4095 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4095 C0000 to C4095 Task Flags TK0000 to TK0031 Condition Flags ER CY N OF UF ON OFF AER Clock Pulses 0 02 s 0 1 s 0 2 s 1 s 1 min DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 t...

Page 1024: ... 814 CNTWX 818 will be executed in the block program until the force reset status is cleared The counter numbers are also used by the other counter instructions Opera tion will not be predictable if the same counter number is used for more than one counter instruction Use each counter number only once The only way that the same counter number can be used dependably is if only one of the counters i...

Page 1025: ... the specified time has elapsed Execution will be continued from the next instruction after TMHW 815 TMHWX 817 when the timer times out Ladder Symbol PV Refresh Method BCD PV Refresh Method Binary Variations Address Instruction Operand 000200 LD 000000 000201 BPRG 0 A 000210 CNTW 0005 7000 000100 B 000220 BEND Counter counts out CIO 000100 counted Updated Updated 0 1 4 2 3 N Timer number SV Set va...

Page 1026: ... H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 Timer Area 0000 to 4095 T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E3276...

Page 1027: ...struction with a timer for the execution condition and it can thus be used for timed step pro gressions Flags Precautions The rest of the block program following TMHW 815 TMHWX 817 will be exe cuted if the Completion Flag for the timer is force set If the Completion Flag for the timer is force reset the only TMHW 815 TMHWX 817 will be executed in the block program until the force reset status is c...

Page 1028: ...00 is ON 3 32 10 Loop Control LOOP 809 LEND 810 LEND 810 NOT Purpose Create a loop that is repeatedly executed until an execution condition turns ON or OFF or until an execution condition turns ON Ladder Symbol Variations Applicable Program Areas Note LOOP 809 LEND 810 and LEND 810 NOT must be used in block pro gramming regions even within subroutines and interrupt tasks Address Instruction Operan...

Page 1029: ...he execution condition is OFF execution of the loop is repeated starting with the next instruction after LOOP 809 If the execution condition is ON the loop is ended and execution continues to the next instruc tion after LEND 810 Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A44715 A44800 to A95915 Timer Area T0000...

Page 1030: ...T Note 1 Execution inside a loop does not refresh I O data If I O data must be re freshed during the loop use IORF 184 2 The maximum cycle time can be exceeded if loops are repeated too long Design the program so that the maximum cycle time is not exceeded Flags Execution condition Execution condition ON Execution condition OFF Execution condition OFF Execution condition OFF Loop repeated Operand ...

Page 1031: ...ND 804 LEND 810 LEND 810 IEND 804 NOP processing will be performed if LOOP 809 is not executed An error will occur and the Error Flag will turn ON if a Loop Control Instruction is not in a block program Examples When CIO 000000 is ON in the following example the block program is exe cuted After A is executed B and the IORF 184 after it will be executed repeatedly until CIO 000001 is ON at which ti...

Page 1032: ...1011 Block Programming Instructions Section 3 32 B 000220 IORF 0000 0000 000221 LEND 000001 C 000220 BEND Address Instruction Operand ...

Page 1033: ... the following diagram a text string can be specified by simply designating the first word of that string The text string data up until the next NUL code 00 hex will then be handled as a single block of ASCII data Text string processing instructions can be used to execute at a PLC the vari ous kinds of text string processing product data and so on that used to be executed at the host computer Inst...

Page 1034: ...PLC thereby reduc ing the data processing load at the host computer ASCII Characters The ASCII characters that can be handled by text string processing instruc tions are shown in the following table 3 33 2 MOV STRING MOV 664 Purpose Transfers a text string Ladder Symbol Text string processing Host computer Host computer Text str ing Text string processing PLC Four leftmost bits Four rightmost bits...

Page 1035: ...on Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Text string data 4 095 characters max NUL S maximum 2 047 words 15 0 S to Text string data 4 095 characters max NUL D maximum 2 047 words 15 0 D to Area S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer ...

Page 1036: ...33 3 CONCATENATE STRING 656 Purpose Links one text string to another text string Ladder Symbol Variations Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D Name Label Operation Error Flag ER ON if more than 4 095 characters are designated by S OFF in all other cases Equals Flag ON if ...

Page 1037: ...outines Interrupt tasks OK OK OK OK Text string data 4 095 characters max NUL S1 maximum 2 047 words 15 0 S1 to Text string data 4 095 characters max NUL S2 maximum 2 047 words 15 0 S2 to Text string data 4 095 characters max NUL D maximum 2 047 words 15 0 D to Area S1 S2 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A9...

Page 1038: ...lags Precautions If more than 4 095 characters are designated by S1 and S2 an error will be generated and the Error Flag will turn ON If 0000 hex is transferred to D the Equals Flag will turn ON Do not overlap the beginning word designated by D with the character data area for S2 If they overlap the instruction cannot be executed properly Example In this example 656 is used to connect the text str...

Page 1039: ...nd Specifications S1 Text string first word S2 Number of characters D First destination word LEFT 652 S1 S2 D Variations Executed Each Cycle for ON Condition LEFT 652 Executed Once for Upward Differentiation LEFT 652 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK O...

Page 1040: ... and the Error Flag will turn ON If 0000 hex is output to D the Equals Flag will turn ON Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_0000...

Page 1041: ... S1 the maximum 2 047 words and from D to D the maximum 2 047 words can overlap S1 S2 D00200 D D00300 43 44 Text string ABCDE Text string ABCD Four characters bytes read D S1 Text string first word S2 Number of characters D First destination word RGHT 653 S1 S2 D Variations Executed Each Cycle for ON Condition RGHT 653 Executed Once for Upward Differentiation RGHT 653 Executed Once for Downward Di...

Page 1042: ...it Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n ...

Page 1043: ...nds S1 Text String S2 Number of Characters 0000 to 0FFF hex or 0 to 4095 S3 Beginning Position 0001 to 0FFF hex or 1 to 4095 S1 S2 D00200 D Text string ABCDEF Text string CDEF Four characters bytes read S1 Text string first word S2 Number of characters S3 Beginning position D First destination word MID 654 S1 S2 S3 D Variations Executed Each Cycle for ON Condition MID 654 Executed Once for Upward ...

Page 1044: ... text string designated by S1 the string will be output up to the end Area S1 S2 S3 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to 32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect ...

Page 1045: ...ext string from within a text string Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON if more than 4 095 characters are designated by S1 ON if more than 4 095 characters 0FFF hex are desig nated by S2 ON if the S3 data is within the range of 1 to 4 095 0001 to 0FFF hex ON if S3 is greater than S1 OFF in all other cases Equals Flag ON if 0000 hex is output to ...

Page 1046: ...k Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in ...

Page 1047: ...le FIND 660 is used to find one character from within a text string 3 33 8 STRING LENGTH LEN 650 Purpose Calculates the length of a text string Ladder Symbol Variations Applicable Program Areas Found data Name Label Operation Error Flag ER ON if more than 4 095 characters are designated by S1 or S2 OFF in all other cases Equals Flag ON if 0000 hex is output to D OFF in all other cases S1 D00100 S2...

Page 1048: ...mum 2 047 words 15 0 S to Area S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 ...

Page 1049: ...on Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON if the calculated result comes to more than 4 095 characters OFF in all other cases Equals Flag ON if the calculated result is 0 OFF in all other cases S D D00200 Text string ABCDE 41 43 45 42 44 00 S1 Text string first word S2 Replacement text string first word S3 Number of characters S4 Beginning position ...

Page 1050: ...xt string data 4 095 characters max NUL S1 maximum 2 047 words 15 0 S1 to Text string data 4 095 characters max NUL S2 maximum 2 047 words to 15 0 S2 Text string data 4 095 characters max NUL S2 maximum 2 047 words to 15 0 D Area S1 S2 S3 S4 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T000...

Page 1051: ... number of characters for S1 or S2 is 4 095 0FFF hex If there are more than that i e if there is no NUL before the 4 096th character an error will be generated and the Error Flag will turn ON The range for the beginning position designated by S4 is the 1st to the 4 095th character 0001 to 0FFF hex If the setting is outside of this range an error will be generated and the Error Flag will turn ON If...

Page 1052: ...bol Variations Applicable Program Areas Operands S1 Text String S1 S3 D00300 D2 D00200 D D4 D00500 Text string ABCDEFGHI Text string ABCDHI From 5th byte Text string M Three characters replaced S1 Text string first word S2 Number of characters S3 Beginning position D First destination word DEL 658 S1 S2 S3 D Variations Executed Each Cycle for ON Condition DEL 658 Executed Once for Upward Different...

Page 1053: ...0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect...

Page 1054: ...Flag will turn ON If the number of characters to be deleted extends beyond the end of the S1 text string all of the characters up to the end will be deleted If all of the char acters from the beginning of S1 to the end are designated to be deleted then 000 hex will be output to D Example In this example DEL 658 is used to read three characters 3 33 11 EXCHANGE STRING XCHG 665 Purpose Replaces a de...

Page 1055: ...ediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Text string data 4 095 characters max NUL Ex1 maximum 2 047 words 15 0 Ex1 to Text string data 4 095 characters max NUL Ex2 maximum 2 047 words to 15 0 Ex2 Area Ex1 Ex2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448...

Page 1056: ...strings 3 33 12 CLEAR STRING CLR 666 Purpose Clears an entire text string with NUL 00 hex Ladder Symbol Variations Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Ex1 Ex2 Ex1 Ex1 Ex2 Ex2 Name Label Operation Error Flag ER ON if more than 4 095 characters are designated by...

Page 1057: ...K OK OK Text string data 4 095 characters max NUL S maximum 2 047 words 15 0 S to Area S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in bin...

Page 1058: ...l Operation Error Flag ER OFF S S S Text string ABCDE S1 Base text string first word S2 Inserted text string first word S3 Beginning position D First destination word INS 657 S1 S2 S3 D Variations Executed Each Cycle for ON Condition INS 657 Executed Once for Upward Differentiation INS 657 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Blo...

Page 1059: ...ng data 4 095 characters max NUL D maximum 2 047 words to 15 0 D Area S1 S2 S3 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM E...

Page 1060: ...4 095 0FFF hex If there are more than that i e if there is no NUL before the 4 096th character an error will be generated and the Error Flag will turn ON The range for the beginning position designated by S3 is 0 to 4 095 If the set ting is outside of this range an error will be generated and the Error Flag will turn ON If 0000 hex is output to D the Equals Flag will turn ON Do not overlap the des...

Page 1061: ...iations Applicable Program Areas Operands S1 Text String 1 S1 Text string 1 S2 Text string 2 Symbol S1 S2 LD Load S1 Text string 1 S2 Text string 2 Symbol S1 S2 AND Series Connection S1 Text string 1 S2 Text string 2 Symbol S1 S2 OR Parallel Connection Variations Creates ON Each Cycle Com parison is True String comparison instructions Immediate Refreshing Specification Not supported Block program ...

Page 1062: ...n ics listed below LD AND and OR do not appear in the ladder diagram LD AND OR LD AND OR LD AND OR Text string data 4 095 characters max NUL S2 maximum 2 047 words to 15 0 S2 Area S1 S2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area...

Page 1063: ... to fill in the difference and the compar ison will be made on that basis Comparison Examples AD 414400 hex and BC 424300 hex AD BC because at the beginning of the text strings 41 hex is less than 42 hex Mnemonic including function code Name Function LD 670 LOAD STRING EQUALS True when S1 text string equals S2 text string AND 670 AND STRING EQUALS OR 670 OR STRING EQUALS LD 671 LOAD STRING NOT EQU...

Page 1064: ...order Precautions Please a right hand instruction after these instructions The String Compari son Instructions cannot appear on the right side of the ladder diagram These instructions cannot be used on the last rung of a logic block The maximum number of characters that can be compared is 4 095 0FFF hex If that number is exceeded i e if there is no NUL before the 4 096th character an error will oc...

Page 1065: ...this example three text strings are rearranged in alphabetical order The original order is as follows D00100 Milk D00200 Juice D00300 Beer When rearranged alphabetically the order changes as follows beer juice milk Text string ABCD Text string ABC Text string ABC Text string ABC Address Mnemonic Operand 000000 000001 000002 000003 000004 ...

Page 1066: ...d D00300 are compared in ASCII order from lower to higher If the text string beginning with D00200 is higher in ASCII order than the one beginning with D00300 then the position of the two text strings will be reversed D00100 Milk Text string D00200 Juice D00300 Beer The milk and juice text strings are compared and their positions are reversed because M J Juice Milk Beer The milk and beer text stri...

Page 1067: ...The cyclic task or extra cyclic task specified in TKON 820 will be also be exe cutable in later cycles as long as it isn t put in standby status by TKOF 821 Any task can be made executable from any cyclic task although the specified task won t be executed until the next cycle if its task number is lower than the task number of the local task The task will be executed in the same cycle if its task ...

Page 1068: ...executed from the Programming Con sole however cyclic task 0 will automatically be made executable 2 If a task is in non executable status TKON 820 can executed to put that task into executable status Likewise a cyclic task in executable status can be put into non executable status with the TKOF 821 instruction 3 Cyclic tasks or extra cyclic tasks that were made executable will be put in executabl...

Page 1069: ...cuted in the same cycle when program execution reaches task number 3 Name Addresses Operation Task Flags TK00 to TK31 These flags are turned ON when the corresponding cyclic task is executable and they are OFF when the corresponding cyclic task is not executable or in standby status TK00 to TK31 correspond to cyclic task numbers 00 to 31 Task number 3 is executed in the same cycle 03 Task 1 Task 3...

Page 1070: ...ds N Task number The allowed range for N depends on the kind of task being specified Cyclic tasks N must be a constant between 0 and 31 decimal Values 0 to 31 specify cyclic tasks 0 to 31 Extra cyclic tasks CS1 H CJ1 H and CJ1M CPU Units only N must be a constant between 8000 and 8255 decimal Values 8000 to 8255 specify extra cyclic tasks 0 to 255 Task number 1 is executed in the next cycle Task 1...

Page 1071: ...Programmer s General Properties Tab for each task has a setting the Operation start box that specifies whether the cyclic task will be exe cutable at startup When the Operation start box has been checked the corresponding cyclic task will be put in executable status automatically when the PLC begins operation All other cyclic tasks will be in non exe cutable status If the memory all clear operatio...

Page 1072: ...tion can be placed in interrupt tasks as well as in cyclic tasks Flags The specified task s task number is higher than the local task s task number m n The specified task s task number is lower than the local task s task number m n Task m Task n In standby status that cycle Task n Task m In standby status the next cycle Name Label Operation Error Flag ER ON if N is not a constant between 00 and 31...

Page 1073: ...ing an Earlier Task When CIO 000000 is ON in the following example task number 1 is put into standby status in task number 3 Task number 1 will be not be executed in the next cycle when program execution reaches task number 1 Task number 3 is in standby status in the same cycle i e it is not executed in the current or following cycles 03 Task 1 Task 3 Task number 1 is in standby status in the next...

Page 1074: ...nt Instructions 1070 4 1 15 Table Data Processing Instructions 1071 4 1 16 Data Control Instructions 1073 4 1 17 Subroutine Instructions 1073 4 1 18 Interrupt Control Instructions 1074 4 1 19 Step Instructions 1074 4 1 20 Basic I O Unit Instructions 1075 4 1 21 Serial Communications Instructions 1076 4 1 22 Network Instructions 1076 4 1 23 File Memory Instructions 1076 4 1 24 Display Instructions ...

Page 1075: ...rupt Control Instructions 1100 4 2 19 High speed Counter and Pulse Output Instructions 1101 4 2 20 Step Instructions 1102 4 2 21 Basic I O Unit Instructions 1102 4 2 22 Serial Communications Instructions 1103 4 2 23 Network Instructions 1103 4 2 24 File Memory Instructions 1103 4 2 25 Display Instructions 1104 4 2 26 Clock Instructions 1104 4 2 27 Debugging Instructions 1104 4 2 28 Failure Diagnos...

Page 1076: ...each of the CS series instructions varies from 1 to 7 steps depending upon the instruction and the operands used with it The number of steps in a pro gram is not the same as the number of instructions Note 1 Program capacity for CS series PLCs is measured in steps whereas pro gram capacity for previous OMRON PLCs such as the C series and CV series PLCs was measured in words Basically speaking 1 st...

Page 1077: ...2 0 04 0 04 0 08 AND NOT See note 2 2 21 14 21 16 21 16 21 16 Increase for CS Series 45 1 45 1 45 1 45 1 Increase for C200H See note 3 OR OR 1 0 02 0 04 0 04 0 08 OR See note 2 2 21 14 21 16 21 16 21 16 Increase for CS Series 45 1 45 1 45 1 45 1 Increase for C200H See note 3 OR NOT OR NOT 1 0 02 0 04 0 04 0 08 OR NOT See note 2 2 21 14 21 16 21 16 21 16 Increase for CS Series 45 1 45 1 45 1 45 1 I...

Page 1078: ...9 3 49 3 49 3 Increase for C200H See note 3 KEEP KEEP 011 1 0 06 0 08 0 25 0 29 DIFFERENTI ATE UP DIFU 013 2 0 24 0 40 0 46 0 54 DIFFERENTI ATE DOWN DIFD 014 2 0 24 0 40 0 46 0 54 SET SET 1 0 02 0 06 0 17 0 21 SET See note 2 2 21 37 21 37 21 37 21 37 Increase for CS Series 49 3 49 3 49 3 49 3 Increase for C200H See note 3 RESET RSET 1 0 02 0 06 0 17 0 21 Word specified RSET See note 2 2 21 37 21 3...

Page 1079: ...CLEAR ILC 003 1 0 06 0 06 0 12 0 12 JUMP JMP 004 2 0 38 0 48 8 1 8 1 JUMP END JME 005 2 CONDI TIONAL JUMP CJP 510 2 0 38 0 48 7 4 7 4 When JMP con dition is satisfied CONDI TIONAL JUMP NOT CJPN 511 2 0 38 0 48 8 5 8 5 When JMP con dition is satisfied MULTIPLE JUMP JMP0 515 1 0 06 0 06 0 12 0 12 MULTIPLE JUMP END JME0 516 1 0 06 0 06 0 12 0 12 FOR LOOP FOR 512 2 0 52 0 54 0 12 0 21 Designating a co...

Page 1080: ...IMER MTIM 543 4 20 9 23 3 26 0 26 0 5 6 5 8 7 8 7 8 When resetting MTIMX 554 4 20 9 23 3 5 6 5 8 When resetting REVERSIBLE COUNTER CNTR 012 3 16 9 19 0 20 9 20 9 CNTRX 548 3 16 9 19 0 RESET TIMER COUN TER CNR 545 3 9 9 10 6 13 9 13 9 When resetting 1 word 4 16 ms 4 16 ms 5 42 ms 5 42 ms When resetting 1 000 words CNRX 547 3 9 9 10 6 When resetting 1 word 4 16 ms 4 16 ms When resetting 1 000 words ...

Page 1081: ... LD AND OR SL 303 4 0 10 0 16 6 50 6 50 LD AND OR SL 308 LD AND OR SL 313 LD AND OR SL 318 LD AND OR SL 323 LD AND OR SL 328 COMPARE CMP 020 3 0 04 0 04 0 17 0 29 CMP See note 2 020 7 42 1 42 1 42 4 42 4 Increase for CS Series 90 4 90 4 90 5 90 5 Increase for C200H See note 3 DOUBLE COMPARE CMPL 060 3 0 08 0 08 0 25 0 46 SIGNED BINARY COM PARE CPS 114 3 0 08 0 08 6 50 6 50 CPS See note 2 114 7 35 ...

Page 1082: ...nic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU6 CPU4 MOVE MOV 021 3 0 18 0 20 0 25 0 29 MOV See note 2 021 7 21 38 21 40 42 36 42 36 Increase for CS Series 90 52 90 52 90 52 90 52 Increase for C200H See note 3 DOUBLE MOVE MOVL 498 3 0 32 0 34 0 42 0 50 MOVE NOT MVN 022 3 0 18 0 20 0 25 0 29 DOUBLE MOVE NOT MVNL 499 3 0 32 0 34 0 42 0 50 MOVE BIT MOVB 082 4 0 24 0 ...

Page 1083: ...PU4 H CPU6 CPU4 SHIFT REGISTER SFT 010 3 7 4 10 4 10 4 10 4 Shifting 1 word 433 2 488 0 763 1 763 1 Shifting 1 000 words REVERSIBLE SHIFT REGISTER SFTR 084 4 6 9 7 2 9 6 9 6 Shifting 1 word 615 3 680 2 859 6 859 6 Shifting 1 000 words ASYNCHRO NOUS SHIFT REGISTER ASFT 017 4 6 2 6 4 7 7 7 7 Shifting 1 word 1 22 ms 1 22 ms 2 01 ms 2 01 ms Shifting 1 000 words WORD SHIFT WSFT 016 4 4 5 4 7 7 8 7 8 Sh...

Page 1084: ...0 5 10 5 Shifting 1 bit 40 3 45 4 55 5 55 5 Shifting 1 000 bits SHIFT N BIT DATA RIGHT NSFR 579 4 7 5 8 3 10 5 10 5 Shifting 1 bit 50 5 55 3 69 3 69 3 Shifting 1 000 bits SHIFT N BITS LEFT NASL 580 3 0 22 0 32 0 29 0 37 DOUBLE SHIFT N BITS LEFT NSLL 582 3 0 40 0 56 0 50 0 67 SHIFT N BITS RIGHT NASR 581 3 0 22 0 32 0 29 0 37 DOUBLE SHIFT N BITS RIGHT NSRL 583 3 0 40 0 56 0 50 0 67 Instruction Mnemo...

Page 1085: ...0 20 0 25 0 37 DOUBLE SIGNED BINARY ADD WITH OUT CARRY L 401 4 0 32 0 34 0 42 0 54 SIGNED BINARY ADD WITH CARRY C 402 4 0 18 0 20 0 25 0 37 DOUBLE SIGNED BINARY ADD WITH CARRY CL 403 4 0 32 0 34 0 42 0 54 BCD ADD WITHOUT CARRY B 404 4 8 2 8 4 14 0 14 0 DOUBLE BCD ADD WITHOUT CARRY BL 405 4 13 3 14 5 19 0 19 0 BCD ADD WITH CARRY BC 406 4 8 9 9 1 14 5 14 5 DOUBLE BCD ADD WITH CARRY BCL 407 4 13 8 15...

Page 1086: ... CARRY BCL 417 4 13 4 14 7 18 8 18 8 SIGNED BINARY MULTIPLY 420 4 0 38 0 40 0 50 0 58 DOUBLE SIGNED BINARY MULTIPLY L 421 4 7 23 8 45 11 19 11 19 UNSIGNED BINARY MULTIPLY U 422 4 0 38 0 40 0 50 0 58 DOUBLE UNSIGNED BINARY MULTIPLY UL 423 4 7 1 8 3 10 63 10 63 BCD MULTI PLY B 424 4 9 0 9 2 12 8 12 8 DOUBLE BCD MULTI PLY BL 425 4 23 0 24 2 35 2 35 2 SIGNED BINARY DIVIDE 430 4 0 40 0 42 0 75 0 83 DOU...

Page 1087: ...O BCD BCD 024 3 0 24 0 26 8 3 8 3 DOUBLE BINARY TO DOUBLE BCD BCDL 059 3 6 7 7 0 9 2 9 2 2 S COM PLEMENT NEG 160 3 0 18 0 20 0 25 0 29 DOUBLE 2 S COM PLEMENT NEGL 161 3 0 32 0 34 0 42 0 5 16 BIT TO 32 BIT SIGNED BINARY SIGN 600 3 0 32 0 34 0 42 0 50 DATA DECODER MLPX 076 4 0 32 0 42 8 8 8 8 Decoding 1 digit 4 to 16 0 98 1 20 12 8 12 8 Decoding 4 dig its 4 to 16 3 30 4 00 20 3 20 3 Decoding 1 digit...

Page 1088: ...ormat set ting No 2 8 5 8 8 13 0 13 0 Data format set ting No 3 DOUBLE SIGNED BCD TO BINARY BISL 472 4 9 2 9 6 13 6 13 6 Data format set ting No 0 9 2 9 6 13 7 13 7 Data format set ting No 1 9 5 9 9 14 2 14 2 Data format set ting No 2 9 6 10 0 14 4 14 4 Data format set ting No 3 SIGNED BINARY TO BCD BCDS 471 4 6 6 6 9 10 6 10 6 Data format set ting No 0 6 7 7 0 10 8 10 8 Data format set ting No 1 ...

Page 1089: ...0 25 0 37 DOUBLE LOGICAL OR ORWL 611 4 0 32 0 34 0 42 0 54 EXCLUSIVE OR XORW 036 4 0 22 0 32 0 25 0 37 DOUBLE EXCLUSIVE OR XORL 612 4 0 32 0 34 0 42 0 54 EXCLUSIVE NOR XNRW 037 4 0 22 0 32 0 25 0 37 DOUBLE EXCLUSIVE NOR XNRL 613 4 0 32 0 34 0 42 0 54 COMPLE MENT COM 029 2 0 22 0 32 0 29 0 37 DOUBLE COMPLE MENT COML 614 2 0 40 0 56 0 50 0 67 Instruction Mnemonic Code Length steps See note ON execut...

Page 1090: ...DIVIDE F 457 4 8 7 9 9 12 0 12 0 FLOATING POINT MUL TIPLY F 456 4 8 0 9 2 10 5 10 5 DEGREESTO RADIANS RAD 458 3 10 1 10 2 14 9 14 9 RADIANS TO DEGREES DEG 459 3 9 9 10 1 14 8 14 8 SINE SIN 460 3 42 0 42 2 61 1 61 1 COSINE COS 461 3 31 5 31 8 44 1 44 1 TANGENT TAN 462 3 16 3 16 6 22 6 22 6 ARC SINE ASIN 463 3 17 6 17 9 24 1 24 1 ARC COSINE ACOS 464 3 20 4 20 7 28 0 28 0 ARC TAN GENT ATAN 465 3 16 1...

Page 1091: ...LE SYMBOL COMPARI SON LD AND OR D 335 3 8 5 10 3 LD AND OR D 336 LD AND OR D 337 LD AND OR D 338 LD AND OR D 339 LD AND OR D 340 DOUBLE FLOATING TO 16 BIT BINARY FIXD 841 3 11 7 12 1 DOUBLE FLOATING TO 32 BIT BINARY FIXLD 842 3 11 6 12 1 16 BIT BINARY TO DOUBLE FLOATING DBL 843 3 9 9 10 0 32 BIT BINARY TO DOUBLE FLOATING DBLL 844 3 9 8 10 0 DOUBLE FLOATING POINT ADD D 845 4 11 2 11 9 DOUBLE FLOATI...

Page 1092: ...57 3 47 4 47 9 DOUBLE EXPONENT EXPD 858 3 121 0 121 4 DOUBLE LOGARITHM LOGD 859 3 16 0 16 4 DOUBLE EXPONEN TIAL POWER PWRD 860 4 223 9 224 2 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU6 CPU4 SET STACK SSET 630 3 8 0 8 3 8 5 8 5 Designating 5 words in stack area 231 6 251 8 276 8 276 8 Designating 1 000 words in stack area PUSH ONTO STACK PUSH 6...

Page 1093: ...1 word 2 39 ms 3 36 ms 3 36 ms 3 36 ms Searching for 1 000 words FIND MINI MUM MIN 183 4 19 2 25 3 25 3 25 3 Searching for 1 word 2 39 ms 3 33 ms 3 33 ms 3 33 ms Searching for 1 000 words SUM SUM 184 4 28 2 38 5 38 5 38 3 Adding 1 word 1 42 ms 1 95 ms 1 95 ms 1 95 ms Adding 1 000 words FRAME CHECKSUM FCS 180 4 20 0 28 3 28 3 28 3 For 1 word table length 1 65 ms 2 48 ms 2 48 ms 2 48 ms For 1 000 wo...

Page 1094: ...1 3 141 3 Not sampling LIMIT CON TROL LMT 680 4 16 1 22 1 22 1 22 1 DEAD BAND CON TROL BAND 681 4 17 0 22 5 22 5 22 5 DEAD ZONE CON TROL ZONE 682 4 15 4 20 5 20 5 20 5 SCALING SCL 194 4 37 1 53 0 56 8 56 8 SCALING 2 SCL2 486 4 28 5 40 2 50 7 50 7 SCALING 3 SCL3 487 4 33 4 47 0 57 7 57 7 AVERAGE AVG 195 4 36 3 52 6 53 1 53 1 Average of an operation 291 0 419 9 419 9 419 9 Average of 64 operations P...

Page 1095: ...GLOBAL SUBROU TINE RETURN GSBS 750 2 0 86 1 60 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU6 CPU4 SET INTERRUPT MASK MSKS See note 2 690 3 25 6 38 4 39 5 39 5 READ INTER RUPT MASK MSKR See note 2 692 3 11 9 11 9 11 9 11 9 CLEAR INTER RUPT CLI See note 2 691 3 27 4 41 3 41 3 41 3 DISABLE INTER RUPTS DI 693 1 15 0 16 8 16 8 16 8 ENABLE INTER RUPTS...

Page 1096: ...efresh IN for C200H Basic I O Units 62 6 67 0 86 7 86 7 1 word refresh OUT for C200H Basic I O Units 15 5 See note 2 16 4 23 5 23 5 1 word refresh IN for CS series Basic I O Units 17 20 See note 3 18 40 25 6 25 6 1 word refresh OUT for CS series Basic I O Units 303 3 343 9 357 1 357 1 10 word refresh IN for C200H Basic I O Units 348 2 376 6 407 5 407 5 10 word refresh OUT for C200H Basic I O Units...

Page 1097: ... ing 0 words 134 2 189 6 305 9 305 9 Sending 249 words receiv ing 249 words TRANSMIT TXD 236 4 68 5 98 8 98 8 98 8 Sending 1 byte 734 3 1 10 ms 1 10 ms 1 10 ms Sending 256 bytes RECEIVE RXD 235 4 89 6 See note 2 131 1 131 1 131 1 Storing 1 byte 724 2 See note 3 1 11 ms 1 11 ms 1 11 ms Storing 256 bytes CHANGE SERIAL PORT SETUP STUP 237 3 341 2 400 0 440 4 440 4 Instruction Mnemonic Code Length ste...

Page 1098: ...ter directory file name in binary 833 3 See note 5 1 32 ms 1 36 ms 1 36 ms 73 character directory file name in binary Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU6 CPU4 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU6 CPU4 DISPLAY MESSAGE MSG 046 3 10 1 14 2 14 3 14 3 Displaying mes sage 8 4 11 3...

Page 1099: ...i ority 432 4 657 1 657 1 657 1 Deleting errors all errors 161 5 219 4 219 4 219 4 Deleting errors individually SEVERE FAILURE ALARM FALS 007 3 FAILURE POINT DETECTION FPD 269 4 140 9 202 3 202 3 202 3 When executed 163 4 217 6 217 6 217 6 First time 185 2 268 9 268 9 268 9 When executed 207 5 283 6 283 6 283 6 First time Instruction Mnemonic Code Length steps See note ON execution time µs Conditi...

Page 1100: ...AM PAUSE BPPS 811 2 10 6 12 3 14 9 14 9 BLOCK PROGRAM RESTART BPRS 812 2 5 1 5 6 8 3 8 3 CONDI TIONAL BLOCK EXIT Execution condition EXIT 806 1 10 0 11 3 12 9 12 9 EXIT condition satisfied 4 0 4 9 7 3 7 3 EXIT condition not satisfied CONDI TIONAL BLOCK EXIT EXIT bit address 806 2 6 8 13 5 16 3 16 3 EXIT condition satisfied 4 7 7 2 10 7 10 7 EXIT condition not satisfied CONDI TIONAL BLOCK EXIT NOT ...

Page 1101: ... 1 23 9 Normal execu tion HIGH SPEED TIMER WAIT TMHW 815 3 25 8 27 9 34 1 34 1 Default setting 20 6 22 7 28 9 28 9 Normal execu tion TMHWX 817 3 25 8 27 9 Default setting 20 6 22 7 Normal execu tion 9 3 10 8 LEND condition not satisfied Loop Control LOOP 809 1 7 9 9 1 12 3 12 3 Loop Control LEND exe cution condi tion 810 1 7 7 8 4 10 9 10 9 LEND condition satisfied 6 8 8 0 9 8 9 8 LEND condition n...

Page 1102: ...MIDDLE MID 654 5 56 5 84 6 230 2 230 2 Retrieving 1 character from 3 characters FIND IN STRING FIND 660 4 51 4 77 5 94 1 94 1 Searching for 1 character from 2 characters STRING LENGTH LEN 650 3 19 8 28 9 33 4 33 4 Detecting 1 character REPLACE IN STRING RPLC 661 6 175 1 258 7 479 5 479 5 Replacing the first of 2 charac ters with 1 char acter DELETE STRING DEL 658 5 63 4 94 2 244 6 244 6 Deleting t...

Page 1103: ...PLC would be 1 2 1 step per instruction For example if MOV is used MOVE instruction with immediate refreshing the program capacity of a CV series PLC would be 4 words per instruction and that of the CS series PLC would be 7 4 3 steps Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU6 CPU4 TASK ON TKON 820 2 19 5 26 3 26 3 26 3 TASK OFF TKOF 821 2 13 ...

Page 1104: ...e user program area for each of the CJ series instructions varies from 1 to 7 steps depending upon the instruction and the operands used with it The number of steps in a pro gram is not the same as the number of instructions Note 1 Program capacity for CJ series PLCs is measured in steps whereas pro gram capacity for previous OMRON PLCs such as the C series and CV series PLCs was measured in words...

Page 1105: ... 10 Increase for immediate refresh AND NOT AND NOT 1 0 02 0 04 0 08 0 10 AND NOT 2 21 14 21 16 21 16 24 10 Increase for immediate refresh OR OR 1 0 02 0 04 0 08 0 10 OR 2 21 14 21 16 21 16 24 10 Increase for immediate refresh OR NOT OR NOT 1 0 02 0 04 0 08 0 10 OR NOT 2 21 14 21 16 21 16 24 10 Increase for immediate refresh AND LOAD AND LD 1 0 02 0 04 0 08 0 05 OR LOAD OR LD 1 0 02 0 04 0 08 0 05 ...

Page 1106: ...esh RESET RSET 1 0 02 0 06 0 21 0 30 Word specified RSET 2 21 37 21 37 21 37 23 17 Increase for immediate refresh MULTIPLE BIT SET SETA 530 4 5 8 6 1 7 8 11 8 With 1 bit set 25 7 27 2 38 8 64 1 With 1 000 bit set MULTIPLE BIT RESET RSTA 531 4 5 7 6 1 7 8 11 8 With 1 bit reset 25 8 27 1 38 8 64 0 With 1 000 bit reset SINGLE BIT SET SETB 532 2 0 24 0 34 0 5 SETB 3 21 44 21 54 23 31 SINGLE BIT RESET ...

Page 1107: ...88 1 14 0 42 1 80 TIMHX 551 ONE MS TIMER TMHH 540 3 0 86 1 12 0 42 1 75 TMHHX 552 ACCUMULA TIVE TIMER TTIM 87 3 16 1 17 0 21 4 27 4 10 9 11 4 14 8 19 0 When resetting 8 5 8 7 10 7 15 0 When interlocking TTIMX 555 16 1 17 0 27 4 10 9 11 4 19 0 When resetting 8 5 8 7 15 0 When interlocking LONG TIMER TIML 542 4 7 6 10 0 12 8 16 3 6 2 6 5 7 8 13 8 When interlocking TIMLX 553 7 6 10 0 16 3 6 2 6 5 13 ...

Page 1108: ...ions CPU6 H CPU4 H CPU4 CJ1M Input Compari son Instructions unsigned LD AND OR 300 4 0 10 0 16 0 37 0 35 LD AND OR 305 LD AND OR 310 LD AND OR 315 LD AND OR 320 LD AND OR 325 Input Compari son Instructions double unsigned LD AND OR L 301 4 0 10 0 16 0 54 0 35 LD AND OR L 306 LD AND OR L 311 LD AND OR L 316 LD AND OR L 321 LD AND OR L 326 Input Compari son Instructions signed LD AND OR S 302 4 0 10...

Page 1109: ...E COM PARE CMPL 60 3 0 08 0 08 0 46 0 50 SIGNED BINARY COM PARE CPS 114 3 0 08 0 08 6 50 0 30 CPS 114 7 35 9 35 9 42 4 45 2 Increase for immedi ate refresh DOUBLE SIGNED BINARY COM PARE CPSL 115 3 0 08 0 08 6 50 0 50 TABLE COM PARE TCMP 85 4 14 0 15 2 21 9 29 77 MULTIPLE COMPARE MCMP 19 4 20 5 22 8 31 2 45 80 UNSIGNED BLOCK COM PARE BCMP 68 4 21 5 23 7 32 6 47 93 EXPANDED BLOCK COM PARE BCMP2 502 ...

Page 1110: ...00 1 380 1 633 5 650 2 Transferring 1 000 words BLOCK SET BSET 71 4 0 26 0 28 8 5 0 55 Setting 1 word 200 1 220 1 278 3 400 2 Setting 1 000 words DATA EXCHANGE XCHG 73 3 0 40 0 56 0 7 0 80 DOUBLE DATA EXCHANGE XCGL 562 3 0 76 1 04 1 3 1 5 SINGLE WORD DISTRIBUTE DIST 80 4 5 1 5 4 7 0 6 6 DATA COLLECT COLL 81 4 5 1 5 3 7 1 6 5 MOVE TO REG ISTER MOVR 560 3 0 08 0 08 0 50 0 60 MOVE TIMER COUNTER PV TO...

Page 1111: ...THOUT CARRY RRNC 575 2 0 22 0 32 0 37 0 45 DOUBLE ROTATE RIGHT WITHOUT CARRY RRNL 577 2 0 40 0 56 0 67 0 80 ONE DIGIT SHIFT LEFT SLD 74 3 5 9 6 1 8 2 7 6 Shifting 1 word 561 1 626 3 760 7 1 15 ms Shifting 1 000 words ONE DIGIT SHIFT RIGHT SRD 75 3 6 9 7 1 8 7 8 6 Shifting 1 word 760 5 895 5 1 07 ms 1 72 ms Shifting 1 000 words SHIFT N BIT DATA LEFT NSFL 578 4 7 5 8 3 10 5 14 8 Shifting 1 bit 40 3 ...

Page 1112: ...ENT BINARY L 593 2 0 40 0 56 0 67 0 80 INCREMENT BCD B 594 2 6 4 4 5 7 4 12 3 DOUBLE INCREMENT BCD BL 595 2 5 6 4 9 6 1 9 24 DECREMENT BCD B 596 2 6 3 4 6 7 2 11 9 DOUBLE DEC REMENT BCD BL 597 2 5 3 4 7 7 1 9 0 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M SIGNED BINARY ADD WITHOUT CARRY 400 4 0 18 0 20 0 37 0 30 DOUBLE SIGNED BINARY ADD WI...

Page 1113: ...CT WITHOUT CARRY BL 415 4 12 8 14 0 18 2 23 2 BCD SUB TRACT WITH CARRY BC 416 4 8 5 8 6 13 8 19 1 DOUBLE BCD SUBTRACT WITH CARRY BCL 417 4 13 4 14 7 18 8 24 3 SIGNED BINARY MULTI PLY 420 4 0 38 0 40 0 58 0 65 DOUBLE SIGNED BINARY MULTI PLY L 421 4 7 23 8 45 11 19 13 17 UNSIGNED BINARY MULTI PLY U 422 4 0 38 0 40 0 58 0 75 DOUBLE UNSIGNED BINARY MULTI PLY UL 423 4 7 1 8 3 10 63 13 30 BCD MULTIPLY B...

Page 1114: ... 6 5 6 8 9 1 12 3 BINARY TO BCD BCD 024 3 0 24 0 26 8 3 7 62 DOUBLE BINARY TO DOUBLE BCD BCDL 059 3 6 7 7 0 9 2 10 6 2 S COM PLEMENT NEG 160 3 0 18 0 20 0 29 0 35 DOUBLE 2 S COMPLE MENT NEGL 161 3 0 32 0 34 0 5 0 60 16 BIT TO 32 BIT SIGNED BINARY SIGN 600 3 0 32 0 34 0 50 0 60 DATA DECODER MLPX 076 4 0 32 0 42 8 8 0 85 Decoding 1 digit 4 to 16 0 98 1 20 12 8 1 60 Decoding 4 digits 4 to 16 3 30 4 0...

Page 1115: ...Data format setting No 2 8 5 8 8 13 0 16 5 Data format setting No 3 DOUBLE SIGNED BCD TO BINARY BISL 472 4 9 2 9 6 13 6 18 4 Data format setting No 0 9 2 9 6 13 7 18 5 Data format setting No 1 9 5 9 9 14 2 18 6 Data format setting No 2 9 6 10 0 14 4 18 7 Data format setting No 3 SIGNED BINARY TO BCD BCDS 471 4 6 6 6 9 10 6 13 5 Data format setting No 0 6 7 7 0 10 8 13 8 Data format setting No 1 6 ...

Page 1116: ... 0 37 0 45 DOUBLE LOGI CAL OR ORWL 611 4 0 32 0 34 0 54 0 60 EXCLUSIVE OR XORW 036 4 0 22 0 32 0 37 0 45 DOUBLE EXCLUSIVE OR XORL 612 4 0 32 0 34 0 54 0 60 EXCLUSIVE NOR XNRW 037 4 0 22 0 32 0 37 0 45 DOUBLE EXCLUSIVE NOR XNRL 613 4 0 32 0 34 0 54 0 60 COMPLEMENT COM 029 2 0 22 0 32 0 37 0 45 DOUBLE COM PLEMENT COML 614 2 0 40 0 56 0 67 0 80 Instruction Mnemonic Code Length steps See note ON execu...

Page 1117: ...TI PLY F 456 4 8 0 9 2 10 5 13 2 DEGREES TO RADIANS RAD 458 3 10 1 10 2 14 9 15 9 RADIANS TO DEGREES DEG 459 3 9 9 10 1 14 8 15 7 SINE SIN 460 3 42 0 42 2 61 1 47 9 COSINE COS 461 3 31 5 31 8 44 1 41 8 TANGENT TAN 462 3 16 3 16 6 22 6 20 8 ARC SINE ASIN 463 3 17 6 17 9 24 1 80 3 ARC COSINE ACOS 464 3 20 4 20 7 28 0 25 3 ARC TANGENT ATAN 465 3 16 1 16 4 16 4 45 9 SQUARE ROOT SQRT 466 3 19 0 19 3 28...

Page 1118: ... D 340 DOUBLE FLOATING TO 16 BIT BINARY FIXD 841 3 11 7 12 1 16 1 DOUBLE FLOATING TO 32 BIT BINARY FIXLD 842 3 11 6 12 1 16 4 16 BIT BINARY TO DOUBLE FLOATING DBL 843 3 9 9 10 0 14 3 32 BIT BINARY TO DOUBLE FLOATING DBLL 844 3 9 8 10 0 16 0 DOUBLE FLOATING POINT ADD D 845 4 11 2 11 9 18 3 DOUBLE FLOATING POINT SUB TRACT D 846 4 11 2 11 9 18 3 DOUBLE FLOATING POINT MULTI PLY D 847 4 12 0 12 7 19 0 ...

Page 1119: ...stack area 231 6 251 8 276 8 426 5 Designating 1 000 words in stack area PUSH ONTO STACK PUSH 632 3 6 5 8 6 9 1 15 7 FIRST IN FIRST OUT FIFO 633 3 6 9 8 9 10 6 15 8 Designating 5 words in stack area 352 6 434 3 1 13 ms 728 0 Designating 1 000 words in stack area LAST IN FIRST OUT LIFO 634 3 7 0 9 0 9 9 16 6 DIMENSION RECORD TABLE DIM 631 5 15 2 21 6 142 1 27 8 SET RECORD LOCATION SETR 635 4 5 4 5 ...

Page 1120: ...42 4 8 6 10 6 19 3 354 0 436 0 732 0 For 1 000 word table Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M PID CONTROL PID 190 4 436 2 678 2 678 2 612 0 Initial execution 332 3 474 9 474 9 609 3 Sampling 97 3 141 3 141 3 175 3 Not sampling LIMIT CON TROL LMT 680 4 16 1 22 1 22 1 27 1 DEAD BAND CONTROL BAND 681 4 17 0 22 5 22 5 27 4 DEAD ZONE C...

Page 1121: ...th steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M SUBROUTINE CALL SBS 91 2 1 26 1 96 17 0 2 04 SUBROUTINE ENTRY SBN 92 2 SUBROUTINE RETURN RET 93 1 0 86 1 60 20 60 1 80 MACRO MCRO 99 4 23 3 23 3 23 3 47 9 GLOBAL SUBROUTINE CALL GSBN 751 2 GLOBAL SUBROUTINE ENTRY GRET 752 1 1 26 1 96 2 04 GLOBAL SUBROUTINE RETURN GSBS 750 2 0 86 1 60 1 80 Instruction Mnemonic Code Length ste...

Page 1122: ...V READ PRV 881 4 42 40 Reading pulse out put PV 53 40 Reading high speed counter PV 33 60 Reading PV of counter in interrupt input mode 38 80 Reading pulse out put status 39 30 Reading high speed counter status 38 30 Reading PWM 891 status 117 73 Reading high speed counter range com parison results 48 20 Reading frequency of high speed counter 0 COMPARISON TABLE LOAD CTBL 882 4 238 0 Registering t...

Page 1123: ...ps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M STEP DEFINE STEP 008 2 17 4 20 7 27 1 35 9 Step control bit ON 11 8 13 7 24 4 13 8 Step control bit OFF STEP START SNXT 009 2 6 6 7 3 10 0 12 1 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M I O REFRESH IORF 097 3 15 5 16 4 23 5 26 7 1 word refresh IN for Basic I O Units 319...

Page 1124: ...s TRANSMIT TXD 236 4 68 5 98 8 98 8 109 3 Sending 1 byte 734 3 1 10 ms 1 10 ms 1 23 ms Sending 256 bytes RECEIVE RXD 235 4 89 6 131 1 131 1 144 0 Storing 1 byte 724 2 1 11 ms 1 11 ms 1 31 ms Storing 256 bytes CHANGE SERIAL PORT SETUP STUP 237 3 341 2 400 0 440 4 504 7 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M NETWORK SEND SEND 090 4 84 ...

Page 1125: ...n time µs Conditions CPU6 H CPU4 H CPU4 CJ1M DISPLAY MES SAGE MSG 046 3 10 1 14 2 14 3 16 8 Displaying message 8 4 11 3 11 3 14 7 Deleting displayed message Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M CALENDAR ADD CADD 730 4 38 3 201 9 209 5 217 0 CALENDAR SUB TRACT CSUB 731 4 38 6 170 4 184 1 184 7 HOURS TO SECONDS SEC 065 3 21 4 29 3 35...

Page 1126: ...61 5 219 4 219 4 265 7 Deleting errors individu ally SEVERE FAILURE ALARM FALS 007 3 FAILURE POINT DETECTION FPD 269 4 140 9 202 3 202 3 220 7 When executed 163 4 217 6 217 6 250 3 First time 185 2 268 9 268 9 220 7 When executed 207 5 283 6 283 6 320 7 First time Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M SET CARRY STC 040 1 0 06 0 06 0...

Page 1127: ...n not satisfied Branching IF execu tion condi tion 802 1 4 6 4 8 7 2 6 8 IF true 6 7 7 3 10 9 12 2 IF false Branching IF relay number 802 2 6 8 7 2 10 4 11 0 IF true 9 0 9 6 14 2 16 5 IF false Branching NOT IF NOT relay num ber 802 2 7 1 7 6 10 9 11 5 IF true 9 2 10 1 14 7 16 8 IF false Branching ELSE 803 1 6 2 6 7 9 9 11 4 IF true 6 8 7 7 11 2 13 4 IF false Branching IEND 804 1 6 9 7 7 11 0 13 5 ...

Page 1128: ...ER WAIT TIMW 813 3 22 3 25 2 33 1 47 4 Default setting 24 9 27 8 35 7 46 2 Normal execu tion TIMWX 816 3 22 3 25 2 33 1 47 4 Default setting 24 9 27 8 35 7 46 2 Normal execu tion Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU6 H CPU4 H CPU4 CJ1M MOV STRING MOV 664 3 45 6 66 0 84 3 79 3 Transferring 1 charac ter CONCATE NATE STRING 656 4 86 5 126 0 167 8 152 0 1...

Page 1129: ...NG CLR 666 2 23 8 36 0 37 8 42 0 Clearing 1 character INSERT INTO STRING INS 657 5 136 5 200 6 428 9 204 0 Inserting 1 character after the first of 2 char acters String Compari son Instructions LD AND OR 670 4 48 5 69 8 86 2 79 9 Comparing 1 charac ter with 1 character LD AND OR 671 LD AND OR 672 LD AND OR 674 LD AND OR 675 Instruction Mnemonic Code Length steps See note ON execution time µs Condi...

Page 1130: ...f the previous PLC would be 2 words per instruction and that of the CJ series PLC would be 1 2 1 step per instruction For example if MOV is used MOVE instruction with immediate refreshing the program capacity of a CV series PLC would be 4 words per instruction and that of the CJ series PLC would be 7 4 3 steps CJ series steps a words of previous PLC n Instructions Variations Value of n when conver...

Page 1131: ...1110 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...

Page 1132: ...twork instruction execution times 1076 1103 receiving from RS 232C port 858 serial communications instructions 84 842 866 transmitting from RS 232C port 853 comparing tables 777 comparison 777 comparison instructions execution times 1088 Condition Flags loading status 967 saving status 965 control bits Sampling Start Bit 932 Trace Start Bit 932 conversion instructions execution times 1067 1094 con...

Page 1133: ...condition outputting 184 execution times 1053 1055 1109 exponents 552 608 extra cyclic tasks 1045 1049 F G failure diagnosis instructions execution times 1078 1105 fatal operating errors generating and clearing 942 file memory file memory instructions 86 897 913 instruction execution times 1076 1103 file memory instructions execution times 1076 1103 FINS commands 890 sending commands to local CPU ...

Page 1134: ...L 405 382 C 402 377 CL 403 379 D 845 583 F 454 527 583 L 401 375 430 417 B 434 425 BL 435 427 D 848 589 F 457 533 L 431 419 U 432 421 UL 433 423 ACC 888 795 ACOS 464 546 602 ACOSD 855 602 AND 146 AND LD 153 AND NOT 148 ANDL 610 476 ANDW 034 474 APR 069 497 ASC 086 449 ASIN 463 544 600 ASIND 854 600 ATAN 465 548 604 ATAND 856 604 AVG 195 716 B 414 398 B 596 368 BAND 681 698 BC 416 403 BCD 024 432 B...

Page 1135: ...TL 453 525 581 FOR 512 201 FREAD 700 899 FRMCV 284 968 FSTR 448 561 FVAL 449 566 FWRIT 701 906 GETR 636 640 GRET 752 743 GSBN 751 740 GSBS 750 732 HEX 162 453 HMS 066 925 IL 002 187 191 ILC 003 187 191 INI 880 769 INS 657 1037 IORD 222 831 IORF 097 825 IORS 288 978 IOSP 287 976 IOWR 223 834 JME 005 191 JME0 516 199 JMP 004 191 JMP0 515 199 KEEP 011 168 L 411 389 L 593 362 LD 142 LD NOT 144 LEFT 65...

Page 1136: ...CV 285 972 TRSM 045 930 TST 350 163 TSTN 351 163 TTIM 087 219 TXD 236 853 UP 521 162 WDT 094 963 XCGL 562 298 XCHG 665 1033 XCHG 073 297 XFER 070 292 XFRB 062 290 XNRL 613 486 XNRW 037 485 XORL 612 483 XORW 036 481 ZCP 088 274 ZCPL 116 277 ZONE 682 701 instructions 129 245 Basic I O Unit instructions 82 825 837 block programming instructions 91 978 1011 classified by function 16 clock instructions...

Page 1137: ...ams controlling bit status using DIFU 013 and DIFD 014 173 175 using KEEP 011 168 172 using SET and RSET 175 177 using SETA 530 and RSTA 531 177 180 184 latching relays using KEEP 011 168 logarithm 554 610 logic instructions execution times 1068 1095 loops BREAK 514 204 FOR 512 and NEXT 513 201 M O mathematics adding a range of words 653 averaging 716 exponents 552 608 finding the maximum in a ran...

Page 1138: ...lating system errors 934 935 942 Single precision Floating point Input Comparison Instructions 557 Special I O Units reading Unit memory 831 writing Unit memory 834 special math instructions execution times 1068 1095 speed outputs 781 square root BCD data 493 floating point data 550 606 signed binary data See also mathematics stack instructions 617 execution times 1071 1098 stack processing execut...

Page 1139: ...s arc cosine 546 602 arc sine 544 600 arc tangent 548 604 converting degrees to radians 535 591 converting radians to degrees 536 593 cosine 540 596 sine 538 594 tangent 542 598 U W unsigned binary data 10 watchdog timer extending 963 ...

Page 1140: ...s as follows Pages 169 and 170 Precaution related to the cycle time deleted Pages 176 180 183 186 196 199 743 746 and 749 Timer number counter number and set value indications corrected Pages 189 and 192 PV and SV range indications corrected Pages 209 and 210 Ladder program modified and caution deleted Page 342 Description about the CLEAR CARRY instruction deleted from precautions Page 395 ON cond...

Page 1141: ...te added to example Pages 648 and 651 First entry for error flag changed Page 666 Bit numbers corrected in table Page 701 Graphic for R 1 changed Pages 728 to 748 Instructions reworked Pages 787 814 816 to 832 Information added on automatic port allocation Pages 820 and 825 Precautions added Page 833 Precautions on using Memory Cards added Page 873 Bottom half of page modified 08 September 2002 Ma...

Page 1142: ...eadquarters OMRON EUROPE B V Wegalaan 67 69 NL 2132 JD Hoofddorp The Netherlands Tel 31 2356 81 300 Fax 31 2356 81 388 OMRON ELECTRONICS LLC 1 East Commerce Drive Schaumburg IL 60173 U S A Tel 1 847 843 7900 Fax 1 847 843 8568 OMRON ASIA PACIFIC PTE LTD 83 Clemenceau Avenue 11 01 UE Square Singapore 239920 Tel 65 6835 3011 Fax 65 6835 2711 ...

Page 1143: ...Authorized Distributor Cat No W340 E1 08 Note Specifications subject to change without notice Printed in Japan ...

Page 1144: ...CS CJ series CS1G H CPU EV1 CS1G H CPU H CS1D CPU H CJ1G CPU CJ1G H CPU H CJ1M CPU PCs INSTRUCTIONS REFERENCE MANUAL Cat No W340 E1 08 ...

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