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224
Timer and Counter Instructions
Section 3-6
Description
TIML(542)/TIMLX(553) is a decrementing ON-delay timer with units of 0.1-s
that uses an 8-digit SV and an 8-digit PV.
When the timer input is OFF, the timer is reset, i.e., the timer’s PV is reset to
the SV and its Completion Flag is turned OFF.
When the timer input goes from OFF to ON, TIML(542)/TIMLX(553) starts
decrementing the PV in D2+1 and D2. The PV will continue timing down as
long as the timer input remains ON and the timer’s Completion Flag will be
turned ON when the PV reaches 0000 0000.
The status of the timer’s PV and Completion Flag will be maintained after the
timer times out. To restart the timer, the timer input must be turned OFF and
then ON again or the timer’s PV must be changed to a non-zero value (by
MOV(021), for example).
Flags
EM Area with bank
En_00000 to
En_32767
(n = 0 to C)
En_00000 to En_32766
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
---
BCD:
#00000000 to
99999999 (BCD)
“&” cannot be
used.
Binary:
&00000000 to
&4294967294
(decimal) or
#00000000 to
#FFFFFFFF (hex)
Data Registers
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
Area
D1
D2
S
Timer input
Timer PV
SV
Completion Flag
(Bit 00 of D1)
Name
Label
Operation
Error Flag
ER
ON if the PV contained in D2+1 and D2 is not BCD.
ON if the SV contained in S+1 and S is not BCD.
OFF in all other cases.
Summary of Contents for CJ1G-CPUxx
Page 3: ...iv N o t i c e ...
Page 5: ...vi ...
Page 21: ...xxii Conformance to EC Directives 6 ...
Page 35: ......
Page 1131: ...1110 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...