![Omron CJ1G-CPUxx Instructions Manual Download Page 1029](http://html1.mh-extra.com/html/omron/cj1g-cpuxx/cj1g-cpuxx_instructions-manual_7424911029.webp)
1008
Block Programming Instructions
Section 3-32
Operand Specifications
Description
LOOP(809) designates the beginning of the loop program. LEND(810) or
LEND(810) NOT specifies the end of the loop. When LEND(810) or
LEND(810) NOT is reached, program execution will loop back to the next pre-
vious LOOP(809) until the operand bit for LEND(810) or LEND(810) NOT
turns ON or OFF (respectively) or until the execution condition for LEND(810)
turns ON.
Using an Execution Condition for LEND(810)
LEND(810) can be programmed either with or without an operand bit. If an
operand bit is not specified, an execution must be created before LEND(810)
starting with LD. If the execution condition is OFF, execution of the loop is
repeated starting with the next instruction after LOOP(809). If the execution
condition is ON, the loop is ended and execution continues to the next instruc-
tion after LEND(810).
Area
B
CIO Area
CIO 000000 to CIO 614315
Work Area
W00000 to W51115
Holding Bit Area
H00000 to H51115
Auxiliary Bit Area
A00000 to A44715
A44800 to A95915
Timer Area
T0000 to T4095
Counter Area
C0000 to C4095
Task Flags
TK0000 to TK0031
Condition Flags
ER, CY, >, =, <, N, OF, UF, >=, <>, <=, ON,OFF, AER
Clock Pulses
0.02 s, 0.1 s, 0.2 s, 1 s, 1 min
DM Area
---
EM Area without bank
---
EM Area with bank
---
Indirect DM/EM
addresses in binary
---
Indirect DM/EM
addresses in BCD
---
Constants
---
Data Registers
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Summary of Contents for CJ1G-CPUxx
Page 3: ...iv N o t i c e ...
Page 5: ...vi ...
Page 21: ...xxii Conformance to EC Directives 6 ...
Page 35: ......
Page 1131: ...1110 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...