1080
CS-series Instruction Execution Times and Number of Steps
Section 4-1
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
ONE
CYCLE AND
WAIT
WAIT (exe-
cution condi-
tion)
805
1
12.6
13.7
16.7
16.7
WAIT condition
satisfied
3.9
4.1
6.3
6.3
WAIT condition
not satisfied
ONE
CYCLE AND
WAIT
WAIT (relay
number)
805
2
12.0
13.4
16.5
16.5
WAIT condition
satisfied
6.1
6.5
9.6
9.6
WAIT condition
not satisfied
ONE
CYCLE AND
WAIT (NOT)
WAIT NOT
(relay num-
ber)
805
2
12.2
13.8
17.0
17.0
WAIT condition
satisfied
6.4
6.9
10.1
10.1
WAIT condition
not satisfied
COUNTER
WAIT
CNTW
814
4
17.9
22.6
27.4
27.4
Default setting
19.1
23.9
28.7
28.7
Normal execu-
tion
CNTWX
818
4
17.9
22.6
---
---
Default setting
19.1
23.9
---
---
Normal execu-
tion
HIGH-
SPEED
TIMER
WAIT
TMHW
815
3
25.8
27.9
34.1
34.1
Default setting
20.6
22.7
28.9
28.9
Normal execu-
tion
TMHWX
817
3
25.8
27.9
---
---
Default setting
20.6
22.7
---
---
Normal execu-
tion
9.3
10.8
---
---
LEND condition
not satisfied
Loop Control LOOP
809
1
7.9
9.1
12.3
12.3
---
Loop Control LEND (exe-
cution condi-
tion)
810
1
7.7
8.4
10.9
10.9
LEND condition
satisfied
6.8
8.0
9.8
9.8
LEND condition
not satisfied
Loop Control LEND (relay
number)
810
2
9.9
10.7
14.4
14.4
LEND condition
satisfied
8.9
10.3
13.0
13.0
LEND condition
not satisfied
Loop Control LEND NOT
(relay num-
ber)
810
2
10.2
11.2
14.8
14.8
LEND condition
satisfied
9.3
10.8
13.5
13.5
LEND condition
not satisfied
TIMER
WAIT
TIMW
813
3
22.3
25.2
33.1
33.1
Default setting
24.9
27.8
35.7
35.7
Normal execu-
tion
TIMWX
816
3
22.3
25.2
---
---
Default setting
24.9
27.8
---
---
Normal execu-
tion
Instruction
Mnemonic
Code
Length
(steps)
(See note.)
ON execution time (
µ
s)
Conditions
CPU6
@
H
CPU4
@
H
CPU6
@
CPU4
@
Summary of Contents for CJ1G-CPUxx
Page 3: ...iv N o t i c e ...
Page 5: ...vi ...
Page 21: ...xxii Conformance to EC Directives 6 ...
Page 35: ......
Page 1131: ...1110 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
