Omron CJ1G-CPUxx, Instructions Manual

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1074
CS-series Instruction Execution Times and Number of Steps Section 4-1
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
4-1-18 Interrupt Control Instructions
Note 1. When a double-length operand is used, add 1 to the value shown in the
length column in the following table.
2. These instructions are not supported by the CS1D CPU Units.
4-1-19 Step Instructions
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
GLOBAL SUBROU-
TINE ENTRY GRET 752 1 1.26 1.96 --- --- ---
GLOBAL SUBROU-
TINE RETURN GSBS 750 2 0.86 1.60 --- --- ---
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (
µ
s) Conditions
CPU6 @ H CPU4 @ H CPU6 @ CPU4 @
SET INTERRUPT
MASK MSKS
(See note 2.) 690 3 25.6 38.4 39.5 39.5 ---
READ INTER-
RUPT MASK MSKR
(See note 2.) 692 3 11.9 11.9 11.9 11.9 ---
CLEAR INTER-
RUPT CLI
(See note 2.) 691 3 27.4 41.3 41.3 41.3 ---
DISABLE INTER-
RUPTS DI 693 1 15.0 16.8 16.8 16.8 ---
ENABLE INTER-
RUPTS EI 694 1 19.5 21.8 21.8 21.8 ---
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (
µ
s) Conditions
CPU6 @ H CPU4 @ H CPU6 @ CPU4 @
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (
µ
s) Conditions
CPU6 @ H CPU4 @ H CPU6 @ CPU4 @
STEP
DEFINE STEP 008 2 17.4 20.7 27.1 27.1 Step control bit
ON
11.8 13.7 24.4 24.4 Step control bit
OFF
STEP
START SNXT 009 2 6.6 7.3 10.0 10.0 ---