Omron CJ1G-CPUxx, Instructions Manual

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Data Movement Instructions Section 3-8
Operand Specifications
Description MOVRW(561) finds the PLC memory address for the PV of the timer or
counter specified in S and writes that address in D (an Index Register).
MOVRW(561) will set the PLC memory address of the timer or counter’s PV in
D. Use MOVR(560) to set the PLC memory address of the timer or counter
Completion Flag.
Flags
Note In CS1 and CJ1 CPU Units, these Flags are turned OFF.
In CS1-H, CJ1-H, CJ1M, and CS1D CPU Units, these Flags are left
unchanged.
Precautions MOVRW(561) cannot set the PLC memory addresses of data area words,
bits, or timer/counter Completion Flags. Use MOVR(560) to set these PLC
memory addresses.
Area S D
CIO Area ---
Work Area ---
Holding Bit Area ---
Auxiliary Bit Area ---
Timer Area T0000 to T4095
(present value) ---
Counter Area C0000 to C4095
(present value) ---
DM Area ---
EM Area without bank ---
EM Area with bank ---
Indirect DM/EM
addresses in binary ---
Indirect DM/EM
addresses in BCD ---
Constants ---
Data Registers ---
Index Registers --- IR0 to IR15
Indirect addressing
using Index Registers ---
Internal I/O memory address of S
Index Register
Timer/counter PV only
Name Label Operation
Error Flag ER OFF or unchanged (See note.)
Equals Flag = OFF or unchanged (See note.)
Negative Flag N OFF or unchanged (See note.)