Omron CJ1G-CPUxx, Instructions Manual

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1066
CS-series Instruction Execution Times and Number of Steps Section 4-1
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
4-1-10 Conversion Instructions
DOUBLE
UNSIGNED
BINARY
DIVIDE /UL 433 4 6.9 8.1 9.1 9.1 ---
BCD DIVIDE /B 434 4 8.6 8.8 15.9 15.9 ---
DOUBLE
BCD DIVIDE /BL 435 4 17.7 18.9 26.2 26.2 ---
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (
µ
s) Conditions
CPU6 @ H CPU4 @ H CPU6 @ CPU4 @
BCD-TO-
BINARY BIN 023 3 0.22 0.24 0.25 0.29 ---
DOUBLE
BCD-TO-
DOUBLE
BINARY BINL 058 3 6.5 6.8 9.1 9.1 ---
BINARY-TO-
BCD BCD 024 3 0.24 0.26 8.3 8.3 ---
DOUBLE
BINARY-TO-
DOUBLE
BCD BCDL 059 3 6.7 7.0 9.2 9.2 ---
2’S COM-
PLEMENT NEG 160 3 0.18 0.20 0.25 0.29 ---
DOUBLE
2’S COM-
PLEMENT NEGL 161 3 0.32 0.34 0.42 0.5 ---
16-BIT TO
32-BIT
SIGNED
BINARY SIGN 600 3 0.32 0.34 0.42 0.50 ---
DATA
DECODER MLPX 076 4 0.32 0.42 8.8 8.8 Decoding 1 digit
(4 to 16)
0.98 1.20 12.8 12.8 Decoding 4 dig-
its (4 to 16)
3.30 4.00 20.3 20.3 Decoding 1 digit
8 to 256
6.50 7.90 33.4 33.4 Decoding 2 dig-
its (8 to 256)
DATA
ENCODER DMPX 077 4 7.5 7.9 10.4 10.4 Encoding 1 digit
(16 to 4)
49.6 50.2 59.1 59.1 Encoding 4 dig-
its (16 to 4)
18.2 18.6 23.6 23.6 Encoding 1 digit
(256 to 8)
55.1 57.4 92.5 92.5 Encoding 2 dig-
its (256 to 8)
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (
µ
s) Conditions
CPU6 @ H CPU4 @ H CPU6 @ CPU4 @