Model 4200A-SCS Parameter Analyzer Reference Manual
Section 6: Clarius
4200A-901-01 Rev. C / February 2017
6-337
Flash connection guidelines
All interconnects on instrument chassis are white SMA cables. Cables from the instrument to device
are BNC coaxial, except for the direct SMU4 connection, which is black triaxial. Use triaxial to BNC
adapters (if necessary) to connect to probe manipulators.
The trigger interconnects are white SMA cables. Cables from the instrument to device are BNC
coaxial for the pulse card channels and triaxial for the SMUs. Use triaxial to BNC adapters (if
necessary) to connect to probe manipulators.
To test on-wafer devices, there are various ways to connect the SMA cables to the probe
manipulators. For the direct connect method or switch method, adapters convert the BNC cabling to
the triaxial connector to be compatible with many types of probe manipulators.
Use the supplied torque wrench to tighten each connection as it is assembled. Always connect and
torque adapter/cable assemblies before attaching the assembly to the instrument cards.
Non-axial stress on the bulkhead connectors on the SMU or pulse cards could cause damage to the
cards installed in the 4200A-SCS chassis. Pre-torque the connections to prevent this damage.
To remove the LEMO triaxial-to-SMA adapter from a SMU, pull on the knurled silver portion of the
connector to release the latches from the SMU connector.
Failure to fully disengage the LEMO adapter latches may result in damage to the adapter and the
SMU.
Programming and erasing flash memory
A floating gate (FG) transistor is a modified field-effect transistor with an additional floating gate. The
FG transistor is the basic storage structure for data in nonvolatile memory. The floating gate stores
charge, which represents data in memory.
The control gate (CG) reads, programs, and erases the FG transistor. The presence of charge on the
gate shifts the voltage threshold (V
T
) to a higher voltage, as shown in the following figure.
Figure 393: Cross section of a floating gate transistor in the erased and programmed states
