Section 5: Pulse measure and pulse generator units
Model 4200A-SCS Parameter Analyzer Reference Manual
5-38
4200A-901-01 Rev. C / February 2017
Test considerations
The magnitude of the pulse steps affects overall test time. Wider pulses, a higher number of pulses,
and larger voltage steps at each sweep point, all increase the amount of time required for the LLEC
algorithm at each sweep point, which lengthens the overall test time.
There may be some high-gain devices that will not test properly with LLEC enabled. In this case, you
can disable LLEC. To disable LLEC in ITMs, see
(on page 5-39, on
page 5-40). For UTMs, see the
(on page 13-108) and
13-111) functions.
Figure 175: Curve showing poor LLEC compensation
LPT functions used to configure LLEC
The LPT functions used to configure LLEC for the PMU are:
•
(on page 13-145): Use this function to set the output impedance for the DUT when
LLEC is disabled. Setting the DUT resistance is useful when the DUT resistance is known and is
relatively constant
•
(on page 13-182): Use this function to set the number of iterations for the LLEC
algorithm or the tolerance window that determines if load-line effect compensation is reached.
The tolerance window is expressed as a percentage of the target voltage. The maximum number
of iterations sets the maximum number of iterations that will be attempted by the LLEC algorithm.
If the algorithm does not reach the target window, the measurements from last attempt will be
returned.
•
(on page 13-111): Use these functions
to enable or disable LLEC.
