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PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
TrueTouch Module
11.2.4
CS_CR3 Register
The TrueTouch Control Register 3 (CS_CR3) contains con-
trol bits primarily for the low pass filter and reference buffer.
Bit 6: REFMUX.
This bit selects between VREF and REFHI
for the reference buffer input.
Bit 5: REFMODE.
This bit is used for manual connection of
the reference buffer to the analog global bus. If either the
CI_EN or RO_EN bits are set high in the CS_CR2 register,
this bit has no effect.
Bit 4: REF_EN.
This bit enables the reference buffer to
drive to the analog global bus.
Bits 3 and 2: LPFilt[1:0].
These bits control the time con-
stant of the low pass filter that connect to the analog bus.
Bits 1 and 0: LPF_EN[1:0].
These bits are used to connect
a low pass filter into the input of either comparator channel.
For additional information, refer to the
.
11.2.5
CS_CNTL Register
The TrueTouch Counter Low Byte Register (CS_CNTL) con-
tains the current count for the low byte counter.
Bits 7 to 0: Data[7:0].
This value contains the current
count for the counter low block. Stop this block to read a
valid value.
For additional information, refer to the
.
11.2.6
CS_CNTH Register
The TrueTouch Counter High Byte Register (CS_CNTH)
contains the current count value for the high byte counter.
Bits 7 to 0: Data[7:0].
This value contains the current
count for the counter high block. Stop this block to read a
valid value.
For additional information, refer to the
.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Access
0,A3h
REFMUX
REFMODE
REF_EN
LPFilt[1:0]
LPF_EN[1:0]
RW : 00
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Access
0,A4h
Data[7:0]
RO : 00
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Access
0,A5h
Data[7:0]
RO : 00
Summary of Contents for PSoC CY8CTMG20 Series
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Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
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