Cypress PSoC CY8CTMG20 Series, Technical Reference Manual

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262 PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
USB_CR1
1,30h
21.4.4 USB_CR1
USB Control Register 1
This register is used to configure the internal regulator and the oscillator tuning capability.
This register is only used by the CY8CTMG20x, CY8CTST200 PSoC devices. In the table above, note that reserved bits are
grayed table cells and are not described in the bit description section below. Reserved bits must always be written with a
value of ‘0’. For additional information, refer to the
Register Definitions on page 171 in the Full-Speed USB chapter.
2 BusActivity Monitors activity on USB bus. This bit is only set by the hardware. Writing a ‘0’ clears this bit. Writing
a ‘1’ preserves its present state.
0 No
activity.
1 Non-idle activity (D+ = Low) was detected since the last time the bit was cleared.
1 EnableLock Controls the automatic tuning of the internal oscillator. Hardware locks the internal oscillator based on
the frequency of incoming USB data when this bit is set. Normally, this is set when the device is used
in a USB application.
0 Locking
disabled.
1 Locking enabled.
0 RegEnable Configures USB regulator for appropriate power supply range.
0
Pass through mode. Use for Vdd = 3.3V range.
1 Regulating mode. Use for Vdd = 5V range.
Individual Register Names and Addresses:
1,30h
USB_CR1 : 1,30h
7 6 5 4 3 2 1 0
Access : POR RC : 0 RW : 0 RW : 0
Bit Name BusActivity EnableLock RegEnable
Bit Name Description
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