PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
233
I2C_BUF
0,CFh
21.3.45 I2C_BUF
I
2
C Data Buffer Register
This register is the CPU read/write interface to the data buffer.
For additional information, refer to the
Register Definitions on page 122
in the I2C Slave chapter.
7:0
Data Buffer[7:0]
The I2C Data Buffer Register (I2C_BUF) is the CPU read/write interface to the data buffer. Whenever
this register is read, the data at the location pointed to by CPU current pointer (CPU_CP) is returned.
Similarly, whenever this register is written, the data is transferred to the buffer and written at the loca-
tion pointed to by the CPU current pointer (CPU_CP). Whenever this register is read without initializ-
ing the RAM contents either through the I2C or CPU interface, no valid value is returned.
Individual Register Names and Addresses:
0,CFh
I2C_BUF : 0,CFh
7
6
5
4
3
2
1
0
Access : POR
RW : 00
Bit Name
Data Buffer [7: 0]
Bit
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...
