88
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
TrueTouch Module
For typical capacitances, the IDAC current can be config-
ured so that the average voltage on the analog global does
not change. This can be done in firmware using a succes-
sive approximation to find the IDAC setting that causes the
global net to remain relatively stable for the load capaci-
tance. After this baseline is set, a small increase in sense
capacitance causes the global net to slowly discharge,
eventually crossing the comparator threshold. The config-
urable low pass filter is designed to filter the ripple on the
global net, leaving the average voltage that indicates capac-
itance change. Firmware can read the comparator state after
a pre-selected time to see if a large enough change has
occurred to trip the comparator in that time. This approach is
well suited to quickly detecting a capacitive button press.
Alternately, capacitance can be accurately measured by
going through the complete successive approximation pro-
cedure. The final IDAC setting gives a measurement of
capacitance.
The delay between starting the pin switching and reading
the comparator can be set by a firmware delay, or by using
the 6-bit counter in the TrueTouch logic to generate an inter-
rupt.
Figure 11-8. First Phase of Successive Approximation
Figure 11-9. Second Phase of Successive Approximation
11.1.1.4
Negative Charge Integration
The negative charge integration method operates by initial-
izing an integration capacitor to a positive voltage, then dis-
connecting this driver. The integration capacitor voltage
decays through connection with an external sense capacitor
that is continuously switched between ground and the inte-
gration capacitor. The number of cycles required to reduce
the voltage on the integration capacitor to a target value
gives a measure of the sense capacitance. See
The hardware supports the use of either pin P0[1] or P0[3]
for the external integration capacitor.
Vr
IDAC
Reference
Buffer
Ana
log G
lob
al
Bus
Comparator
Mux
Mux
Vr
LP
Filter
Closed
M8C Read
I
OUT
Conn. to
Ground
CSCLK
C
INTERNAL
CS1
CS2
CSN
Reference
Buffer
A
nal
og
G
lo
b
al
B
u
s
Comparator
Mux
Mux
Vr
LP
Filter
Closed
M8C Read
Conn. to
Bus
CSCLK
Vr
IDAC
I
OUT
C
INTERNAL
CS1
CS2
CSN
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
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Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
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