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PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
CPU_CP
0,CEh
21.3.44 CPU_CP
CPU Current Address Pointer Register
This register is a pointer into the RAM buffer for CPU reads and writes and is read only.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Always write reserved bits with a value of ‘0’. For additional information, refer to the
Register Definitions on page 122
in the
I2C Slave chapter.
4:0
CPU Current Pointer[4:0]
This register is set at the same time and with the same value to which the CPU_BP register is set.
Whenever the I2C_BUF register is written to or read from, the CPU_CP automatically increments
.
Individual Register Names and Addresses:
0,CEh
CPU_CP : 0,CEh
7
6
5
4
3
2
1
0
Access : POR
R : 00
Bit Name
CPU Current Pointer [4:0]
Bit
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
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