120
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
I2C Slave
by the external master through a write command and if the
pointer value exceeds 1Fh, a NACK is sent.
The following diagram illustrates the bus communication for a data write, a data pointer write, and a data read operation.
Remember that a data write operation always rewrites the data pointer.
Figure 15-4. Two-Wire Interface Bus Communication
A A A A A A A
6 5 4 3 2 1 0
R
W
S
A
A
D D D D D D D D
7 6 5 4 3 2 1 0
A
D D D D D D D D
7 6 5 4 3 2 1 0
A
D D D D D D D D
7 6 5 4 3 2 1 0
A P
A A A A A A A
6 5 4 3 2 1 0
S
A
A P
A A A A A A A
6 5 4 3 2 1 0
R
W
S
A
A
R R R R R R R R
7 6 5 4 3 2 1 0
A
D D D D D D D D
7 6 5 4 3 2 1 0
A
D D D D D D D D
7 6 5 4 3 2 1 0
A P
D D D D D D D D
7 6 5 4 3 2 1 0
R R R R R R R R
7 6 5 4 3 2 1 0
R R R R R R R R
7 6 5 4 3 2 1 0
R
W
Slave
Addr
Data
Address(n)
Data(n)
Data(n+1)
Data(n+x)
Data
Address(n)
Data(n)
Data(n+1)
Data(n+x)
Data(n+2)
Master
Slave
Legend
Slave
Addr
Slave
Addr
ACK
Wr
ite
Write
Wr
ite
St
op
NO
A
C
K
AC
K
Sto
p
AC
K
ACK
ACK
ACK
AC
K
ACK
ACK
AC
K
ACK
Sto
p
St
ar
t
St
ar
t
Sta
r
t
Write x Bytes to I2C Slave
Set Slave Data Pointer
Read x Bytes to I2C Slave
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...