PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
193
USB_SOF0
0,31h
21.3.6
USB_SOF0
USB Start-of-Frame Register 0
This register is a USB Start-of-Frame register 0.
For additional information, refer to the
Register Definitions on page 171
in the Full-Speed USB chapter.
7:0
Frame Number[7:0]
Contains the lower eight bits of the frame number.
Individual Register Names and Addresses:
0,31h
USB_SOF0 : 0,31h
7
6
5
4
3
2
1
0
Access : POR
R : 00
Bit Name
Frame Number[7:0]
Bit
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...