202
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
EPx_CNT1
0,41h
21.3.15 EPx_CNT1
Endpoint Count 1 Registers
These registers are endpoint count 1 registers.
For additional information, refer to the
Register Definitions on page 171
in the Full-Speed USB chapter.
7:0
Data Count[7:0]
These bits are the eight LSb of a 9-bit counter. The MSb is the Count MSb of the EPx_CNT0 register.
Individual Register Names and Addresses:
0,41h
EP1_CNT1 : 0,41h
EP2_CNT1 : 0,43h
EP3_CNT1 : 0,45h
EP4_CNT1 : 0,47h
EP5_CNT1 : 0,49h
EP6_CNT1 : 0,4Bh
EP7_CNT1 : 0,4Dh
EP8_CNT1 : 0,4Fh
7
6
5
4
3
2
1
0
Access : POR
RW : 00
Bit Name
Data Count[7:0]
Bit
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...
