256
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
IDAC_D
0,FDh
21.3.64 IDAC_D
Current DAC Data Register
This register specifies the 8-bit multiplying factor that determines the output IDAC current.
For additional information, refer to the
Register Definitions on page 92
in the TrueTouch Module chapter.
7:0
IDACDATA[7:0]
This is an 8-bit value that selects the number of current units that combine to form the IDAC current.
This current then drives the analog mux bus when IDAC mode is enabled. For example, a setting of
80h means that the charging current is 128 current units.
The current size also depends on the IRANGE setting in the CS_CR2 register. This setting supplies
the charging current for the relaxation oscillator. This current and the external capacitance connected
to the analog global bus determines the RO frequency.
This register is also used to set the charging current in the proximity detect mode.
Step size is approximately 330 nA/bit for default IRANGE state 00b.
00h
Smallest current.
.
.
.
FFh
Largest current.
Individual Register Names and Addresses:
0,FDh
IDAC_D : 0,FDh
7
6
5
4
3
2
1
0
Access : POR
RW : 00
Bit Name
IDACDATA[7:0]
Bits
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...
