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PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
ECO_TRIM
1,D3h
21.4.12 ECO_TRIM
External Oscillator Trim Register
This register trims the external oscillator gain and power settings.
These settings in this register should not be changed from their default state.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits must always be written with a value of ‘0’. For additional information, refer to the
in the I/O Analog Multiplexer chapter.
4:2
ECO_XGM[2:0]
These bits set the amplifier gain.
The high power mode setup size is approximately 220 nA.
The low power step size is approximately 5% lower than the 111 setting.
000
Lowest power setting.
111
Highest power setting.
1:0
ECO_LP[1:0]
These regulate low power mode settings.
00
Highest Power Setting.
11
Lowest power setting (30% power reduction).
Individual Register Names and Addresses:
1,D3h
ECO_TRIM : 1,D3h
7
6
5
4
3
2
1
0
Access : POR
RW : 4
RW : 1
Bit Name
ECO_XGM[2:0]
ECO_LP[1:0]
Bits
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
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