264
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
PMAx_RA
1,3Ch
21.4.6
PMAx_RA
PSoC Memory Arbiter Read Address Registers
These registers are PSoC Memory Arbiter read address registers.
For additional information, refer to the
Register Definitions on page 171
in the Full-Speed USB chapter.
7:0
ReadAddress[7:0]
The value returned when this register is read depends on whether the PMA channel is being used by
the USB SIE or by the M8C. In the USB case, this register always returns the beginning SRAM
address for the PMA channel.
Individual Register Names and Addresses:
1,3Ch
PMA0_RA : 1,3Ch
PMA1_RA : 1,3Dh
PMA2_RA : 1,3Eh
PMA3_RA : 1,3Fh
PMA4_RA : 1,40h
PMA5_RA : 1,41h
PMA6_RA : 1,42h
PMA7_RA : 1,43h
PMA8_RA : 1,4Ch
PMA9_RA : 1,4Dh
PMA10_RA : 1,4Eh
PMA11_RA : 1,4Fh
PMA12_RA : 1, 50h
PMA13_RA : 1,51h
PMA14_RA : 1,52h
PMA15_RA : 1,53h
7
6
5
4
3
2
1
0
Access : POR
RW : 00
Bit Name
Read Address[7:0]
Bit
Name
Description
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...