PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
181
Full-Speed USB
20.3.15 IMO_TR1 Register
INTERNAL Register
– The Internal Main Oscillator Trim
Register 1 (IMO_TR1) fine tunes the IMO frequency.
For information on the other IMO trim register (IMO_TR) see
the Internal Main Oscillator chapter or refer to the
in the Register Details chapter.
Bits 2 to 0: Fine Trim[2:0].
These bits provide a fine tuning
capability to the IMO trim. These three bits are the three LSb
of the IMO trim with the IMO_TR register supplying the eight
MSb.
For additional information, refer to the
20.3.16 Related Registers
■
USB_MISC_CR Register on page 112
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Access
1,FAh
IMO_TR1
Fine Trim[2:0]
RW : 00
Summary of Contents for PSoC CY8CTMG20 Series
Page 4: ...4 Contents Overview Feedback...
Page 26: ...26 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Section B PSoC Core Feedback...
Page 82: ...82 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Sleep and Watchdog Feedback...
Page 134: ...134 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C I2C Slave Feedback...
Page 142: ...142 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C System Resets Feedback...
Page 160: ...160 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C SPI Feedback...
Page 182: ...182 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Full Speed USB Feedback...
Page 302: ...302 PSoC CY8CTMG20x and CY8CTST200 TRM Document No 001 53603 Rev C Glossary Feedback...