User Manual
310
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
NVM Module (Flash Memory)
If the block is not within the memory address range of the NVM module, the module does not react at all and
a different memory module may handle the access.
If the page accessed during a read is not mapped, an NVM_TRAP is triggered (e.g. when accessing an erased
data sector).
Memory read accesses are only possible while no FSM procedures (program, init, sleep or copy) is in progress.
A memory read access while the FSM is busy is stalled as long as the FSM is busy and the access is carried out
when the FSM is in idle mode again.
Since a read to the memory field takes a fixed time mostly independent of the system frequency, an optimized
number of waitstates (3, 1 or, 0) is generated for different system frequencies selected by
SYSCON0.NVMCLKFAC.
Furthermore, a module internal read buffer holds the block read last. An access to an address within this block
does not trigger a new reading from the memory field but is directly served from the read buffer. For execution
of linear code three out of four 16-bit instructions or one out od two 32-bit instructions accesses are served
without any waitstates.
12.2.5
Memory Write
Data is not written to the memory array directly, but to the assembly buffer and then copied into the cell array
by the write sequence.
Memory writes are handled through the BootROM software, which at first copies the existing content of a page
to the assembly buffer, allows the user to modify the content of the assembly buffer and afterwards executes
the programming of the data to the memory field followed by a verification step.
12.2.6
Timing
The target timing of the hardware sequences excluding the software overhead is shown below:
• Erase: 4.0 ms per page
• Write: 3.0 ms per page
• Program (= Erase+ Write): 7.0 ms per page
The disturb handling routine when enabled with a probability of a approximately 0.4% adds additional 7.0 ms
to a page write or program operation.
12.2.7
Verify
The data programmed by the BootROM function is verified by the BootROM routine itself. The programmed
data in the cell array is compared with the data still available in the assembly buffer. This is done using suitable
hard-read levels. These hard-read levels provide a margin compared to the normal read level to ensure that
the data is actually programmed with suitably distinct levels for written and erased bits.
12.2.8
Tearing-Safe Programming
The mapping mechanism of the NVM module is used like a log-structured file system: When a page is
programmed in the sector the old values are not physically overwritten, but a different physical page (spare
page) is programmed in the same sector in fact. If the programming fails (e.g. because of power loss during the
erase or write procedure), the old values are still present in the sector. The BootROM routines therefore can
program a single page in a tearing-safe way.
When an erase or write procedure to the memory field was interrupted by a power-down, this is identified
during the reconstruction of the map-RAM content after the next reset. In this case, a special routine in the
