User Manual
89
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
System Control Unit - Digital Modules (SCU-DM)
7.3
Clock Generation Unit
The Clock Generation Unit (CGU) provides a flexible clock generation for TLE984xQX. During user program
execution the frequency can be programmed for an optimal ratio between performance and power
consumption. Therefore the power consumption can be adapted to the actual application state.
The CGU in the TLE984xQX consists of one oscillator circuit (OSC_HP), a Phase-Locked Loop (PLL) module
including an internal oscillator (OSC_PLL) and a Clock Control Unit (CCU). The CGU can convert a low-
frequency input/external clock signal to a high-frequency internal clock.
The system clock
f
SYS
is generated out of the following selectable clocks:
• PLL clock output
f
PLL
• Direct clock from oscillator OSC_HP
f
OSC
• Direct output of internal Oscillator
f
INTOSC
• Low precision clock
f
LP_CLK
(HW-enabled for startup after reset and during power-down wake-up sequence)
Figure 26 Clock Generation Unit Block Diagram
The following sections describe the different parts of the CGU.
7.3.1
Low Precision Clock
The clock source LP_CLK is a low-precision RC oscillator (LP-OSC, see
f
LP_CLK
) that is enabled by hardware as
an independent clock source for the TLE984xQX startup after reset and during the power-down wake-up
sequence. There is no user configuration possible on
f
LP_CLK
.
HPOSCCON
XTAL1
XTAL2
OSC_HP
PMU
CGU
CCU
PLL
CMCON
PLLCON
f
PL
L
f
SYS
LP_CLK
CGU_block
f
LP_CLK
f
OSC
SYSCON0
OSC_CON
Int
OSC
f
INTOSC