Appendix B Internal I/O Registers
Rev.3.00 Jul. 19, 2007 page 494 of 532
REJ09B0397-0300
PMR5—Port mode register 5
H'CC
I/O ports
Bit
Initial value
Read/Write
7
WKP
7
0
R/W
6
WKP
6
0
R/W
5
WKP
5
0
R/W
4
WKP
4
0
R/W
3
WKP
3
0
R/W
0
WKP
0
0
R/W
2
WKP
2
0
R/W
1
WKP
1
0
R/W
0
Functions as P5 I/O pin
1
Functions as
WKP
input pin
n
n
P5 /WKP pin function switch
n
n
PWCR—PWM control register
H'D0
14-bit PWM
(H8/3857 Group only)
Bit
Initial value
Read/Write
7
⎯
1
⎯
6
⎯
1
⎯
5
⎯
1
⎯
4
⎯
1
⎯
3
⎯
1
⎯
0
PWCR0
0
W
2
⎯
1
⎯
1
⎯
1
⎯
Clock select
0
The input clock is
φ
/2 (t
φ
*
= 2/
φ
). The conversion period is 16,384/
φ
,
with a minimum modulation width of 1/
φ
1
The input clock is
φ
/4 (t
φ
*
= 4/
φ
). The conversion period is 32,768/
φ
,
with a minimum modulation width of 2/
φ
Note: t
φ
: Period of PWM input clock
*
PWDRU—PWM data register U
H'D1
14-bit PWM
(H8/3857 Group only)
Bit
Initial value
Read/Write
7
⎯
1
⎯
6
⎯
1
⎯
5
0
W
4
0
W
3
0
W
0
0
W
2
0
W
1
0
W
Upper 6 bits of data for generating PWM waveform
PWDRU5 PWDRU4 PWDRU3
PWDRU0
PWDRU2 PWDUR1
Summary of Contents for F-ZTAT H8 Series
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Page 194: ...7 RAM Rev 3 00 Jul 19 2007 page 168 of 532 REJ09B0397 0300...
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Page 274: ...9 Timers Rev 3 00 Jul 19 2007 page 248 of 532 REJ09B0397 0300...
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