9. Timers
Rev.3.00 Jul. 19, 2007 page 226 of 532
REJ09B0397-0300
9.4.4
Timer C Operation States
Table 9.10 summarizes the timer C operation states.
Table 9.10 Timer C Operation States
Operation Mode
Reset
Active
Sleep
Watch
Sub-
active
Sub-
sleep
Standby
TCC Interval Reset Functions Functions Halted
Functions/
Halted
*
Functions/
Halted
*
Halted
TCC Auto
reload
Reset Functions Functions Halted
Functions/
Halted
*
Functions/
Halted
*
Halted
TMC
Reset
Functions Retained Retained Functions Retained Retained
Note:
*
When
φ
W
/4 is selected as the internal clock of TCC in active mode or sleep mode, the
internal clock is not synchronous with the system clock, so it is synchronized by a
synchronizing circuit. This may result in a maximum error of 1/
φ
(s) in the count cycle.
When timer C is operated in subactive mode or subsleep mode, either an external clock
or the
φ
W
/4 internal clock must be selected. The counter will not operate in these modes
if another clock is selected. If the internal
φ
W
/4 clock is selected when
φ
W
/8 is being used
as the subclock
φ
SUB
, the lower 2 bits of the counter will operate on the same cycle, with
the least significant bit not being counted.
9.5 Timer
F
9.5.1 Overview
Timer F is a 16-bit timer with an output compare function. Compare match signals can be used to
reset the counter, request an interrupt, or toggle the output. Timer F can also be used for external
event counting, and can operate as two independent 8-bit timers, timer FH and timer FL.
Features
Features of timer F are given below.
•
Choice of four internal clock sources (
φ
/32,
φ
/16,
φ
/4,
φ
/2) or an external clock (can be used as
an external event counter).
•
Output from pin TMOFH is toggled by one compare match signal (the initial value of the
toggle output can be set).
•
Counter can be reset by the compare match signal.
•
Two interrupt sources: counter overflow and compare match.
•
Can operate as two independent 8-bit timers (timer FH and timer FL) in 8-bit mode.
Summary of Contents for F-ZTAT H8 Series
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