Renesas F-ZTAT H8 Series, Hardware Manual

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14. Dot Matrix LCD Controller (H8/3854 Group)
Rev.3.00 Jul. 19, 2007 page 386 of 532
REJ09B0397-0300
performed in the next cycle, DB7 to DB0 are set to input mode from the point at which R/
W
is
cleared to 0, and the output is cleared.
In either case, do not change RS or R/
W
at the fall of STRB.
RS
R/
W
STRB
DB7 to
DB0
Index
register write
Data
register write
Index
register write
Data
register read
Data
register read
Data
register write
Data Data Data Data Data Data
Figure 14.3 Example of Timing Sequence for 8-Bit Data Transfer
Notes on Use of Chip-Internal I/O Ports
For LCD controller interface internal ports 9 and A, port input/output is controlled by means of
PCR9 and PCRA in the same way as for ordinary I/O ports, and in output mode, the values set in
PDR9 or PDRA are output. Also, LCD controller internal pins RS, R/
W
, and STRB are input-only
pins, and DB7 to DB0 input/output is controlled by R/
W
. Therefore, the following points must be
noted.
1. After reset release and standby mode release
Since the chip's internal I/O ports go to the high-impedance state in a reset and in standby
mode, in initialization after reset or standby mode release, H'06 should be set in PDRA, and
H'07 in PCRA. This will set port A to output mode. If the PDRA setting were H'00, there
would be a possibility of the index register (IR) being written to.
2. Changing register read/write setting
When an LCD controller register is read (R/
W
= 1), DB7 to DB0 output data from the LCD
controller side, and so port 9 must be set to input mode. Therefore, H'00 must be written to
PCR9, setting port 9 to input mode, before changing the R/
W
setting from 0 to 1. When
writing data to an LCD controller register, first change R/
W
from 1 to 0, then write H'FFF to
PCR9, setting port 9 to output mode.