Renesas F-ZTAT H8 Series, Hardware Manual

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8. I/O Ports
Rev.3.00 Jul. 19, 2007 page 173 of 532
REJ09B0397-0300
8.2.2 Register Configuration and Description
Table 8.2 shows the port 1 register configuration.
Table 8.2 Port 1 Registers
Name Abbr. R/W Initial Value Address
Port data register 1 PDR1 R/W H'00 H'FFD4
Port control register 1 PCR1 W H'00 H'FFE4
Port pull-up control register 1 PUCR1 R/W H'00 H'FFE0
Port mode register 1 PMR1 R/W H'00 H'FFC8
Port Data Register 1 (PDR1)
PDR1 is an 8-bit register that stores data for pins P1
7
through P1
0
. If port 1 is read while PCR1 bits
are set to 1, the values stored in PDR1 are read, regardless of the actual pin states. If port 1 is read
while PCR1 bits are cleared to 0, the pin states are read.
Upon reset, PDR1 is initialized to H'00 (H8/3857 Group) or H'58 (H8/3854 Group).
H8/3857 Group
Bit 7 6 5 4 3 2 1 0
P1
7
P1
6
P1
5
P1
4
P1
3
P1
2
P1
1
P1
0
Initial value 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
H8/3854 Group
Bit 7 6 5 4 3 2 1 0
P1
7
⎯
P1
5
⎯ ⎯
P1
2
P1
1
P1
0
Initial value 0 1 0 1 1 0 0 0
Read/Write R/W
⎯
R/W
⎯ ⎯
R/W R/W R/W
In the H8/3854 Group, bits 6, 4, and 3 are reserved, and must always be set to 1.