9. Timers
Rev.3.00 Jul. 19, 2007 page 217 of 532
REJ09B0397-0300
9.3.2 Register
Descriptions
Timer Mode Register B (TMB)
Bit
7 6 5 4 3 2 1 0
TMB7
⎯
⎯
⎯
⎯
TMB2
TMB1
TMB0
Initial
value 0 1 1 1 1 0 0 0
Read/Write R/W
⎯
⎯
⎯
⎯
R/W
R/W
R/W
TMB is an 8-bit read/write register for selecting the auto-reload function and input clock.
Upon reset, TMB is initialized to H'78.
Bit 7—Auto-Reload Function Select (TMB7):
Bit 7 selects whether timer B is used as an
interval timer or auto-reload timer.
Bit 7: TMB7
Description
0
Interval timer function selected (initial
value)
1
Auto-reload function selected
Bits 6 to 3—Reserved Bits:
Bits 6 to 3 are reserved; they always read 1, and cannot be modified.
Bits 2 to 0—Clock Select (TMB2 to TMB0):
Bits 2 to 0 select the clock input to TCB. For
external event counting, either the rising or falling edge can be selected.
Bit 2: TMB2
Bit 1: TMB1
Bit 0: TMB0
Description
0 0 0 Internal
clock:
φ
/8192 (initial
value)
1
Internal
clock:
φ
/2048
1
0
Internal
clock:
φ
/512
1
Internal
clock:
φ
/256
1 0 0 Internal
clock:
φ
/64
1
Internal
clock:
φ
/16
1
0
Internal
clock:
φ
/4
1
External event (TMIB): rising or falling edge
*
Note:
*
The edge of the external event signal is selected by bit IEG1 in the IRQ edge select
register (IEGR). See section 3.3.2, Interrupt Control Registers, for details on the IRQ
edge select register. Be sure to set bit IRQ1 in port mode register 1 (PMR1) to 1 before
setting bits TMB2 to TMB0 to 111.
Summary of Contents for F-ZTAT H8 Series
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