Renesas F-ZTAT H8 Series, Hardware Manual

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10. Serial Communication Interface
Rev.3.00 Jul. 19, 2007 page 293 of 532
REJ09B0397-0300
Transmit/Receive Format
Figure 10.14 shows the general communication data format for synchronous communication.
Note: * At high level except during continuous transmit/receive.
Serial data
Serial clock
One unit of communication data (character or frame)
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Don't
care
Don't
care
* *
LSB MSB
8 bits
Figure 10.14 Data Format in Synchronous Communication Mode
In synchronous communication, data on the communication line is output from one falling edge of
the serial clock until the next falling edge. Data is guaranteed valid at the rising edge of the serial
clock.
One character of data starts from the LSB and ends with the MSB. The communication line retains
the MSB state after the MSB is output.
In synchronous receive mode, SCI3 latches receive data in synchronization with the rising edge of
the serial clock.
The transmit/receive format is fixed at 8-bit data. No parity bit or multiprocessor bit is added in
this mode.
Clock
Either an internal clock from the built-in baud rate generator is used, or an external clock is input
at pin SCK
3
. The choice of clock sources is designated by bit COM in SMR and bits CKE1 and
CKE0 in serial control register 3 (SCR3). See table 10.12 for details on selecting the clock source.
When operation is based on an internal clock, a serial clock is output at pin SCK
3
. Eight clock
pulses are output per character of transmit/receive data. When no transmit or receive operation is
being performed, the pin is held at the high level.